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author | Simon Frankenberger <simon@fraho.eu> | 2019-06-02 21:54:02 +0200 |
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committer | Natanael Copa <ncopa@alpinelinux.org> | 2019-06-05 17:27:50 +0000 |
commit | 309e323d10bf9a58a9da59eb60c09079a3c09a0a (patch) | |
tree | d0dd415cd1db358325c412013d94e23b1cada653 /community/openjdk11/x86.patch | |
parent | 6212920763e5e59a83b6d2654a92e258ab791ea0 (diff) | |
download | aports-309e323d10bf9a58a9da59eb60c09079a3c09a0a.tar.bz2 aports-309e323d10bf9a58a9da59eb60c09079a3c09a0a.tar.xz |
community/openjdk9-11: Move from testing
OpenJDK 9 and 10 may be removed once 11 is built.
Diffstat (limited to 'community/openjdk11/x86.patch')
-rw-r--r-- | community/openjdk11/x86.patch | 129 |
1 files changed, 129 insertions, 0 deletions
diff --git a/community/openjdk11/x86.patch b/community/openjdk11/x86.patch new file mode 100644 index 0000000000..1a5bf4328e --- /dev/null +++ b/community/openjdk11/x86.patch @@ -0,0 +1,129 @@ +--- old/src/hotspot/os_cpu/linux_x86/os_linux_x86.cpp ++++ new/src/hotspot/os_cpu/linux_x86/os_linux_x86.cpp +@@ -90,6 +90,126 @@ + #define SPELL_REG_FP "ebp" + #endif // AMD64 + ++// ============================================================================== ++// Taken from glibc 2.28 ++// source: https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/x86/fpu_control.h;h=4cb98c5679b2897ff4e5826d228cba6be589e24d;hb=3c03baca37fdcb52c3881e653ca392bba7a99c2b ++// ============================================================================== ++#ifndef AMD64 ++/* FPU control word bits. x86 version. ++ Copyright (C) 1993-2018 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ Contributed by Olaf Flebbe. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, see ++ <http://www.gnu.org/licenses/>. */ ++ ++#ifndef _FPU_CONTROL_H ++#define _FPU_CONTROL_H 1 ++ ++/* Note that this file sets on x86-64 only the x87 FPU, it does not ++ touch the SSE unit. */ ++ ++/* Here is the dirty part. Set up your 387 through the control word ++ * (cw) register. ++ * ++ * 15-13 12 11-10 9-8 7-6 5 4 3 2 1 0 ++ * | reserved | IC | RC | PC | reserved | PM | UM | OM | ZM | DM | IM ++ * ++ * IM: Invalid operation mask ++ * DM: Denormalized operand mask ++ * ZM: Zero-divide mask ++ * OM: Overflow mask ++ * UM: Underflow mask ++ * PM: Precision (inexact result) mask ++ * ++ * Mask bit is 1 means no interrupt. ++ * ++ * PC: Precision control ++ * 11 - round to extended precision ++ * 10 - round to double precision ++ * 00 - round to single precision ++ * ++ * RC: Rounding control ++ * 00 - rounding to nearest ++ * 01 - rounding down (toward - infinity) ++ * 10 - rounding up (toward + infinity) ++ * 11 - rounding toward zero ++ * ++ * IC: Infinity control ++ * That is for 8087 and 80287 only. ++ * ++ * The hardware default is 0x037f which we use. ++ */ ++ ++#include <features.h> ++ ++/* masking of interrupts */ ++#define _FPU_MASK_IM 0x01 ++#define _FPU_MASK_DM 0x02 ++#define _FPU_MASK_ZM 0x04 ++#define _FPU_MASK_OM 0x08 ++#define _FPU_MASK_UM 0x10 ++#define _FPU_MASK_PM 0x20 ++ ++/* precision control */ ++#define _FPU_EXTENDED 0x300 /* libm requires double extended precision. */ ++#define _FPU_DOUBLE 0x200 ++#define _FPU_SINGLE 0x0 ++ ++/* rounding control */ ++#define _FPU_RC_NEAREST 0x0 /* RECOMMENDED */ ++#define _FPU_RC_DOWN 0x400 ++#define _FPU_RC_UP 0x800 ++#define _FPU_RC_ZERO 0xC00 ++ ++#define _FPU_RESERVED 0xF0C0 /* Reserved bits in cw */ ++ ++ ++/* The fdlibm code requires strict IEEE double precision arithmetic, ++ and no interrupts for exceptions, rounding to nearest. */ ++ ++#define _FPU_DEFAULT 0x037f ++ ++/* IEEE: same as above. */ ++#define _FPU_IEEE 0x037f ++ ++/* Type of the control word. */ ++typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__HI__))); ++ ++/* Macros for accessing the hardware control word. "*&" is used to ++ work around a bug in older versions of GCC. __volatile__ is used ++ to support combination of writing the control register and reading ++ it back. Without __volatile__, the old value may be used for reading ++ back under compiler optimization. ++ ++ Note that the use of these macros is not sufficient anymore with ++ recent hardware nor on x86-64. Some floating point operations are ++ executed in the SSE/SSE2 engines which have their own control and ++ status register. */ ++#define _FPU_GETCW(cw) __asm__ __volatile__ ("fnstcw %0" : "=m" (*&cw)) ++#define _FPU_SETCW(cw) __asm__ __volatile__ ("fldcw %0" : : "m" (*&cw)) ++ ++/* Default control word set at startup. */ ++extern fpu_control_t __fpu_control; ++ ++#endif /* fpu_control.h */ ++ ++#endif // AMD64 ++// ============================================================================== ++// ============================================================================== ++// ============================================================================== ++ + address os::current_stack_pointer() { + #ifdef SPARC_WORKS + register void *esp; |