community/llvm3.7: add support for s390x atomic fence

Patch copied from Fedora package.

2 files changed, 165 insertions, 0 deletions

diff --git a/community/llvm3.7/APKBUILD b/community/llvm3.7/APKBUILD
index e4eee15acc..445fda5673 100644
--- a/community/llvm3.7/APKBUILD
+++ b/community/llvm3.7/APKBUILD
@@ -18,6 +18,7 @@ source="http://llvm.org/releases/$pkgver/llvm-$pkgver.src.tar.xz
 	llvm-0001-Add-Musl-MuslEABI-and-Musl-EABIHF-triples.patch
 	llvm-0002-Fix-build-with-musl-libc.patch
 	llvm-0003-Fix-DynamicLibrary-to-build-with-musl-libc.patch
+	llvm-d18644-systemz-atomic-fence.patch
 	llvm-nm-workaround.patch
 	config.guess.patch
 	cmake-fix-libLLVM-name.patch
@@ -204,6 +205,7 @@ sha512sums="ac521debc02f6deba96ef975d6a546b0c5c77299c1dbf5e1b87a7974ff5e7fd715bd
 7a74abc15d8abb4ef4884469544168bfefb6859166f041c7d766157d77b20ea5b6bb06ffc0dd4f6965eab95294102f060d7a969e778ec933d2859c4900ec7380  llvm-0001-Add-Musl-MuslEABI-and-Musl-EABIHF-triples.patch
 4cb3fabbb627b596ce398ed717c66ad20bbea7092ba30751520cc5a63d38e1ac53d23e98a6ad82121ddcf2434383ba5cadbc2990f99a4528e99c6e2160c2f725  llvm-0002-Fix-build-with-musl-libc.patch
 19bfb9282455d39d07dbb2b1293b03a45c57d522fbb9c5e58dac034200669628b97e7a90cd4ff5d52d9bb79acfccbef653d8a1140a7f0589ecd6f9b7c4ba0eb6  llvm-0003-Fix-DynamicLibrary-to-build-with-musl-libc.patch
+303ef099e8e21f9bc5f88ba1b30870e8127bea4948fc66b1858cc014cbde7bd917dc0bee1a511ef2adb6a9f40a3e3c3ae3fcada6ad3ee339807ac893c882d7ae  llvm-d18644-systemz-atomic-fence.patch
 11db6f3c5d697bc536c7d053530f7a5572756185e16399c32c31306861b58046ca9bc14b8d8097758c00a8c1a7026cbfb75636c0e697e59c53dda5848f93b006  llvm-nm-workaround.patch
 caf1c9466e8163f8844bd40095d1c3ce26c9e96dcb639f64833baca65a81708d39496e8c8ea65c7f11476d752265080998f1873b79cbc92b23349258e4dfa3ab  config.guess.patch
 52287dd37f62e0b51c487abe62a22440d3e9df2cb6144af45ba9ddc42848495fad533bf6b13f08e1b454ee653be9b8a14e02cf81f430a7d2c9be030889ef7f72  cmake-fix-libLLVM-name.patch"
diff --git a/community/llvm3.7/llvm-d18644-systemz-atomic-fence.patch b/community/llvm3.7/llvm-d18644-systemz-atomic-fence.patch
new file mode 100644
index 0000000000..32d4396a57
--- /dev/null
+++ b/community/llvm3.7/llvm-d18644-systemz-atomic-fence.patch
@@ -0,0 +1,163 @@
+Source: http://pkgs.fedoraproject.org/cgit/rpms/llvm.git/tree/llvm-d18644-systemz-atomic-fence.patch?h=f24
+===================================================================
+--- a/lib/Target/SystemZ/SystemZAsmPrinter.cpp
++++ a/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+@@ -260,6 +260,11 @@
+         .addImm(15).addReg(SystemZ::R0D);
+     break;
+ 
++  // Emit nothing here but a comment if we can.
++  case SystemZ::MemBarrier:
++    OutStreamer->emitRawComment("MEMBARRIER");
++    return;
++
+   default:
+     Lower.lower(MI, LoweredMI);
+     break;
+===================================================================
+--- a/lib/Target/SystemZ/SystemZISelLowering.h
++++ a/lib/Target/SystemZ/SystemZISelLowering.h
+@@ -146,6 +146,9 @@
+   // Perform a serialization operation.  (BCR 15,0 or BCR 14,0.)
+   SERIALIZE,
+ 
++  // Compiler barrier only; generate a no-op.
++  MEMBARRIER,
++
+   // Transaction begin.  The first operand is the chain, the second
+   // the TDB pointer, and the third the immediate control field.
+   // Returns chain and glue.
+@@ -479,6 +482,7 @@
+   SDValue lowerBITCAST(SDValue Op, SelectionDAG &DAG) const;
+   SDValue lowerOR(SDValue Op, SelectionDAG &DAG) const;
+   SDValue lowerCTPOP(SDValue Op, SelectionDAG &DAG) const;
++  SDValue lowerATOMIC_FENCE(SDValue Op, SelectionDAG &DAG) const;
+   SDValue lowerATOMIC_LOAD(SDValue Op, SelectionDAG &DAG) const;
+   SDValue lowerATOMIC_STORE(SDValue Op, SelectionDAG &DAG) const;
+   SDValue lowerATOMIC_LOAD_OP(SDValue Op, SelectionDAG &DAG,
+===================================================================
+--- a/lib/Target/SystemZ/SystemZISelLowering.cpp
++++ a/lib/Target/SystemZ/SystemZISelLowering.cpp
+@@ -216,6 +216,8 @@
+   setOperationAction(ISD::ATOMIC_LOAD_UMAX, MVT::i32, Custom);
+   setOperationAction(ISD::ATOMIC_CMP_SWAP,  MVT::i32, Custom);
+ 
++  setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Custom);
++
+   // z10 has instructions for signed but not unsigned FP conversion.
+   // Handle unsigned 32-bit types as signed 64-bit types.
+   if (!Subtarget.hasFPExtension()) {
+@@ -3118,6 +3120,25 @@
+   return Op;
+ }
+ 
++SDValue SystemZTargetLowering::lowerATOMIC_FENCE(SDValue Op,
++                                                 SelectionDAG &DAG) const {
++  SDLoc DL(Op);
++  AtomicOrdering FenceOrdering = static_cast<AtomicOrdering>(
++    cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue());
++  SynchronizationScope FenceScope = static_cast<SynchronizationScope>(
++    cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue());
++
++  // The only fence that needs an instruction is a sequentially-consistent
++  // cross-thread fence.
++  if (FenceOrdering == SequentiallyConsistent && FenceScope == CrossThread) {
++    return SDValue(DAG.getMachineNode(SystemZ::Serialize, DL, MVT::Other,
++                                      Op.getOperand(0)), 0);
++  }
++
++  // MEMBARRIER is a compiler barrier; it codegens to a no-op.
++  return DAG.getNode(SystemZISD::MEMBARRIER, DL, MVT::Other, Op.getOperand(0));
++}
++
+ // Op is an atomic load.  Lower it into a normal volatile load.
+ SDValue SystemZTargetLowering::lowerATOMIC_LOAD(SDValue Op,
+                                                 SelectionDAG &DAG) const {
+@@ -4444,6 +4465,8 @@
+   case ISD::CTTZ_ZERO_UNDEF:
+     return DAG.getNode(ISD::CTTZ, SDLoc(Op),
+                        Op.getValueType(), Op.getOperand(0));
++  case ISD::ATOMIC_FENCE:
++    return lowerATOMIC_FENCE(Op, DAG);
+   case ISD::ATOMIC_SWAP:
+     return lowerATOMIC_LOAD_OP(Op, DAG, SystemZISD::ATOMIC_SWAPW);
+   case ISD::ATOMIC_STORE:
+@@ -4547,6 +4570,7 @@
+     OPCODE(SEARCH_STRING);
+     OPCODE(IPM);
+     OPCODE(SERIALIZE);
++    OPCODE(MEMBARRIER);
+     OPCODE(TBEGIN);
+     OPCODE(TBEGIN_NOFLOAT);
+     OPCODE(TEND);
+@@ -5307,6 +5331,7 @@
+ MachineBasicBlock *
+ SystemZTargetLowering::emitAtomicCmpSwapW(MachineInstr *MI,
+                                           MachineBasicBlock *MBB) const {
++
+   MachineFunction &MF = *MBB->getParent();
+   const SystemZInstrInfo *TII =
+       static_cast<const SystemZInstrInfo *>(Subtarget.getInstrInfo());
+===================================================================
+--- a/lib/Target/SystemZ/SystemZInstrInfo.td
++++ a/lib/Target/SystemZ/SystemZInstrInfo.td
+@@ -1231,6 +1231,10 @@
+ let hasSideEffects = 1 in
+ def Serialize : Alias<2, (outs), (ins), [(z_serialize)]>;
+ 
++// A pseudo instruction that serves as a compiler barrier.
++let hasSideEffects = 1 in
++def MemBarrier : Pseudo<(outs), (ins), [(z_membarrier)]>;
++
+ let Predicates = [FeatureInterlockedAccess1], Defs = [CC] in {
+   def LAA   : LoadAndOpRSY<"laa",   0xEBF8, atomic_load_add_32, GR32>;
+   def LAAG  : LoadAndOpRSY<"laag",  0xEBE8, atomic_load_add_64, GR64>;
+===================================================================
+--- a/lib/Target/SystemZ/SystemZOperators.td
++++ a/lib/Target/SystemZ/SystemZOperators.td
+@@ -188,6 +188,8 @@
+ 
+ def z_serialize         : SDNode<"SystemZISD::SERIALIZE", SDTNone,
+                                  [SDNPHasChain, SDNPMayStore]>;
++def z_membarrier        : SDNode<"SystemZISD::MEMBARRIER", SDTNone,
++                                 [SDNPHasChain, SDNPSideEffect]>;
+ 
+ // Defined because the index is an i32 rather than a pointer.
+ def z_vector_insert     : SDNode<"ISD::INSERT_VECTOR_ELT",
+===================================================================
+--- a/test/CodeGen/SystemZ/atomic-fence-01.ll
++++ a/test/CodeGen/SystemZ/atomic-fence-01.ll
+@@ -0,0 +1,16 @@
++; Test (fast) serialization.
++;
++; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s --check-prefix=Z10
++; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196  | FileCheck %s --check-prefix=Z196
++; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=zEC12 | FileCheck %s --check-prefix=ZEC12
++; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13   | FileCheck %s --check-prefix=Z13
++
++define void @test() {
++; Z10:   bcr 15, %r0
++; Z196:  bcr 14, %r0
++; ZEC12: bcr 14, %r0
++; Z13:   bcr 14, %r0
++  fence seq_cst
++  ret void
++}
++
+===================================================================
+--- a/test/CodeGen/SystemZ/atomic-fence-02.ll
++++ a/test/CodeGen/SystemZ/atomic-fence-02.ll
+@@ -0,0 +1,13 @@
++; Serialization is emitted only for fence seq_cst.
++;
++; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
++
++define void @test() {
++; CHECK: #MEMBARRIER
++  fence acquire
++; CHECK: #MEMBARRIER
++  fence release
++; CHECK: #MEMBARRIER
++  fence acq_rel
++  ret void
++}