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| author | Timo Teräs <timo.teras@iki.fi> | 2014-04-01 10:38:28 +0000 |
|---|---|---|
| committer | Timo Teräs <timo.teras@iki.fi> | 2014-04-01 10:38:28 +0000 |
| commit | b6fdb56e1b4b9b0da63f514a592d95693dc59ab0 (patch) | |
| tree | bbb8009240eb2acc6346f20ef7e62c5d7966d1de /main/musl | |
| parent | 6ad88320e77d19fc0346071108c2e876dc76c9fe (diff) | |
| download | aports-b6fdb56e1b4b9b0da63f514a592d95693dc59ab0.tar.bz2 aports-b6fdb56e1b4b9b0da63f514a592d95693dc59ab0.tar.xz | |
main/musl: add missing patch
Diffstat (limited to 'main/musl')
| -rw-r--r-- | main/musl/1002-use-armv6-opcodes-for-atomics-if-targetting-such-arc.patch | 102 |
1 files changed, 102 insertions, 0 deletions
diff --git a/main/musl/1002-use-armv6-opcodes-for-atomics-if-targetting-such-arc.patch b/main/musl/1002-use-armv6-opcodes-for-atomics-if-targetting-such-arc.patch new file mode 100644 index 0000000000..e05a6cd7de --- /dev/null +++ b/main/musl/1002-use-armv6-opcodes-for-atomics-if-targetting-such-arc.patch @@ -0,0 +1,102 @@ +From 59077a9fd34986482ee980cc6b1b989fced0d65a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Timo=20Ter=C3=A4s?= <timo.teras@iki.fi> +Date: Tue, 1 Apr 2014 10:53:23 +0300 +Subject: [PATCH 1/1] use armv6+ opcodes for atomics if targetting such + architecture + +--- + Makefile | 6 ++++++ + arch/arm/atomic.h | 4 ++++ + arch/arm/pthread_arch.h | 7 ++++++- + src/thread/arm/tls.S | 9 +++++++++ + src/thread/arm/tls.s | 4 ---- + 5 files changed, 25 insertions(+), 5 deletions(-) + create mode 100644 src/thread/arm/tls.S + delete mode 100644 src/thread/arm/tls.s + +diff --git a/Makefile b/Makefile +index 0ab0bfd..b96c76b 100644 +--- a/Makefile ++++ b/Makefile +@@ -111,6 +111,9 @@ $(foreach s,$(wildcard src/*/$(ARCH)*/*.s),$(eval $(call mkasmdep,$(s)))) + %.o: $(ARCH)/%.s + $(CC) $(CFLAGS_ALL_STATIC) -c -o $@ $< + ++%.o: $(ARCH)/%.s ++ $(CC) $(CFLAGS_ALL_STATIC) -c -o $@ $< ++ + %.o: %.c $(GENH) $(IMPH) + $(CC) $(CFLAGS_ALL_STATIC) -c -o $@ $< + +@@ -120,6 +123,9 @@ $(foreach s,$(wildcard src/*/$(ARCH)*/*.s),$(eval $(call mkasmdep,$(s)))) + %.lo: $(ARCH)/%.s + $(CC) $(CFLAGS_ALL_SHARED) -c -o $@ $< + ++%.lo: $(ARCH)/%.S ++ $(CC) $(CFLAGS_ALL_SHARED) -c -o $@ $< ++ + %.lo: %.c $(GENH) $(IMPH) + $(CC) $(CFLAGS_ALL_SHARED) -c -o $@ $< + +diff --git a/arch/arm/atomic.h b/arch/arm/atomic.h +index 734d287..cb8fb31 100644 +--- a/arch/arm/atomic.h ++++ b/arch/arm/atomic.h +@@ -22,7 +22,11 @@ static inline int a_ctz_64(uint64_t x) + return a_ctz_l(y); + } + ++#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 ++#define __k_cas(t, s, p) (!__sync_bool_compare_and_swap(p, t, s)) ++#else + #define __k_cas ((int (*)(int, int, volatile int *))0xffff0fc0) ++#endif + + static inline int a_cas(volatile int *p, int t, int s) + { +diff --git a/arch/arm/pthread_arch.h b/arch/arm/pthread_arch.h +index 43a1c01..3ac2779 100644 +--- a/arch/arm/pthread_arch.h ++++ b/arch/arm/pthread_arch.h +@@ -1,7 +1,12 @@ ++#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 ++char *__aeabi_read_tp(void) __attribute__((const)); ++#define __pthread_self() \ ++ ((pthread_t)((char *)__aeabi_read_tp()+8-sizeof(struct pthread))) ++#else + typedef char *(*__ptr_func_t)(void) __attribute__((const)); +- + #define __pthread_self() \ + ((pthread_t)(((__ptr_func_t)0xffff0fe0)()+8-sizeof(struct pthread))) ++#endif + + #define TLS_ABOVE_TP + #define TP_ADJ(p) ((char *)(p) + sizeof(struct pthread) - 8) +diff --git a/src/thread/arm/tls.S b/src/thread/arm/tls.S +new file mode 100644 +index 0000000..f255e83 +--- /dev/null ++++ b/src/thread/arm/tls.S +@@ -0,0 +1,9 @@ ++.global __aeabi_read_tp ++.type __aeabi_read_tp,%function ++__aeabi_read_tp: ++#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 ++ .inst 0xee1d0f70 /* mrc 15,0,r0,cr13,cr0,{3} */ ++ bx lr ++#else ++ ldr pc,=0xffff0fe0 ++#endif +diff --git a/src/thread/arm/tls.s b/src/thread/arm/tls.s +deleted file mode 100644 +index 59736ac..0000000 +--- a/src/thread/arm/tls.s ++++ /dev/null +@@ -1,4 +0,0 @@ +-.global __aeabi_read_tp +-.type __aeabi_read_tp,%function +-__aeabi_read_tp: +- ldr pc,=0xffff0fe0 +-- +1.9.1 + |