1 files changed, 76 insertions, 0 deletions
diff --git a/main/xf86-video-s3virge/s3virge-1.10.4-vga.patch b/main/xf86-video-s3virge/s3virge-1.10.4-vga.patch
new file mode 100644
index 0000000000..3fb1fd6cfc
--- /dev/null
+++ b/main/xf86-video-s3virge/s3virge-1.10.4-vga.patch
@@ -0,0 +1,76 @@
+From 92b4671ca75022a56ad9e85b347f81c12157c98f Mon Sep 17 00:00:00 2001
+From: Adam Jackson <ajax@redhat.com>
+Date: Wed, 16 Nov 2011 19:58:29 +0000
+Subject: Adapt to missing PIOOffset in videoabi 12
+
+Signed-off-by: Adam Jackson <ajax@redhat.com>
+---
+diff --git a/src/s3v_driver.c b/src/s3v_driver.c
+index 2ced9ac..0f754dd 100644
+--- a/src/s3v_driver.c
++++ b/src/s3v_driver.c
+@@ -3516,11 +3516,17 @@ S3VEnableMmio(ScrnInfoPtr pScrn)
+   S3VPtr ps3v;
+   IOADDRESS vgaCRIndex, vgaCRReg;
+   unsigned char val;
+-  
++  unsigned int PIOOffset = 0;
++
+   PVERB5("	S3VEnableMmio\n");
+   
+   hwp = VGAHWPTR(pScrn);
+   ps3v = S3VPTR(pScrn);
++
++#if ABI_VIDEODRV_VERSION < 12
++  PIOOffset = hwp->PIOOffset;
++#endif
++  
+   /*
+    * enable chipset (seen on uninitialized secondary cards)
+    * might not be needed once we use the VGA softbooter
+@@ -3533,17 +3539,17 @@ S3VEnableMmio(ScrnInfoPtr pScrn)
+    * to be set correctly already and MMIO _has_ to be
+    * enabled.
+    */
+-  val = inb(hwp->PIOOffset + 0x3C3);               /*@@@EE*/
+-  outb(hwp->PIOOffset + 0x3C3, val | 0x01);
++  val = inb(PIOOffset + 0x3C3);               /*@@@EE*/
++  outb(PIOOffset + 0x3C3, val | 0x01);
+   /*
+    * set CR registers to color mode
+    * in mono mode extended CR registers
+    * are not accessible. (EE 05/04/99)
+    */
+-  val = inb(hwp->PIOOffset + VGA_MISC_OUT_R);      /*@@@EE*/
+-  outb(hwp->PIOOffset + VGA_MISC_OUT_W, val | 0x01);
++  val = inb(PIOOffset + VGA_MISC_OUT_R);      /*@@@EE*/
++  outb(PIOOffset + VGA_MISC_OUT_W, val | 0x01);
+   vgaHWGetIOBase(hwp);             	/* Get VGA I/O base */
+-  vgaCRIndex = hwp->PIOOffset + hwp->IOBase + 4;
++  vgaCRIndex = PIOOffset + hwp->IOBase + 4;
+   vgaCRReg = vgaCRIndex + 1;
+ #if 1
+   /*
+@@ -3562,7 +3568,7 @@ S3VEnableMmio(ScrnInfoPtr pScrn)
+   			      	/* Enable new MMIO, if TRIO mmio is already */
+ 				/* enabled, then it stays enabled. */
+   outb(vgaCRReg, ps3v->EnableMmioCR53 | 0x08);
+-  outb(hwp->PIOOffset + VGA_MISC_OUT_W, val);
++  outb(PIOOffset + VGA_MISC_OUT_W, val);
+   if (S3_TRIO_3D_SERIES(ps3v->Chipset)) {
+     outb(vgaCRIndex, 0x40);
+     val = inb(vgaCRReg);
+@@ -3584,7 +3590,10 @@ S3VDisableMmio(ScrnInfoPtr pScrn)
+   hwp = VGAHWPTR(pScrn);
+   ps3v = S3VPTR(pScrn);
+ 
+-  vgaCRIndex = hwp->PIOOffset + hwp->IOBase + 4;
++  vgaCRIndex = hwp->IOBase + 4;
++#if ABI_VIDEODRV_VERSION < 12
++  vgaCRIndex += hwp->PIOOffset;
++#endif
+   vgaCRReg = vgaCRIndex + 1;
+   outb(vgaCRIndex, 0x53);
+ 				/* Restore register's original state */
+--
+cgit v0.9.0.2-2-gbebe