diff options
Diffstat (limited to 'testing/linux-amlogic/0043-clk-meson-gxbb-set-fclk_div3-as-CLK_IS_CRITICAL.patch')
| -rw-r--r-- | testing/linux-amlogic/0043-clk-meson-gxbb-set-fclk_div3-as-CLK_IS_CRITICAL.patch | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/testing/linux-amlogic/0043-clk-meson-gxbb-set-fclk_div3-as-CLK_IS_CRITICAL.patch b/testing/linux-amlogic/0043-clk-meson-gxbb-set-fclk_div3-as-CLK_IS_CRITICAL.patch new file mode 100644 index 0000000000..33671060cc --- /dev/null +++ b/testing/linux-amlogic/0043-clk-meson-gxbb-set-fclk_div3-as-CLK_IS_CRITICAL.patch @@ -0,0 +1,42 @@ +From 6b98d7c6cd508cfb4a2d4a1e87e192ffcabeda9e Mon Sep 17 00:00:00 2001 +From: Christian Hewitt <christianshewitt@gmail.com> +Date: Sat, 13 Oct 2018 14:04:46 +0400 +Subject: [PATCH] clk: meson-gxbb: set fclk_div3 as CLK_IS_CRITICAL + +On the Khadas VIM2 (GXM) and LePotato (GXL) board there are problems +with reboot; e.g. a ~60 second delay between issuing reboot and the +board power cycling (and in some OS configurations reboot will fail +and require manual power cycling). + +Similar to 'commit c987ac6f1f088663b6dad39281071aeb31d450a8 ("clk: +meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL")' the SCPI Cortex-M4 +Co-Processor seems to depend on FCLK_DIV3 being operational. + +Bisect gives 'commit 05f814402d6174369b3b29832cbb5eb5ed287059 ("clk: +meson: add fdiv clock gates") between 4.16 and 4.16-rc1 as the first +bad commit. This added support for the missing clock gates before the +fixed PLL fixed dividers (FCLK_DIVx) and the clock framework which +disabled all the unused fixed dividers, thus it disabled a critical +clock path for the SCPI Co-Processor. + +This change simply sets the FCLK_DIV3 gate as critical to ensure +nothing can disable it. + +Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> + +--- + drivers/clk/meson/gxbb.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c +index 6628ffa..01f7615 100644 +--- a/drivers/clk/meson/gxbb.c ++++ b/drivers/clk/meson/gxbb.c +@@ -513,6 +513,7 @@ static struct clk_fixed_factor gxbb_fclk_div3_div = { + .ops = &clk_fixed_factor_ops, + .parent_names = (const char *[]){ "fixed_pll" }, + .num_parents = 1, ++ .flags = CLK_IS_CRITICAL, + }, + }; + |