uClibc-alpine/libc/string/sh, branch master

sh: fix memcpy saving/restoring FR12-FR15 registers

2010-12-14T07:08:36+00:00

This patch fixes a bug in the memcpy that doesn't save/restore
the FR12-FR15 registers (callee save registers in ST40 ABI) while
copying many cache lines with FPU in single paired precision mode
and by using all FPU registers (DR and XD).

Signed-off-by: Giuseppe Cavallaro 
Reviewed-by: Carmelo Amoroso 

Signed-off-by: Carmelo Amoroso

sh: update the memcpy adding a new loop with aggressive prefetching

2010-09-15T10:51:04+00:00

After exploring different prefetch distance-degree combinations
in this new update of the memcpy function, a new loop has been added
for moving many cache lines with an aggressive prefetching schema.
Prefetch has been removed when move few cache line aligned blocks.
As final result, this memcpy gives us the same performances for small
sizes (we already had!) and better numbers for big copies.
In case of SH4-300 CPU Series, benchmarks show a gain of ~20% for sizes
from 4KiB to 256KiB.
In case of the SH4-200, there is a gain of ~40% for sizes bigger than
32KiB.

Signed-off-by: Giuseppe Cavallaro 
Signed-off-by: Carmelo Amoroso

sh: move data without fetching cache block within the memset

2010-09-15T10:42:09+00:00

With this patch the movca.l instruction is used within the memset.
The current memset implementation only uses the FPU and there is
an real gain for all the sizes.
Adding the movca.l instruction numbers always are better than the generic code.
There is a big gain for size greater than 64 KiB but number are worst for 4-32KiB
sizes compared with the implementation without movca.l.

	Time Memory Bandwidth (Mbytes)
-------------------------------------------------
	    Generic         SH4          SH4
	                   (FPU)     (FPU+movca.l)
-------------------------------------------------
512         1143	 1998          1596
1 KiB       1273	 2567          1915
2 KiB       1350	 2993          2128
4-32KiB     1391	 3262          2252
64KiB-16MiB 170		 186	      *830*

Signed-off-by: Giuseppe Cavallaro 
Signed-off-by: Carmelo Amoroso

use uniform form of C99 keywords

2010-06-24T13:10:48+00:00

Signed-off-by: Bernhard Reutner-Fischer

sh4: Fixes for SH-4 without an FPU

2010-06-14T07:39:44+00:00

This patch disables SH-4 optimizations that rely on the FPU when
building for variants that don't have an FPU, such as SH-4AL.

Signed-off-by: Andrew Stubbs 
Signed-off-by: Carmelo Amoroso

sh: Add new optimisation to the SH4 memcpy

2009-11-22T20:17:38+00:00

This optimization is based on prefetching and 64bit data transfer via FPU
(only for the little endianess)

Tests shows that:

  ----------------------------------------
  Memory bandwidth    |        Gain
                      | sh4-300 | sh4-200
  ----------------------------------------
  512 bytes to 16KiB  | ~20%    | ~25%
  from 32KiB to 16MiB | ~190%   | ~5%
  ----------------------------------------

Signed-off-by: Austin Foxley 
Signed-off-by: Giuseppe Cavallaro 
Signed-off-by: Carmelo Amoroso

sh: Fix up optimized SH-4 memcpy on big endian.

2009-07-14T05:56:25+00:00

Signed-off-by: Hideo Saito 
Signed-off-by: Paul Mundt 
Signed-off-by: Giuseppe Cavallaro 

See Linux Kernel commit:
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=e08b954c9a140f2062649faec72514eb505f18c3
Signed-off-by: Carmelo Amoroso

Add optimized memcpy implementation for sh4 (from Stuart Menefy @STMicroelectronics).

2008-09-09T16:55:27+00:00

This implementation is based on 'backward copying'.

Signed-off-by: Carmelo Amoroso