diff options
author | Khem Raj <kraj@mvista.com> | 2008-12-09 03:37:32 +0000 |
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committer | Khem Raj <kraj@mvista.com> | 2008-12-09 03:37:32 +0000 |
commit | 3457c21572aaed60e16b6b0e53478bf9ba5c820f (patch) | |
tree | 48bcf36bdbead8b85ae035f55437d91a47ab59c9 | |
parent | 8fa1c38997f005c90cb5828be149ab32496bcd40 (diff) | |
download | uClibc-alpine-3457c21572aaed60e16b6b0e53478bf9ba5c820f.tar.bz2 uClibc-alpine-3457c21572aaed60e16b6b0e53478bf9ba5c820f.tar.xz |
Signed-off-by: Khem Raj <raj.khem@gmail.com>
This patch makes mips nptl port compile again
Replace remaining instances of asm by __asm__ and volatile by __volatile__
include bits/errno.h instead of obsolete bits/errno_values.h
-rw-r--r-- | libc/sysdeps/linux/mips/syscall_error.S | 2 | ||||
-rw-r--r-- | libpthread/nptl/sysdeps/mips/tls.h | 2 | ||||
-rw-r--r-- | libpthread/nptl/sysdeps/pthread/pt-initfini.c | 2 | ||||
-rw-r--r-- | libpthread/nptl/sysdeps/unix/sysv/linux/mips/sysdep.h | 80 |
4 files changed, 43 insertions, 43 deletions
diff --git a/libc/sysdeps/linux/mips/syscall_error.S b/libc/sysdeps/linux/mips/syscall_error.S index ca4a47800..c96b6ed12 100644 --- a/libc/sysdeps/linux/mips/syscall_error.S +++ b/libc/sysdeps/linux/mips/syscall_error.S @@ -20,7 +20,7 @@ #include <sys/asm.h> #include <sysdep.h> -#include <bits/errno_values.h> +#include <bits/errno.h> #ifdef __UCLIBC_HAS_THREADS__ diff --git a/libpthread/nptl/sysdeps/mips/tls.h b/libpthread/nptl/sysdeps/mips/tls.h index cf90ad2bc..0a83ac672 100644 --- a/libpthread/nptl/sysdeps/mips/tls.h +++ b/libpthread/nptl/sysdeps/mips/tls.h @@ -39,7 +39,7 @@ typedef union dtv /* Note: rd must be $v1 to be ABI-conformant. */ # define READ_THREAD_POINTER() \ ({ void *__result; \ - asm volatile (".set\tpush\n\t.set\tmips32r2\n\t" \ + __asm__ __volatile__ (".set\tpush\n\t.set\tmips32r2\n\t" \ "rdhwr\t%0, $29\n\t.set\tpop" : "=v" (__result)); \ __result; }) diff --git a/libpthread/nptl/sysdeps/pthread/pt-initfini.c b/libpthread/nptl/sysdeps/pthread/pt-initfini.c index 1e35edd3e..5955a7efc 100644 --- a/libpthread/nptl/sysdeps/pthread/pt-initfini.c +++ b/libpthread/nptl/sysdeps/pthread/pt-initfini.c @@ -40,7 +40,7 @@ /* We use embedded asm for .section unconditionally, as this makes it easier to insert the necessary directives into crtn.S. */ -#define SECTION(x) asm (".section " x ) +#define SECTION(x) __asm__ (".section " x ) /* Embed an #include to pull in the alignment and .end directives. */ asm ("\n#include \"defs.h\""); diff --git a/libpthread/nptl/sysdeps/unix/sysv/linux/mips/sysdep.h b/libpthread/nptl/sysdeps/unix/sysv/linux/mips/sysdep.h index 01c1a2891..bfaab1f3a 100644 --- a/libpthread/nptl/sysdeps/unix/sysv/linux/mips/sysdep.h +++ b/libpthread/nptl/sysdeps/unix/sysv/linux/mips/sysdep.h @@ -81,8 +81,8 @@ long _sys_result; \ \ { \ - register long __v0 asm("$2") ncs_init; \ - register long __a3 asm("$7"); \ + register long __v0 __asm__("$2") ncs_init; \ + register long __a3 __asm__("$7"); \ __asm__ volatile ( \ ".set\tnoreorder\n\t" \ cs_init \ @@ -103,9 +103,9 @@ long _sys_result; \ \ { \ - register long __v0 asm("$2") ncs_init; \ - register long __a0 asm("$4") = (long) arg1; \ - register long __a3 asm("$7"); \ + register long __v0 __asm__("$2") ncs_init; \ + register long __a0 __asm__("$4") = (long) arg1; \ + register long __a3 __asm__("$7"); \ __asm__ volatile ( \ ".set\tnoreorder\n\t" \ cs_init \ @@ -126,15 +126,15 @@ long _sys_result; \ \ { \ - register long __v0 asm("$2") ncs_init; \ - register long __a0 asm("$4") = (long) arg1; \ - register long __a1 asm("$5") = (long) arg2; \ - register long __a3 asm("$7"); \ + register long __v0 __asm__("$2") ncs_init; \ + register long __a0 __asm__("$4") = (long) arg1; \ + register long __a1 __asm__("$5") = (long) arg2; \ + register long __a3 __asm__("$7"); \ __asm__ volatile ( \ ".set\tnoreorder\n\t" \ cs_init \ "syscall\n\t" \ - ".set\treorder" \ + ".set\treorder" \ : "=r" (__v0), "=r" (__a3) \ : input, "r" (__a0), "r" (__a1) \ : __SYSCALL_CLOBBERS); \ @@ -150,16 +150,16 @@ long _sys_result; \ \ { \ - register long __v0 asm("$2") ncs_init; \ - register long __a0 asm("$4") = (long) arg1; \ - register long __a1 asm("$5") = (long) arg2; \ - register long __a2 asm("$6") = (long) arg3; \ - register long __a3 asm("$7"); \ + register long __v0 __asm__("$2") ncs_init; \ + register long __a0 __asm__("$4") = (long) arg1; \ + register long __a1 __asm__("$5") = (long) arg2; \ + register long __a2 __asm__("$6") = (long) arg3; \ + register long __a3 __asm__("$7"); \ __asm__ volatile ( \ ".set\tnoreorder\n\t" \ cs_init \ "syscall\n\t" \ - ".set\treorder" \ + ".set\treorder" \ : "=r" (__v0), "=r" (__a3) \ : input, "r" (__a0), "r" (__a1), "r" (__a2) \ : __SYSCALL_CLOBBERS); \ @@ -175,16 +175,16 @@ long _sys_result; \ \ { \ - register long __v0 asm("$2") ncs_init; \ - register long __a0 asm("$4") = (long) arg1; \ - register long __a1 asm("$5") = (long) arg2; \ - register long __a2 asm("$6") = (long) arg3; \ - register long __a3 asm("$7") = (long) arg4; \ + register long __v0 __asm__("$2") ncs_init; \ + register long __a0 __asm__("$4") = (long) arg1; \ + register long __a1 __asm__("$5") = (long) arg2; \ + register long __a2 __asm__("$6") = (long) arg3; \ + register long __a3 __asm__("$7") = (long) arg4; \ __asm__ volatile ( \ ".set\tnoreorder\n\t" \ cs_init \ "syscall\n\t" \ - ".set\treorder" \ + ".set\treorder" \ : "=r" (__v0), "+r" (__a3) \ : input, "r" (__a0), "r" (__a1), "r" (__a2) \ : __SYSCALL_CLOBBERS); \ @@ -207,11 +207,11 @@ \ FORCE_FRAME_POINTER; \ { \ - register long __v0 asm("$2") ncs_init; \ - register long __a0 asm("$4") = (long) arg1; \ - register long __a1 asm("$5") = (long) arg2; \ - register long __a2 asm("$6") = (long) arg3; \ - register long __a3 asm("$7") = (long) arg4; \ + register long __v0 __asm__("$2") ncs_init; \ + register long __a0 __asm__("$4") = (long) arg1; \ + register long __a1 __asm__("$5") = (long) arg2; \ + register long __a2 __asm__("$6") = (long) arg3; \ + register long __a3 __asm__("$7") = (long) arg4; \ __asm__ volatile ( \ ".set\tnoreorder\n\t" \ "subu\t$29, 32\n\t" \ @@ -219,7 +219,7 @@ cs_init \ "syscall\n\t" \ "addiu\t$29, 32\n\t" \ - ".set\treorder" \ + ".set\treorder" \ : "=r" (__v0), "+r" (__a3) \ : input, "r" (__a0), "r" (__a1), "r" (__a2), \ "r" ((long)arg5) \ @@ -237,11 +237,11 @@ \ FORCE_FRAME_POINTER; \ { \ - register long __v0 asm("$2") ncs_init; \ - register long __a0 asm("$4") = (long) arg1; \ - register long __a1 asm("$5") = (long) arg2; \ - register long __a2 asm("$6") = (long) arg3; \ - register long __a3 asm("$7") = (long) arg4; \ + register long __v0 __asm__("$2") ncs_init; \ + register long __a0 __asm__("$4") = (long) arg1; \ + register long __a1 __asm__("$5") = (long) arg2; \ + register long __a2 __asm__("$6") = (long) arg3; \ + register long __a3 __asm__("$7") = (long) arg4; \ __asm__ volatile ( \ ".set\tnoreorder\n\t" \ "subu\t$29, 32\n\t" \ @@ -250,7 +250,7 @@ cs_init \ "syscall\n\t" \ "addiu\t$29, 32\n\t" \ - ".set\treorder" \ + ".set\treorder" \ : "=r" (__v0), "+r" (__a3) \ : input, "r" (__a0), "r" (__a1), "r" (__a2), \ "r" ((long)arg5), "r" ((long)arg6) \ @@ -268,11 +268,11 @@ \ FORCE_FRAME_POINTER; \ { \ - register long __v0 asm("$2") ncs_init; \ - register long __a0 asm("$4") = (long) arg1; \ - register long __a1 asm("$5") = (long) arg2; \ - register long __a2 asm("$6") = (long) arg3; \ - register long __a3 asm("$7") = (long) arg4; \ + register long __v0 __asm__("$2") ncs_init; \ + register long __a0 __asm__("$4") = (long) arg1; \ + register long __a1 __asm__("$5") = (long) arg2; \ + register long __a2 __asm__("$6") = (long) arg3; \ + register long __a3 __asm__("$7") = (long) arg4; \ __asm__ volatile ( \ ".set\tnoreorder\n\t" \ "subu\t$29, 32\n\t" \ @@ -282,7 +282,7 @@ cs_init \ "syscall\n\t" \ "addiu\t$29, 32\n\t" \ - ".set\treorder" \ + ".set\treorder" \ : "=r" (__v0), "+r" (__a3) \ : input, "r" (__a0), "r" (__a1), "r" (__a2), \ "r" ((long)arg5), "r" ((long)arg6), "r" ((long)arg7) \ |