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| author | Carmelo Amoroso <carmelo.amoroso@st.com> | 2008-06-18 15:52:41 +0000 |
|---|---|---|
| committer | Carmelo Amoroso <carmelo.amoroso@st.com> | 2008-06-18 15:52:41 +0000 |
| commit | 43ee769f540704ccfc4e2a12ba11ed4b6eece196 (patch) | |
| tree | 59e0fec96510e3f8c2cdb6dacbfb3031058ed092 /libc/sysdeps/linux/mips/sys/asm.h | |
| parent | 80ee234a186cf81220a37cd561fb8c91f9e9cadc (diff) | |
| download | uClibc-alpine-43ee769f540704ccfc4e2a12ba11ed4b6eece196.tar.bz2 uClibc-alpine-43ee769f540704ccfc4e2a12ba11ed4b6eece196.tar.xz | |
Synch libc mips specific with trunk
Diffstat (limited to 'libc/sysdeps/linux/mips/sys/asm.h')
| -rw-r--r-- | libc/sysdeps/linux/mips/sys/asm.h | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/libc/sysdeps/linux/mips/sys/asm.h b/libc/sysdeps/linux/mips/sys/asm.h index e961f3694..76f6af3e1 100644 --- a/libc/sysdeps/linux/mips/sys/asm.h +++ b/libc/sysdeps/linux/mips/sys/asm.h @@ -470,20 +470,4 @@ symbol = value # define MTC0 dmtc0 #endif -/* The MIPS archtectures do not have a uniform memory model. Particular - platforms may provide additional guarantees - for instance, the R4000 - LL and SC instructions implicitly perform a SYNC, and the 4K promises - strong ordering. - - However, in the absence of those guarantees, we must assume weak ordering - and SYNC explicitly where necessary. - - Some obsolete MIPS processors may not support the SYNC instruction. This - applies to "true" MIPS I processors; most of the processors which compile - using MIPS I implement parts of MIPS II. */ - -#ifndef MIPS_SYNC -# define MIPS_SYNC sync -#endif - #endif /* sys/asm.h */ |