diff options
Diffstat (limited to 'libc/sysdeps/linux/powerpc')
| -rw-r--r-- | libc/sysdeps/linux/powerpc/bits/atomic.h | 44 | ||||
| -rw-r--r-- | libc/sysdeps/linux/powerpc/bits/kernel_stat.h | 4 | ||||
| -rw-r--r-- | libc/sysdeps/linux/powerpc/bits/kernel_types.h | 4 | ||||
| -rw-r--r-- | libc/sysdeps/linux/powerpc/bits/mathinline.h | 4 | ||||
| -rw-r--r-- | libc/sysdeps/linux/powerpc/bits/sem.h | 2 | ||||
| -rw-r--r-- | libc/sysdeps/linux/powerpc/pread_write.c | 48 | ||||
| -rw-r--r-- | libc/sysdeps/linux/powerpc/sys/procfs.h | 6 | ||||
| -rw-r--r-- | libc/sysdeps/linux/powerpc/sys/ucontext.h | 40 |
8 files changed, 76 insertions, 76 deletions
diff --git a/libc/sysdeps/linux/powerpc/bits/atomic.h b/libc/sysdeps/linux/powerpc/bits/atomic.h index 977bda72f..d8a4ed33e 100644 --- a/libc/sysdeps/linux/powerpc/bits/atomic.h +++ b/libc/sysdeps/linux/powerpc/bits/atomic.h @@ -50,7 +50,7 @@ # define __arch_compare_and_exchange_bool_32_acq(mem, newval, oldval) \ ({ \ unsigned int __tmp, __tmp2; \ - __asm __volatile (" clrldi %1,%1,32\n" \ + __asm__ __volatile__ (" clrldi %1,%1,32\n" \ "1: lwarx %0,0,%2\n" \ " subf. %0,%1,%0\n" \ " bne 2f\n" \ @@ -66,7 +66,7 @@ # define __arch_compare_and_exchange_bool_32_rel(mem, newval, oldval) \ ({ \ unsigned int __tmp, __tmp2; \ - __asm __volatile (__ARCH_REL_INSTR "\n" \ + __asm__ __volatile__ (__ARCH_REL_INSTR "\n" \ " clrldi %1,%1,32\n" \ "1: lwarx %0,0,%2\n" \ " subf. %0,%1,%0\n" \ @@ -88,7 +88,7 @@ # define __arch_compare_and_exchange_bool_64_acq(mem, newval, oldval) \ ({ \ unsigned long __tmp; \ - __asm __volatile ( \ + __asm__ __volatile__ ( \ "1: ldarx %0,0,%1\n" \ " subf. %0,%2,%0\n" \ " bne 2f\n" \ @@ -104,7 +104,7 @@ # define __arch_compare_and_exchange_bool_64_rel(mem, newval, oldval) \ ({ \ unsigned long __tmp; \ - __asm __volatile (__ARCH_REL_INSTR "\n" \ + __asm__ __volatile__ (__ARCH_REL_INSTR "\n" \ "1: ldarx %0,0,%1\n" \ " subf. %0,%2,%0\n" \ " bne 2f\n" \ @@ -121,7 +121,7 @@ ({ \ __typeof (*(mem)) __tmp; \ __typeof (mem) __memp = (mem); \ - __asm __volatile ( \ + __asm__ __volatile__ ( \ "1: ldarx %0,0,%1\n" \ " cmpd %0,%2\n" \ " bne 2f\n" \ @@ -138,7 +138,7 @@ ({ \ __typeof (*(mem)) __tmp; \ __typeof (mem) __memp = (mem); \ - __asm __volatile (__ARCH_REL_INSTR "\n" \ + __asm__ __volatile__ (__ARCH_REL_INSTR "\n" \ "1: ldarx %0,0,%1\n" \ " cmpd %0,%2\n" \ " bne 2f\n" \ @@ -154,7 +154,7 @@ # define __arch_atomic_exchange_64_acq(mem, value) \ ({ \ __typeof (*mem) __val; \ - __asm __volatile (__ARCH_REL_INSTR "\n" \ + __asm__ __volatile__ (__ARCH_REL_INSTR "\n" \ "1: ldarx %0,0,%2\n" \ " stdcx. %3,0,%2\n" \ " bne- 1b\n" \ @@ -168,7 +168,7 @@ # define __arch_atomic_exchange_64_rel(mem, value) \ ({ \ __typeof (*mem) __val; \ - __asm __volatile (__ARCH_REL_INSTR "\n" \ + __asm__ __volatile__ (__ARCH_REL_INSTR "\n" \ "1: ldarx %0,0,%2\n" \ " stdcx. %3,0,%2\n" \ " bne- 1b" \ @@ -181,7 +181,7 @@ # define __arch_atomic_exchange_and_add_64(mem, value) \ ({ \ __typeof (*mem) __val, __tmp; \ - __asm __volatile ("1: ldarx %0,0,%3\n" \ + __asm__ __volatile__ ("1: ldarx %0,0,%3\n" \ " add %1,%0,%4\n" \ " stdcx. %1,0,%3\n" \ " bne- 1b" \ @@ -194,7 +194,7 @@ # define __arch_atomic_increment_val_64(mem) \ ({ \ __typeof (*(mem)) __val; \ - __asm __volatile ("1: ldarx %0,0,%2\n" \ + __asm__ __volatile__ ("1: ldarx %0,0,%2\n" \ " addi %0,%0,1\n" \ " stdcx. %0,0,%2\n" \ " bne- 1b" \ @@ -207,7 +207,7 @@ # define __arch_atomic_decrement_val_64(mem) \ ({ \ __typeof (*(mem)) __val; \ - __asm __volatile ("1: ldarx %0,0,%2\n" \ + __asm__ __volatile__ ("1: ldarx %0,0,%2\n" \ " subi %0,%0,1\n" \ " stdcx. %0,0,%2\n" \ " bne- 1b" \ @@ -219,7 +219,7 @@ # define __arch_atomic_decrement_if_positive_64(mem) \ ({ int __val, __tmp; \ - __asm __volatile ("1: ldarx %0,0,%3\n" \ + __asm__ __volatile__ ("1: ldarx %0,0,%3\n" \ " cmpdi 0,%0,0\n" \ " addi %1,%0,-1\n" \ " ble 2f\n" \ @@ -273,7 +273,7 @@ # define __arch_compare_and_exchange_bool_32_acq(mem, newval, oldval) \ ({ \ unsigned int __tmp; \ - __asm __volatile ( \ + __asm__ __volatile__ ( \ "1: lwarx %0,0,%1\n" \ " subf. %0,%2,%0\n" \ " bne 2f\n" \ @@ -289,7 +289,7 @@ # define __arch_compare_and_exchange_bool_32_rel(mem, newval, oldval) \ ({ \ unsigned int __tmp; \ - __asm __volatile (__ARCH_REL_INSTR "\n" \ + __asm__ __volatile__ (__ARCH_REL_INSTR "\n" \ "1: lwarx %0,0,%1\n" \ " subf. %0,%2,%0\n" \ " bne 2f\n" \ @@ -394,7 +394,7 @@ typedef uintmax_t uatomic_max_t; ({ \ __typeof (*(mem)) __tmp; \ __typeof (mem) __memp = (mem); \ - __asm __volatile ( \ + __asm__ __volatile__ ( \ "1: lwarx %0,0,%1\n" \ " cmpw %0,%2\n" \ " bne 2f\n" \ @@ -411,7 +411,7 @@ typedef uintmax_t uatomic_max_t; ({ \ __typeof (*(mem)) __tmp; \ __typeof (mem) __memp = (mem); \ - __asm __volatile (__ARCH_REL_INSTR "\n" \ + __asm__ __volatile__ (__ARCH_REL_INSTR "\n" \ "1: lwarx %0,0,%1\n" \ " cmpw %0,%2\n" \ " bne 2f\n" \ @@ -427,7 +427,7 @@ typedef uintmax_t uatomic_max_t; #define __arch_atomic_exchange_32_acq(mem, value) \ ({ \ __typeof (*mem) __val; \ - __asm __volatile ( \ + __asm__ __volatile__ ( \ "1: lwarx %0,0,%2\n" \ " stwcx. %3,0,%2\n" \ " bne- 1b\n" \ @@ -441,7 +441,7 @@ typedef uintmax_t uatomic_max_t; #define __arch_atomic_exchange_32_rel(mem, value) \ ({ \ __typeof (*mem) __val; \ - __asm __volatile (__ARCH_REL_INSTR "\n" \ + __asm__ __volatile__ (__ARCH_REL_INSTR "\n" \ "1: lwarx %0,0,%2\n" \ " stwcx. %3,0,%2\n" \ " bne- 1b" \ @@ -454,7 +454,7 @@ typedef uintmax_t uatomic_max_t; #define __arch_atomic_exchange_and_add_32(mem, value) \ ({ \ __typeof (*mem) __val, __tmp; \ - __asm __volatile ("1: lwarx %0,0,%3\n" \ + __asm__ __volatile__ ("1: lwarx %0,0,%3\n" \ " add %1,%0,%4\n" \ " stwcx. %1,0,%3\n" \ " bne- 1b" \ @@ -467,7 +467,7 @@ typedef uintmax_t uatomic_max_t; #define __arch_atomic_increment_val_32(mem) \ ({ \ __typeof (*(mem)) __val; \ - __asm __volatile ("1: lwarx %0,0,%2\n" \ + __asm__ __volatile__ ("1: lwarx %0,0,%2\n" \ " addi %0,%0,1\n" \ " stwcx. %0,0,%2\n" \ " bne- 1b" \ @@ -480,7 +480,7 @@ typedef uintmax_t uatomic_max_t; #define __arch_atomic_decrement_val_32(mem) \ ({ \ __typeof (*(mem)) __val; \ - __asm __volatile ("1: lwarx %0,0,%2\n" \ + __asm__ __volatile__ ("1: lwarx %0,0,%2\n" \ " subi %0,%0,1\n" \ " stwcx. %0,0,%2\n" \ " bne- 1b" \ @@ -492,7 +492,7 @@ typedef uintmax_t uatomic_max_t; #define __arch_atomic_decrement_if_positive_32(mem) \ ({ int __val, __tmp; \ - __asm __volatile ("1: lwarx %0,0,%3\n" \ + __asm__ __volatile__ ("1: lwarx %0,0,%3\n" \ " cmpwi 0,%0,0\n" \ " addi %1,%0,-1\n" \ " ble 2f\n" \ diff --git a/libc/sysdeps/linux/powerpc/bits/kernel_stat.h b/libc/sysdeps/linux/powerpc/bits/kernel_stat.h index d3c3f911c..bfa67229d 100644 --- a/libc/sysdeps/linux/powerpc/bits/kernel_stat.h +++ b/libc/sysdeps/linux/powerpc/bits/kernel_stat.h @@ -5,8 +5,8 @@ #error bits/kernel_stat.h is for internal uClibc use only! #endif -/* This file provides whatever this particular arch's kernel thinks - * struct kernel_stat should look like... It turns out each arch has a +/* This file provides whatever this particular arch's kernel thinks + * struct kernel_stat should look like... It turns out each arch has a * different opinion on the subject... */ #if __WORDSIZE == 64 #define kernel_stat kernel_stat64 diff --git a/libc/sysdeps/linux/powerpc/bits/kernel_types.h b/libc/sysdeps/linux/powerpc/bits/kernel_types.h index 223037545..3f3b93377 100644 --- a/libc/sysdeps/linux/powerpc/bits/kernel_types.h +++ b/libc/sysdeps/linux/powerpc/bits/kernel_types.h @@ -1,6 +1,6 @@ /* Note that we use the exact same include guard #define names - * as asm/posix_types.h. This will avoid gratuitous conflicts - * with the posix_types.h kernel header, and will ensure that + * as asm/posix_types.h. This will avoid gratuitous conflicts + * with the posix_types.h kernel header, and will ensure that * our private content, and not the kernel header, will win. * -Erik */ diff --git a/libc/sysdeps/linux/powerpc/bits/mathinline.h b/libc/sysdeps/linux/powerpc/bits/mathinline.h index e2536a3cc..d1b05f388 100644 --- a/libc/sysdeps/linux/powerpc/bits/mathinline.h +++ b/libc/sysdeps/linux/powerpc/bits/mathinline.h @@ -148,7 +148,7 @@ __NTH (__ieee754_sqrt (double __x)) { /* Volatile is required to prevent the compiler from moving the fsqrt instruction above the branch. */ - __asm __volatile ( + __asm__ __volatile__ ( " fsqrt %0,%1\n" : "=f" (__z) : "f" (__x)); @@ -170,7 +170,7 @@ __NTH (__ieee754_sqrtf (float __x)) { /* Volatile is required to prevent the compiler from moving the fsqrts instruction above the branch. */ - __asm __volatile ( + __asm__ __volatile__ ( " fsqrts %0,%1\n" : "=f" (__z) : "f" (__x)); diff --git a/libc/sysdeps/linux/powerpc/bits/sem.h b/libc/sysdeps/linux/powerpc/bits/sem.h index 1c648cd19..92a7a9043 100644 --- a/libc/sysdeps/linux/powerpc/bits/sem.h +++ b/libc/sysdeps/linux/powerpc/bits/sem.h @@ -1,4 +1,4 @@ -/* Copyright (C) 1995, 1996, 1997, 1998, 2000, 2002 +/* Copyright (C) 1995, 1996, 1997, 1998, 2000, 2002 Free Software Foundation, Inc. This file is part of the GNU C Library. diff --git a/libc/sysdeps/linux/powerpc/pread_write.c b/libc/sysdeps/linux/powerpc/pread_write.c index e9f8cbef8..cdbadfdf3 100644 --- a/libc/sysdeps/linux/powerpc/pread_write.c +++ b/libc/sysdeps/linux/powerpc/pread_write.c @@ -6,7 +6,7 @@ */ /* Based in part on the files * ./sysdeps/unix/sysv/linux/pwrite.c, - * ./sysdeps/unix/sysv/linux/pread.c, + * ./sysdeps/unix/sysv/linux/pread.c, * sysdeps/posix/pread.c * sysdeps/posix/pwrite.c * from GNU libc 2.2.5, but reworked considerably... @@ -15,26 +15,26 @@ #include <sys/syscall.h> #include <unistd.h> -#ifndef __UCLIBC_HAS_LFS__ +#ifndef __UCLIBC_HAS_LFS__ # define off64_t off_t #endif #ifdef __NR_pread extern __typeof(pread) __libc_pread; -# define __NR___syscall_pread __NR_pread -static inline _syscall4(ssize_t, __syscall_pread, int, fd, +# define __NR___syscall_pread __NR_pread +static __inline__ _syscall4(ssize_t, __syscall_pread, int, fd, void *, buf, size_t, count, off64_t, offset); ssize_t __libc_pread(int fd, void *buf, size_t count, off_t offset) -{ +{ return(__syscall_pread(fd, buf, count, (off64_t)offset)); } weak_alias(__libc_pread,pread) -# ifdef __UCLIBC_HAS_LFS__ +# ifdef __UCLIBC_HAS_LFS__ extern __typeof(pread64) __libc_pread64; ssize_t __libc_pread64(int fd, void *buf, size_t count, off64_t offset) -{ +{ return(__syscall_pread(fd, buf, count, offset)); } weak_alias(__libc_pread64,pread64) @@ -44,20 +44,20 @@ weak_alias(__libc_pread64,pread64) #ifdef __NR_pwrite extern __typeof(pwrite) __libc_pwrite; -# define __NR___syscall_pwrite __NR_pwrite -static inline _syscall4(ssize_t, __syscall_pwrite, int, fd, +# define __NR___syscall_pwrite __NR_pwrite +static __inline__ _syscall4(ssize_t, __syscall_pwrite, int, fd, const void *, buf, size_t, count, off64_t, offset); ssize_t __libc_pwrite(int fd, const void *buf, size_t count, off_t offset) -{ +{ return(__syscall_pwrite(fd, buf, count, (off64_t)offset)); } weak_alias(__libc_pwrite,pwrite) -# ifdef __UCLIBC_HAS_LFS__ +# ifdef __UCLIBC_HAS_LFS__ extern __typeof(pwrite64) __libc_pwrite64; ssize_t __libc_pwrite64(int fd, const void *buf, size_t count, off64_t offset) -{ +{ return(__syscall_pwrite(fd, buf, count, offset)); } weak_alias(__libc_pwrite64,pwrite64) @@ -71,14 +71,14 @@ libc_hidden_proto(read) libc_hidden_proto(write) libc_hidden_proto(lseek) -static ssize_t __fake_pread_write(int fd, void *buf, +static ssize_t __fake_pread_write(int fd, void *buf, size_t count, off_t offset, int do_pwrite) { int save_errno; ssize_t result; off_t old_offset; - /* Since we must not change the file pointer preserve the + /* Since we must not change the file pointer preserve the * value so that we can restore it later. */ if ((old_offset=lseek(fd, 0, SEEK_CUR)) == (off_t) -1) return -1; @@ -95,7 +95,7 @@ static ssize_t __fake_pread_write(int fd, void *buf, result = read(fd, buf, count); } - /* Now we have to restore the position. If this fails we + /* Now we have to restore the position. If this fails we * have to return this as an error. */ save_errno = errno; if (lseek(fd, old_offset, SEEK_SET) == (off_t) -1) @@ -108,24 +108,24 @@ static ssize_t __fake_pread_write(int fd, void *buf, return(result); } -# ifdef __UCLIBC_HAS_LFS__ +# ifdef __UCLIBC_HAS_LFS__ libc_hidden_proto(lseek64) -static ssize_t __fake_pread_write64(int fd, void *buf, +static ssize_t __fake_pread_write64(int fd, void *buf, size_t count, off64_t offset, int do_pwrite) { int save_errno; ssize_t result; off64_t old_offset; - /* Since we must not change the file pointer preserve the + /* Since we must not change the file pointer preserve the * value so that we can restore it later. */ if ((old_offset=lseek64(fd, 0, SEEK_CUR)) == (off64_t) -1) return -1; /* Set to wanted position. */ - if (lseek64(fd, offset, SEEK_SET) == (off64_t) -1) - return -1; + if (lseek64(fd, offset, SEEK_SET) == (off64_t) -1) + return -1; if (do_pwrite==1) { /* Write the data. */ @@ -155,9 +155,9 @@ ssize_t __libc_pread(int fd, void *buf, size_t count, off_t offset) } weak_alias(__libc_pread,pread) -# ifdef __UCLIBC_HAS_LFS__ +# ifdef __UCLIBC_HAS_LFS__ ssize_t __libc_pread64(int fd, void *buf, size_t count, off64_t offset) -{ +{ return(__fake_pread_write64(fd, buf, count, offset, 0)); } weak_alias(__libc_pread64,pread64) @@ -172,9 +172,9 @@ ssize_t __libc_pwrite(int fd, const void *buf, size_t count, off_t offset) } weak_alias(__libc_pwrite,pwrite) -# ifdef __UCLIBC_HAS_LFS__ +# ifdef __UCLIBC_HAS_LFS__ ssize_t __libc_pwrite64(int fd, const void *buf, size_t count, off64_t offset) -{ +{ return(__fake_pread_write64(fd, (void*)buf, count, offset, 1)); } weak_alias(__libc_pwrite64,pwrite64) diff --git a/libc/sysdeps/linux/powerpc/sys/procfs.h b/libc/sysdeps/linux/powerpc/sys/procfs.h index d2d597241..118463649 100644 --- a/libc/sysdeps/linux/powerpc/sys/procfs.h +++ b/libc/sysdeps/linux/powerpc/sys/procfs.h @@ -32,9 +32,9 @@ __BEGIN_DECLS -/* These definitions are normally provided by ucontext.h via - asm/sigcontext.h, asm/ptrace.h, and asm/elf.h. Otherwise we define - them here. */ +/* These definitions are normally provided by ucontext.h via + asm/sigcontext.h, asm/ptrace.h, and asm/elf.h. Otherwise we define + them here. */ #ifndef __PPC64_ELF_H #define ELF_NGREG 48 /* includes nip, msr, lr, etc. */ #define ELF_NFPREG 33 /* includes fpscr */ diff --git a/libc/sysdeps/linux/powerpc/sys/ucontext.h b/libc/sysdeps/linux/powerpc/sys/ucontext.h index 9eb50aa96..737512afc 100644 --- a/libc/sysdeps/linux/powerpc/sys/ucontext.h +++ b/libc/sysdeps/linux/powerpc/sys/ucontext.h @@ -62,14 +62,14 @@ typedef struct #else -/* For 64-bit kernels with Altivec support, a machine context is exactly - * a sigcontext. For older kernel (without Altivec) the sigcontext matches - * the mcontext upto but not including the v_regs field. For kernels that - * don't AT_HWCAP or return AT_HWCAP without PPC_FEATURE_HAS_ALTIVEC the +/* For 64-bit kernels with Altivec support, a machine context is exactly + * a sigcontext. For older kernel (without Altivec) the sigcontext matches + * the mcontext upto but not including the v_regs field. For kernels that + * don't AT_HWCAP or return AT_HWCAP without PPC_FEATURE_HAS_ALTIVEC the * v_regs field may not exit and should not be referenced. The v_regd field * can be refernced safely only after verifying that PPC_FEATURE_HAS_ALTIVEC * is set in AT_HWCAP. */ - + /* Number of general registers. */ # define NGREG 48 /* includes r0-r31, nip, msr, lr, etc. */ # define NFPREG 33 /* includes fp0-fp31 &fpscr. */ @@ -79,7 +79,7 @@ typedef unsigned long gregset_t[NGREG]; typedef double fpregset_t[NFPREG]; /* Container for Altivec/VMX Vector Status and Control Register. Only 32-bits - but can only be copied to/from a 128-bit vector register. So we allocated + but can only be copied to/from a 128-bit vector register. So we allocated a whole quadword speedup save/restore. */ typedef struct _libc_vscr { @@ -107,22 +107,22 @@ typedef struct { gregset_t gp_regs; fpregset_t fp_regs; /* - * To maintain compatibility with current implementations the sigcontext is - * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t) - * followed by an unstructured (vmx_reserve) field of 69 doublewords. This - * allows the array of vector registers to be quadword aligned independent of - * the alignment of the containing sigcontext or ucontext. It is the - * responsibility of the code setting the sigcontext to set this pointer to - * either NULL (if this processor does not support the VMX feature) or the + * To maintain compatibility with current implementations the sigcontext is + * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t) + * followed by an unstructured (vmx_reserve) field of 69 doublewords. This + * allows the array of vector registers to be quadword aligned independent of + * the alignment of the containing sigcontext or ucontext. It is the + * responsibility of the code setting the sigcontext to set this pointer to + * either NULL (if this processor does not support the VMX feature) or the * address of the first quadword within the allocated (vmx_reserve) area. * - * The pointer (v_regs) of vector type (elf_vrreg_t) is essentually - * an array of 34 quadword entries. The entries with - * indexes 0-31 contain the corresponding vector registers. The entry with - * index 32 contains the vscr as the last word (offset 12) within the - * quadword. This allows the vscr to be stored as either a quadword (since - * it must be copied via a vector register to/from storage) or as a word. - * The entry with index 33 contains the vrsave as the first word (offset 0) + * The pointer (v_regs) of vector type (elf_vrreg_t) is essentually + * an array of 34 quadword entries. The entries with + * indexes 0-31 contain the corresponding vector registers. The entry with + * index 32 contains the vscr as the last word (offset 12) within the + * quadword. This allows the vscr to be stored as either a quadword (since + * it must be copied via a vector register to/from storage) or as a word. + * The entry with index 33 contains the vrsave as the first word (offset 0) * within the quadword. */ vrregset_t *v_regs; |