1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
|
--- oprofile-0.9.6/libop/op_hw_specific.h
+++ oprofile-0.9.6.new/libop/op_hw_specific.h
@@ -20,7 +20,8 @@
char v[12];
} v;
unsigned eax;
- asm("cpuid" : "=a" (eax), "=b" (v.b), "=c" (v.c), "=d" (v.d) : "0" (0));
+ asm("push %%ebx ; cpuid ; movl %%ebx, %%esi ; pop %%ebx"
+ : "=a" (eax), "=S" (v.b), "=c" (v.c), "=d" (v.d) : "0" (0));
return !strncmp(v.v, vnd, 12);
}
@@ -46,7 +47,7 @@
if (!cpuid_vendor("GenuineIntel"))
return;
- asm("cpuid" : "=a" (v.eax) : "0" (1) : "ecx","ebx","edx");
+ asm("push %%ebx; cpuid; pop %%ebx" : "=a" (v.eax) : "0" (1) : "ecx","edx");
model = (v.ext_model << 4) + v.model;
if (v.family != 6 || model != 26 || v.stepping > 4)
return;
@@ -57,7 +58,8 @@
{
if (cpu_type == CPU_ARCH_PERFMON) {
unsigned ebx, eax;
- asm("cpuid" : "=a" (eax), "=b" (ebx) : "0" (0xa) : "ecx","edx");
+ asm("push %%ebx; cpuid; movl %%ebx, %%edx; pop %%ebx"
+ : "=a" (eax), "=d" (ebx) : "0" (0xa) : "ecx");
workaround_nehalem_aaj79(&ebx);
return ebx & num_to_mask(eax >> 24);
}
@@ -68,7 +70,7 @@
{
if (cpu_type == CPU_ARCH_PERFMON) {
unsigned v;
- asm("cpuid" : "=a" (v) : "0" (0xa) : "ebx","ecx","edx");
+ asm("push %%ebx; cpuid; pop %%ebx" : "=a" (v) : "0" (0xa) : "ecx","edx");
return (v >> 8) & 0xff;
}
return -1;
@@ -77,7 +79,7 @@
static inline unsigned arch_get_counter_mask(void)
{
unsigned v;
- asm("cpuid" : "=a" (v) : "0" (0xa) : "ebx","ecx","edx");
+ asm("push %%ebx; cpuid; pop %%ebx" : "=a" (v) : "0" (0xa) : "ecx","edx");
return num_to_mask((v >> 8) & 0xff);
}
|
