diff options
| author | Timo Teräs <timo.teras@iki.fi> | 2013-09-23 11:47:08 +0000 |
|---|---|---|
| committer | Natanael Copa <ncopa@alpinelinux.org> | 2013-09-23 11:57:24 +0000 |
| commit | 0dceb86c0b230eb083bc86711a57e9abd1b459f3 (patch) | |
| tree | 6bb1372ca2fe1912861cea0b54bcc37952c3ab96 /main/gcc/pr49423.patch | |
| parent | d61fa697f573aeec58efbebee57c4654ffc4750a (diff) | |
| download | aports-0dceb86c0b230eb083bc86711a57e9abd1b459f3.tar.bz2 aports-0dceb86c0b230eb083bc86711a57e9abd1b459f3.tar.xz | |
main/gcc: implement crosscompiler creation and crossbuilding, musl fixes
Diffstat (limited to 'main/gcc/pr49423.patch')
| -rw-r--r-- | main/gcc/pr49423.patch | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/main/gcc/pr49423.patch b/main/gcc/pr49423.patch new file mode 100644 index 0000000000..b399daf2de --- /dev/null +++ b/main/gcc/pr49423.patch @@ -0,0 +1,103 @@ +http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49423 +http://gcc.gnu.org/ml/gcc-patches/2013-06/msg01191.html + +ChangeLog + + gcc/ + * config/arm/arm.c (arm_legitimate_address_outer_p) + (thumb2_legitimate_address_p): Don't allow symbol refs with mode + size smaller than a word. + * config/arm/arm.md (thumb1_zero_extendqisi2, *arm_extendhisi2) + (*arm_extendhisi2_v6, *arm_extendqihi_insn, *arm_extendqisi) + (*arm_extendqisi_v6): Remove pool_range/neg_pool_range attributes. + +Index: gcc/config/arm/arm.c +=================================================================== +--- a/gcc/config/arm/arm.c (revision 200204) ++++ b/gcc/config/arm/arm.c (working copy) +@@ -5947,6 +5947,7 @@ arm_legitimate_address_outer_p (enum mac + #endif + + else if (GET_MODE_CLASS (mode) != MODE_FLOAT ++ && GET_MODE_SIZE (mode) >= UNITS_PER_WORD + && code == SYMBOL_REF + && CONSTANT_POOL_ADDRESS_P (x) + && ! (flag_pic +@@ -6022,6 +6023,7 @@ thumb2_legitimate_address_p (enum machin + } + + else if (GET_MODE_CLASS (mode) != MODE_FLOAT ++ && GET_MODE_SIZE (mode) >= UNITS_PER_WORD + && code == SYMBOL_REF + && CONSTANT_POOL_ADDRESS_P (x) + && ! (flag_pic +Index: gcc/config/arm/arm.md +=================================================================== +--- a/gcc/config/arm/arm.md (revision 200204) ++++ b/gcc/config/arm/arm.md (working copy) +@@ -5432,8 +5432,7 @@ + # + ldrb\\t%0, %1" + [(set_attr "length" "4,2") +- (set_attr "type" "alu_shift,load_byte") +- (set_attr "pool_range" "*,32")] ++ (set_attr "type" "alu_shift,load_byte")] + ) + + (define_insn "*thumb1_zero_extendqisi2_v6" +@@ -5700,9 +5699,7 @@ + ldr%(sh%)\\t%0, %1" + [(set_attr "length" "8,4") + (set_attr "type" "alu_shift,load_byte") +- (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,256") +- (set_attr "neg_pool_range" "*,244")] ++ (set_attr "predicable" "yes")] + ) + + ;; ??? Check Thumb-2 pool range +@@ -5714,9 +5711,7 @@ + sxth%?\\t%0, %1 + ldr%(sh%)\\t%0, %1" + [(set_attr "type" "simple_alu_shift,load_byte") +- (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,256") +- (set_attr "neg_pool_range" "*,244")] ++ (set_attr "predicable" "yes")] + ) + + (define_insn "*arm_extendhisi2addsi" +@@ -5758,9 +5753,7 @@ + "TARGET_ARM && arm_arch4" + "ldr%(sb%)\\t%0, %1" + [(set_attr "type" "load_byte") +- (set_attr "predicable" "yes") +- (set_attr "pool_range" "256") +- (set_attr "neg_pool_range" "244")] ++ (set_attr "predicable" "yes")] + ) + + (define_expand "extendqisi2" +@@ -5800,9 +5793,7 @@ + ldr%(sb%)\\t%0, %1" + [(set_attr "length" "8,4") + (set_attr "type" "alu_shift,load_byte") +- (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,256") +- (set_attr "neg_pool_range" "*,244")] ++ (set_attr "predicable" "yes")] + ) + + (define_insn "*arm_extendqisi_v6" +@@ -5814,9 +5805,7 @@ + sxtb%?\\t%0, %1 + ldr%(sb%)\\t%0, %1" + [(set_attr "type" "simple_alu_shift,load_byte") +- (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,256") +- (set_attr "neg_pool_range" "*,244")] ++ (set_attr "predicable" "yes")] + ) + + (define_insn "*arm_extendqisi2addsi" + |