From a9f466cd349d3237906b2af09ff11d4c5f3f2de4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Timo=20Ter=C3=A4s?= Date: Fri, 22 Jul 2016 07:01:56 +0000 Subject: main/gcc: upgrade to gcc 6 snapshot 20160721 this includes additional arm fixes that fix u-boot compilation. _pkgbase is expected to be the release tarball, and we have cumulative diff to bring up to the snapshot. gcc marks the snapshot releases as 6.1.1 too, so we use this version for our packaging too. gcc -v reports: gcc version 6.1.1 20160721 (Alpine 6.1.1) so the actual snapshot date is visible too. next release is due to be 6.2. --- main/gcc/APKBUILD | 35 +- main/gcc/gcc-6-20160721.patch | 54444 +++++++++++++++++++ ...1056-Don-t-use-vectorized-builtins-when-N.patch | 85 - main/gcc/pr70839.patch | 42 - 4 files changed, 54456 insertions(+), 150 deletions(-) create mode 100644 main/gcc/gcc-6-20160721.patch delete mode 100644 main/gcc/gcc-6.1-71056-Don-t-use-vectorized-builtins-when-N.patch delete mode 100644 main/gcc/pr70839.patch diff --git a/main/gcc/APKBUILD b/main/gcc/APKBUILD index e149e2db90..63f3660f28 100644 --- a/main/gcc/APKBUILD +++ b/main/gcc/APKBUILD @@ -1,6 +1,7 @@ # Maintainer: Natanael Copa pkgname=gcc -pkgver=6.1.0 +pkgver=6.1.1 +_pkgbase=6.1.0 _cross="" [ "$BOOTSTRAP" = "noheaders" ] && pkgname="gcc-pass1" [ "$BOOTSTRAP" = "nolibc" ] && pkgname="gcc-pass2" @@ -8,7 +9,7 @@ _cross="" && _cross="-$CTARGET" pkgname="$pkgname$_cross" -pkgrel=4 +pkgrel=0 pkgdesc="The GNU Compiler Collection" url="http://gcc.gnu.org" arch="all" @@ -143,8 +144,9 @@ if $LANG_ADA; then makedepends="$makedepends gcc-gnat" fi -source="ftp://gcc.gnu.org/pub/gcc/releases/gcc-$pkgver/gcc-$pkgver.tar.bz2 +source="ftp://gcc.gnu.org/pub/gcc/releases/gcc-$pkgver/gcc-${_pkgbase:-$pkgver}.tar.bz2 ftp://sourceware.org/pub/java/ecj-4.9.jar + gcc-6-20160721.patch 001_all_default-ssp-strong.patch 002_all_default-relro.patch @@ -171,7 +173,6 @@ source="ftp://gcc.gnu.org/pub/gcc/releases/gcc-$pkgver/gcc-$pkgver.tar.bz2 libada-cross-shared.patch gcc-4.9-musl-fortify.patch gcc-6.1-musl-libssp.patch - gcc-6.1-71056-Don-t-use-vectorized-builtins-when-N.patch boehm-gc-musl.patch gcc-pure64.patch fix-gcj-stdgnu14-link.patch @@ -183,12 +184,10 @@ source="ftp://gcc.gnu.org/pub/gcc/releases/gcc-$pkgver/gcc-$pkgver.tar.bz2 ada-fixes.patch ada-shared.patch ada-musl.patch - - pr70839.patch " # we build out-of-tree -_gccdir="$srcdir"/gcc-$pkgver +_gccdir="$srcdir"/gcc-${_pkgbase:-$pkgver} _gcclibdir=/usr/lib/gcc/${CTARGET}/$pkgver _gcclibexec=/usr/libexec/gcc/${CTARGET}/$pkgver @@ -200,7 +199,6 @@ prepare() { return 1 fi - # Gentoo, PIE and uclibc patches _err= for i in $source; do case "$i" in @@ -219,12 +217,6 @@ prepare() { return 1 fi - # genautomata crashes with a "Bus Error" when compiled with PIC - # mostly affecting cross-builds as on native build bootstrapping - # somehow seems to build proper genautomata - sed -i gcc/Makefile.in -e 's|^build/genautomata$(build_exeext) .*|& -fno-PIC|' \ - || return 1 - # see http://gcc.gnu.org/ml/java/2008-04/msg00027.html mv "$srcdir"/ecj-*.jar ecj.jar @@ -616,6 +608,7 @@ gnat() { md5sums="8fb6cb98b8459f5863328380fbf06bd1 gcc-6.1.0.tar.bz2 7339f199ba11c941890031fd9981d7be ecj-4.9.jar +7b942873ee7e0df5dfdd8abe4eacff04 gcc-6-20160721.patch 3634a8f58065805809273b105071c1f3 001_all_default-ssp-strong.patch 28ca9eac639e88869ac975d593ff7a89 002_all_default-relro.patch b7235f279097e28295b6bbaa0804302f 003_all_default-fortify-source.patch @@ -639,7 +632,6 @@ a7836fe20d35f91ddf623e3c62a920fe 205-nopie.patch 246aef378ea9730d9bf97bc42fd392d2 libada-cross-shared.patch 9e658e590bc51be611f39945183f6aa2 gcc-4.9-musl-fortify.patch 32c40cd9c22a01621c2b7d60ac4255a0 gcc-6.1-musl-libssp.patch -fad1bba965c4fd341eb027950d35111d gcc-6.1-71056-Don-t-use-vectorized-builtins-when-N.patch 0ea0f556d4ef9c260d1353b7fd33970c boehm-gc-musl.patch 3cb420ef6240a8b96f52fb1b479ddaab gcc-pure64.patch 1e143d6a88cdcbc4e3266b19208df0fd fix-gcj-stdgnu14-link.patch @@ -649,10 +641,10 @@ e17bbb0fe802974e20645b4182b4c410 fix-gcj-iconv-musl.patch 4aea37d334ab00bb6bba37cd8c481367 fix-cxxflags-passing.patch d00d7e4b0c00cb7448576af9cd7fcea8 ada-fixes.patch 20e2731c02ce50739ebdead2795f9c41 ada-shared.patch -221773e09429ae2aba03780fb1089290 ada-musl.patch -243bf5804799d2e70c4e51d3a6ca9d1a pr70839.patch" +221773e09429ae2aba03780fb1089290 ada-musl.patch" sha256sums="09c4c85cabebb971b1de732a0219609f93fc0af5f86f6e437fd8d7f832f1a351 gcc-6.1.0.tar.bz2 9506e75b862f782213df61af67338eb7a23c35ff425d328affc65585477d34cd ecj-4.9.jar +3e2c8350a354b54d8f2ffb3db17d103adf7e45dd4bbe94620b25b3c63d839b28 gcc-6-20160721.patch deb22792f37e107d0afff5f4ea6b2a9fc9de4f48e1c7133bf658b6e0d057b1d6 001_all_default-ssp-strong.patch 2c7fcbc3879cce0775e37306441110dc63e7f457e2e5ad890f6b0800eb520ef6 002_all_default-relro.patch 611d3d101351c134d3c03f6d8265a90268cef71c682bf72e02a6cd2d99315ef8 003_all_default-fortify-source.patch @@ -676,7 +668,6 @@ df92e2f03615c1591278c132cd38ee0ed2c576cd942d8ea751a44d0521057e6b 207-static-pie aa3e570f9ccd9dcaadf00369ed2c4ae26ba640c49256f32aee7e631e2b836771 libada-cross-shared.patch dc93f97dff28b872f9c7e241fb87a3eca0271f706534d196b3517781b05667fa gcc-4.9-musl-fortify.patch 4ece19529edb8e681e1778e977e2ba1d47984ccfcb82505e8b898bb29d659625 gcc-6.1-musl-libssp.patch -2b61762aa8c5fe2f1fe896dfd2aaa3238235fb63842b04a4c79c0b6a0b92a3c5 gcc-6.1-71056-Don-t-use-vectorized-builtins-when-N.patch 6ccca88695ef84c0d038cd315cad5ae5b799672ecb009fdaab34e68ba60b733c boehm-gc-musl.patch 0625ab76ec3f7b47364becdb9ddc66bec9215ebfbeab1d58df8e1855a1cd76bb gcc-pure64.patch c03165e7ce812c93a33fdb0893847b4f9eb892e353d32d85b23249610fb24396 fix-gcj-stdgnu14-link.patch @@ -686,10 +677,10 @@ bd7a6f514fcc457f29e5fda157203f3bcd013aeba5d53b3459196eef3ce752ab gcc-4.8-build- a395ba4cf047c48cac56985726fddf0948f4425c9f1a0c9ddba1812b2b3d8300 fix-cxxflags-passing.patch d2a67a7ae0304cd10532883df19923b98dbc9b7a24957b619d4a6e04f19c5507 ada-fixes.patch d6c7fc1820a4fa285297c299c255fe2f19ce1695486f20edd098252a97545e6a ada-shared.patch -23d99e94060972bb25de4687da88ecb4fce9a7f0afa4b71a05161246917cd75d ada-musl.patch -2c4836eeac884e96fbf35c01862820efd0ff08fa73b580e2747d457f761fe80e pr70839.patch" +23d99e94060972bb25de4687da88ecb4fce9a7f0afa4b71a05161246917cd75d ada-musl.patch" sha512sums="eeed3e2018b8c012aabce419e8d718fde701e5c3c179b4486c61ba46e5736eecc8fccdd18b01fcd973a42c6ad3116dbbe2ee247fe3757d622d373f93ebaf8d2e gcc-6.1.0.tar.bz2 28f8c6fdbcb19e950b1d0bafb3bcc7a8cba87bc673aa6027cece116599cdee80f0cf5e95a1440544890239f5c754e8a93ab46d9daedd937faef445d7ea33b226 ecj-4.9.jar +435ac5e2ec041c70c2508242dbdc3a56da9633bf0549fa9cd8c4e3aa4dfc9a02539bd4d81fba4f5c72eeda4f4c25c5b4998ae2f84ce5f64b4edf574833160b68 gcc-6-20160721.patch a1335adc2fbee98e36c4437ff2587771b98ed4180726779020f65039498235626a411cdb0100dbd20cd19d12f0d94f9a21af179ff624676c28cead9d60598b5d 001_all_default-ssp-strong.patch e36e95b81489163abd6fe9d58f7867bdca43e61143afacbfb17f4698c0b16ec5fd0061d8fab7b2ae615540bebd721c2e2227f80401b4e7fc253da9da62e6b513 002_all_default-relro.patch f86466c62b8291fac46f9c250c7ad8fa5ab7b1cce2504442fd07ddc4543665b317ae28951f244e39aba29aeaf3fff252ec4f6a147aa16adb2b7aed747dd89188 003_all_default-fortify-source.patch @@ -713,7 +704,6 @@ d08d7ead2de0429e5c9055d5b029ec2be9a8c821d22cecaf9b51f633652c493333f98963d9267fa2 497e73650b4e7ac1cc92158b993f543b1506d3af4f9df9cb1e9504af4db657a9fc6e4429b4cb2bf5b3c1c8c06a5cec5d8b19bc958fd57b92d7b4d5e58b34554c libada-cross-shared.patch 600fe5098dc54edaa9808fd5717af9dec058953f9ad37d49cfba1db4f7e9a7a8f02019342f75157fc575946fa693259422184de27b7ecc8386d9f3ecc0f7cc5d gcc-4.9-musl-fortify.patch dbe0ee917fc7668571722364ab7c806731e3a31e8bfa30b4941b28b16b877d2a32b4a3897ef533399a28f82d43cac9b28e92de0493f0e779046db56584e07fa4 gcc-6.1-musl-libssp.patch -df8ca05b82250977354d4677e5e90b3d597c77281ff697c699ef129fe1dbbccd39a736c9257405c76aaf4bc51ab9f128381e40ee72f163a771c7e1f52b15ad17 gcc-6.1-71056-Don-t-use-vectorized-builtins-when-N.patch bda845a6aa1854d2c883910b115f79ccfa93dfc2b5eac69a3a236d83eb34cadc140731d616ffc24698c7abc8878dd15f231bcc5119f1860e575a120b311706c7 boehm-gc-musl.patch cd94f7be10de7511b17355dbb6b86dc70919b4a41c8aec1d7c5961820248aa00cf1594ed66fdd412c12b02a94605600530f674b32ab4cbd0ca6456968475ecbb gcc-pure64.patch 2253941f3d19b6d08801d3782f5f5ed56c3b73fbc9d3561a8f01c702963ac4fab91599c686076e7081eb6a80c37ccd33591ae978996d6eee1dc0ce0f1c50259a fix-gcj-stdgnu14-link.patch @@ -723,5 +713,4 @@ abe9aaf9aa956058d0386a4396a511d176a46bb3906b90e952383646cdc158cbeb0a5dc616a1ccb1 35d6d59f0b7b968f282f56767c9e0823a7bdc5aa0d450aca50fbd802649a7ca608b47671244a3faa208a9b0d6832cabb5a22724157dc817b2c0ad63d09f93282 fix-cxxflags-passing.patch 9016b257abd8fa981de44a49512e35db814d1cbb47c1a87cd31c12d4ae20b13e9e149fe41691a7ec3c95bbcfde8a79194a8d2eaf547ceade3a246fad67c47dd8 ada-fixes.patch 3f5bc334d9f73d06f5f7c876738d02356acdd08958bea0e4d2095ebf15c2c2ec4e411abdae0297505ae9a1699ca01b17338e853184e84663203b192b0d35fc19 ada-shared.patch -a13c6acd864933bd7b12501686da57b09cbff9471c7f630f5bc9a92902a4006a9024a08ee41574707e4c232a754a21633ea89e0bb45dc0d5967e50b299ef6a5e ada-musl.patch -15f91fe67939e153ac096c4cc64600a457b637c9e8a96b0e691c89f2339821b0c7b32477e0f66bf27ed8650d5c5a7e9cbae4006ea4639a386d47bf66a8a1ecc7 pr70839.patch" +a13c6acd864933bd7b12501686da57b09cbff9471c7f630f5bc9a92902a4006a9024a08ee41574707e4c232a754a21633ea89e0bb45dc0d5967e50b299ef6a5e ada-musl.patch" diff --git a/main/gcc/gcc-6-20160721.patch b/main/gcc/gcc-6-20160721.patch new file mode 100644 index 0000000000..423a1e363e --- /dev/null +++ b/main/gcc/gcc-6-20160721.patch @@ -0,0 +1,54444 @@ +diff -ru --unidirectional-new-file --exclude "po" gcc-6.1.0 gcc-6-20160721 + +Only in gcc-6.1.0/INSTALL: binaries.html +Only in gcc-6.1.0/INSTALL: build.html +Only in gcc-6.1.0/INSTALL: configure.html +Only in gcc-6.1.0/INSTALL: download.html +Only in gcc-6.1.0/INSTALL: finalinstall.html +Only in gcc-6.1.0/INSTALL: gfdl.html +Only in gcc-6.1.0/INSTALL: index.html +Only in gcc-6.1.0/INSTALL: old.html +Only in gcc-6.1.0/INSTALL: prerequisites.html +Only in gcc-6.1.0/INSTALL: specific.html +Only in gcc-6.1.0/INSTALL: test.html +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/LAST_UPDATED gcc-6-20160721/LAST_UPDATED +--- gcc-6.1.0/LAST_UPDATED 2016-04-27 08:22:13.000000000 +0000 ++++ gcc-6-20160721/LAST_UPDATED 2016-07-21 22:33:07.000000000 +0000 +@@ -1 +1 @@ +-Obtained from SVN: tags/gcc_6_1_0_release revision 235474 ++Obtained from SVN: branches/gcc-6-branch revision 238612 +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/MD5SUMS gcc-6-20160721/MD5SUMS +--- gcc-6.1.0/MD5SUMS 2016-04-27 10:13:12.000000000 +0000 ++++ gcc-6-20160721/MD5SUMS 2016-07-21 22:33:11.000000000 +0000 +@@ -1,5 +1,5 @@ + # This file contains the MD5 checksums of the files in the +-# gcc-6.1.0.tar.bz2 tarball. ++# gcc-6-20160721.tar.bz2 tarball. + # + # Besides verifying that all files in the tarball were correctly expanded, + # it also can be used to determine if any files have changed since the +@@ -20,23 +20,11 @@ + fd4ecdf5d672efe2b0e409aca9cf9446 ChangeLog.jit + 09538b708302f1735f6fa05b622ecf5e ChangeLog.tree-ssa + 24ab760126489e69436a43185dc3d202 INSTALL/README +-faeedc4aa0a33b139dba3e37dfcc32e9 INSTALL/binaries.html +-2ae07dc670badfddd880d0829f494717 INSTALL/build.html +-e2df733daff96626c742335bf4a3068f INSTALL/configure.html +-ea288f7e1bc7954c3de3261254314248 INSTALL/download.html +-4ba2f0041409f363c2f2eb4f0dd77dff INSTALL/finalinstall.html +-b19e611b013e13cf467d87dd2d5eba0d INSTALL/gfdl.html +-f266c60ec900704e2125c1f55ef979fe INSTALL/index.html +-d87c01263eb292cc6be0c98de9ba224f INSTALL/old.html +-9fa79492a4fbc527f20e7c1d7f83880f INSTALL/prerequisites.html +-897b84fa1251ef3d0db6d781c8bebe01 INSTALL/specific.html +-85828d67c1ef58065b4271ab44018590 INSTALL/test.html +-3ec6c77feebb68d73c98f35e6eecd408 LAST_UPDATED ++2019f60ae2fe0b2cc56e605eedd16555 LAST_UPDATED + b101e24e658738320c6f7460345cd30e MAINTAINERS + ac51a3b92098155704bd0e6f3e27e70f Makefile.def + 7fa740cb7ac3a6e647702770bb023340 Makefile.in + 5658e4a049df2f77bee1189b6603aa77 Makefile.tpl +-a4e0e310ef9f1d033f44a34667d1bc42 NEWS + 80d26bc3b1ad4f6969a96a24c9181bf5 README + b510a5285eb05298b5f3d9f5ae920588 boehm-gc/AmigaOS.c + 2caafacabf758bb76a9dfce1fc544b97 boehm-gc/BCC_MAKEFILE +@@ -441,7 +429,7 @@ + d25174fd04b32bbeab5f3cc783277ec1 contrib/vimrc + 7cb42cbdf8becd280d1e16191416fb62 contrib/warn_summary + 8b59f0d0a2dcdced14765c514fbad719 depcomp +-7fa381dd5b3470740f26874e57453fc7 fixincludes/ChangeLog ++03b936340a4cbe370fe25452c5eefabd fixincludes/ChangeLog + c23ba4c4f4ca4dfcdd9b4155e4626da7 fixincludes/Makefile.in + b6e3f4950abc6e254b467063381f6473 fixincludes/README + 455903ad4ff71fa5c5340ef7ae41a0e6 fixincludes/README-fixinc +@@ -454,13 +442,13 @@ + 497da58c4b47627a33f754b61f6eb051 fixincludes/fixinc.in + 9662d8ad173553c438e3ad3fc9db8352 fixincludes/fixincl.c + e1cd70e73f3c2d2319fd9d210ad6a5ff fixincludes/fixincl.tpl +-2bc45da2368f2edd0afe13a68f13c8c6 fixincludes/fixincl.x ++189a30a5c8c04ee6145097e01dec36b9 fixincludes/fixincl.x + 47da6e634225e1667c26a71bcf234bfa fixincludes/fixlib.c + d8aac376a7311e465eb0a98d341103a1 fixincludes/fixlib.h + 5b2c1fd3ef9d44fb6beb1a0d45ddd533 fixincludes/fixopts.c + ed1415e9dbc8f421fd9288bde0d90ad1 fixincludes/fixtests.c + 6df145c7cea1e2099cf97a0d83564aca fixincludes/genfixes +-052121f87ed1928d7b0b7be1850ce33b fixincludes/inclhack.def ++bafa3cf7b936fb735091aba9b601ed87 fixincludes/inclhack.def + 73354a5ccc669d3a585be10f1f7e7cb7 fixincludes/mkfixinc.sh + 5f9960cfe65b2e6bef658f770e52dfef fixincludes/mkheaders.in + 3aa0563cd682ee61ecd9eb6eea0b0bce fixincludes/procopen.c +@@ -541,7 +529,7 @@ + 1ee4e2b61ae5781d35271f3181927037 fixincludes/tests/base/stdint.h + bd72848710b6f098f5e44218bfe3202e fixincludes/tests/base/stdio.h + 1887d8bc1711dae9922852cda6027877 fixincludes/tests/base/stdio_tag.h +-a35ebd909f0105b249e3af1c1b5826ab fixincludes/tests/base/stdlib.h ++6b842aa18e09c73db745cbffa3cb34cf fixincludes/tests/base/stdlib.h + 42a7de17fb8f2ac74bc30c7029199637 fixincludes/tests/base/string.h + 6931e261dc1cecb7983279cf909bd784 fixincludes/tests/base/strings.h + 127183621f8b29d6912c683be6102135 fixincludes/tests/base/sundev/vuid_event.h +@@ -572,12 +560,12 @@ + 955462b555900ecd3934223c64e21fa7 fixincludes/tests/base/types/vxTypesBase.h + c78e762f2c91f2af991feda7d3d7f4b2 fixincludes/tests/base/unistd.h + a2fe1dc808019c9134bca8a4a9a8eec2 gcc/ABOUT-GCC-NLS +-06d0293a224884f2cc467d67f3b39573 gcc/BASE-VER ++401718b61199e799c9879210e445d03d gcc/BASE-VER + 59530bdf33659b29e73d4adb9f9f6552 gcc/COPYING + a916467b91076e631dd8edb7424769c7 gcc/COPYING.LIB + d32239bcb673463ab874e80d47fae504 gcc/COPYING3 + 6a6a8e020838b23406c81b19c1d46df6 gcc/COPYING3.LIB +-b3fff8c199e988a05ee713f0d584c272 gcc/ChangeLog ++47013cb6b7e3a068a8089357cc00568b gcc/ChangeLog + a3b63c675afa7a655cc2bfa8a907af79 gcc/ChangeLog-1997 + d9a88529352a010253c2e8fb1ed6023b gcc/ChangeLog-1998 + 240f08f81cb4699e8b49347db38233db gcc/ChangeLog-1999 +@@ -605,7 +593,7 @@ + 3eb07e0b2e542409bf73d359f7f65609 gcc/ChangeLog.ptr + e13638e26743ba41e6011b76cc00d9a9 gcc/ChangeLog.tree-ssa + 739ab47f6425bcea1d05e4fc0542de54 gcc/ChangeLog.tuples +-e8a6574a8534695f6f50d0345ddbcc52 gcc/DATESTAMP ++281e1cfb96402ae5f5610228d48687b7 gcc/DATESTAMP + d41d8cd98f00b204e9800998ecf8427e gcc/DEV-PHASE + eb92e1ff5e982ca07e173e0eb286d243 gcc/FSFChangeLog + 30e1e33411566388b3164558482dc5e6 gcc/FSFChangeLog.10 +@@ -617,7 +605,7 @@ + e71640635091e22ac2f09f2573aee53d gcc/acinclude.m4 + 9545fe83576dc99e441c64e268711730 gcc/aclocal.m4 + 9063d23e571fcde20283b9f34d5e3422 gcc/ada/9drpc.adb +-790bd4173abc2b4c3a18bb0d780ecbd2 gcc/ada/ChangeLog ++4cdae618932d452c197dc7aa6ae96df1 gcc/ada/ChangeLog + 683be0b07dc4f64f118fd5e8ae9cb30d gcc/ada/ChangeLog-2001 + 7aff25efb203be4136b8776cdc812956 gcc/ada/ChangeLog-2002 + cd2379152000f40157d349018fb9364d gcc/ada/ChangeLog-2003 +@@ -1076,7 +1064,7 @@ + 281fc9a014bf9c5a3677f1dd38cc9d5d gcc/ada/a-taster.ads + 09e5467697bae79fd39e9e40a68afbab gcc/ada/a-teioed.adb + 4eb0094120306451664ed73cdafe1d74 gcc/ada/a-teioed.ads +-2cf591e4878f55a978c94162e95e7267 gcc/ada/a-textio.adb ++7bbc8ad89fb1f29d8db561dc1e32fa14 gcc/ada/a-textio.adb + 8f8b52b35860a106600945520fa91ee6 gcc/ada/a-textio.ads + c74a673b222c3d0037a22fb766c67488 gcc/ada/a-tgdico.ads + e52f158e88867c99b27268762d9506b4 gcc/ada/a-tiboio.adb +@@ -1456,7 +1444,7 @@ + ffd0bc766345dd140e2b58fd781d013f gcc/ada/g-cgicoo.ads + 8f1d7bbecdcc4526e6981f20b2c6aa3c gcc/ada/g-cgideb.adb + 774b86530311360b01e1e5f5919cbbf2 gcc/ada/g-cgideb.ads +-755d5b83deaada0e6ba24a69420a9998 gcc/ada/g-comlin.adb ++bacfa2f3967417c2ef2a1a22e0e1191d gcc/ada/g-comlin.adb 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gcc/ada/system-mingw-x86_64.ads + 009f003dea0dd424ccad8aa6d022320c gcc/ada/system-mingw.ads +-f88c313eaecc8e40a2484a6e48107810 gcc/ada/system-rtems.ads ++7f460166af9cc30048191b5fdb8d1f18 gcc/ada/system-rtems.ads + 82baebc8db3e7bfae7183b08fe31c2c3 gcc/ada/system-solaris-sparc.ads + 83f4ccb8086c6fee3b90a682436c1a6e gcc/ada/system-solaris-sparcv9.ads + 056b449ee14d58e8119219b0720b9287 gcc/ada/system-solaris-x86.ads +@@ -2736,11 +2724,11 @@ + 0493a7ed666c4b102be665a8e328be35 gcc/ada/xutil.adb + 2c8b2f1975e4e064d3803db6dbd516cb gcc/ada/xutil.ads + 50ccfa68b3ffc2cea9079d312bab3902 gcc/addresses.h +-8b315dd0ca3dfd85ed4138a94f0226ba gcc/alias.c ++1ea67a8bdfe6758c1407490f0a8686b6 gcc/alias.c + 3f435b1cc17bbef3b90835cfda49b4eb gcc/alias.h + 2129a033ed56d38308ca40e1424337c0 gcc/alloc-pool.c + f9d22e8738cd46b8cd0075ae0e4bd5e1 gcc/alloc-pool.h +-e6e8f06d2d315d03b3a5239d3f11d83c gcc/asan.c ++71922db6042ca44d9217d21a73c6b0be gcc/asan.c + f24bb3e6f685b695e4763d26c6d5f82e gcc/asan.h + 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gcc/c/c-typeck.c ++99f360f887deb4bc4197d0ec6f6d6105 gcc/c/c-parser.c ++9b1855479c2c36717fefaba6896f2f8d gcc/c/c-tree.h ++b5ac8b88fc750cd755936cc794748d3f gcc/c/c-typeck.c + 3747bb41e8fd6a5de51dd6e7a7a47970 gcc/c/config-lang.in + 48ad75424472d7bdc1b734bf90e32a67 gcc/c/gccspec.c + 82c12673c34f23c306e289a9143864bc gcc/caller-save.c +-ce68401b13ebe1bbabc9cea9313eaa28 gcc/calls.c ++9e1a94e39fbf3c650570aa64ccd735ad gcc/calls.c + f7110748a1375215f4469bde141b3432 gcc/calls.h + 0d087c05ff5dd25db84dedfbaf568d4b gcc/ccmp.c + d3d5b380ad6f749bd8db65a92d79e3ee gcc/ccmp.h +@@ -2826,7 +2814,7 @@ + 745b7c812796bf46765ebc99d5ad4566 gcc/cfgbuild.h + a6ae55469bb1b6ad19931eb0ce91c962 gcc/cfgcleanup.c + 3bc167b2db649ed6cbd7ce505e48d35d gcc/cfgcleanup.h +-a30d4252b545009dd4ec82aabefc6904 gcc/cfgexpand.c ++3d4be9fe9feb4248e7822dbf2561140c gcc/cfgexpand.c + 020afc9cbf1b8f3e6768a0ce6a7e9b55 gcc/cfgexpand.h + 9d7a00e997730c1e512a0c8f318e1715 gcc/cfghooks.c + 86822fd705361191ce501823f4c84cf8 gcc/cfghooks.h +@@ -2835,9 +2823,9 @@ + e40d94d671641c4d2a68835c259d8098 gcc/cfgloopanal.c + 224984ea290493db3870a0ac1fcec23c gcc/cfgloopmanip.c + 6b8000ec10e5f8d86a76268393bcb5a2 gcc/cfgloopmanip.h +-0b6b42e81311c9c0b90f384542f84a9b gcc/cfgrtl.c ++0e5a7f5771e6f0aeb4ab18b86f9b38ee gcc/cfgrtl.c + c5f49aa0380336a2a865262bdb6edf72 gcc/cfgrtl.h +-71ded72dde0902e617fa2d55cbbb90e2 gcc/cgraph.c ++555e4220f0d3ea4b83dd17af16a2384d gcc/cgraph.c + 7605193302a08a7aa5813a2007e874ef gcc/cgraph.h + 6db406b55343fb518e9a72363f82202e gcc/cgraphbuild.c + 0dd454c4df9ab62c991b406f6ab4bf4f gcc/cgraphclones.c +@@ -2911,9 +2899,9 @@ + 833a4f3b8d4bd41edd9548e426fd27b3 gcc/compare-elim.c + 5d296c1586f1d268a85c2aa0a3b4d64a gcc/conditions.h + 9f336f22045efcaa67e235fba1bc08d6 gcc/config.build +-0e141afdcf55ff62734835a38532e63f gcc/config.gcc ++ade5335c97576ae1c1ae6677f9cf4f6f gcc/config.gcc + 75d9643d9dc2c2d16c12cdcb12dd361a gcc/config.host +-f4624f449d40e68419ea99e171e6360d gcc/config.in ++ab7e07d11b6403781c1f8e477b2a80ec gcc/config.in + 8e697813dc96ca90f5d0f4c196efe2cc gcc/config/README + b94306d00c5458b99b6b45830bf1eae6 gcc/config/aarch64/aarch64-arches.def + d70c159b70cc03592ac9fad295f8aff9 gcc/config/aarch64/aarch64-builtins.c +@@ -2930,8 +2918,8 @@ + 3f9b7aaf2703c560457dadd6e0c9148b gcc/config/aarch64/aarch64-opts.h + 5e44cc5092927352daf58d5d06792e96 gcc/config/aarch64/aarch64-protos.h + 34b37d5443fa4b7761945c006d214aff gcc/config/aarch64/aarch64-simd-builtin-types.def +-52242be4568fcea119d6074ceb257d63 gcc/config/aarch64/aarch64-simd-builtins.def +-e1fadf5e5e4d054343fce675c7613146 gcc/config/aarch64/aarch64-simd.md ++2900ce100d2c396ab04379ddcaebb97d gcc/config/aarch64/aarch64-simd-builtins.def ++d9316f824c3e2ed2fe92b3216a75a60f gcc/config/aarch64/aarch64-simd.md + e71203d59ad9d88352c651bf54967d4e gcc/config/aarch64/aarch64-tune.md + 56e698ddd35d4d45d1b27f04173c27cc gcc/config/aarch64/aarch64-tuning-flags.def + 28e8b35a70cddb3b2ecc24f45c6b1425 gcc/config/aarch64/aarch64.c +@@ -2939,7 +2927,7 @@ + 3283c054473233f66729a33663aba76a gcc/config/aarch64/aarch64.md + 8186400b6ebc5890fb03c1c392946923 gcc/config/aarch64/aarch64.opt + ffcb2d86bab40fbb01226fcbac5f8afb gcc/config/aarch64/arm_acle.h +-3fa2d68117b6c049d2f042ef47cfaec0 gcc/config/aarch64/arm_neon.h ++2307be37347862696a1710a987cb4f58 gcc/config/aarch64/arm_neon.h + a775d873b993526c6094ca1b28d8e074 gcc/config/aarch64/atomics.md + aab77a9141d7d8e0d399251a034b05ae gcc/config/aarch64/biarchilp32.h + f9fb82867abfae70f536c437cabbe0ec gcc/config/aarch64/biarchlp64.h +@@ -2960,7 +2948,7 @@ + b0a8914a24f787dbee5e200ee917f621 gcc/config/alpha/alpha-protos.h + 07b69b4d54e4a57bf76dea6f05e45340 gcc/config/alpha/alpha.c + 0a25a7cfc4a2956d79c165776297f982 gcc/config/alpha/alpha.h +-38517a12f3265291c74853b269c5cf0b gcc/config/alpha/alpha.md ++d248ba9c7788eb583ed7b179cc5029d8 gcc/config/alpha/alpha.md + a26177734159dae5679e9276b982ace6 gcc/config/alpha/alpha.opt + 4061b6fbc59a1083452389c88c59dc42 gcc/config/alpha/constraints.md + d6ffc31b378eda081971d2c468da4e2f gcc/config/alpha/driver-alpha.c +@@ -3007,7 +2995,7 @@ + 74de244fd60b2d76a3787960d782373f gcc/config/arm/aarch-cost-tables.h + f2b572d07746e403fd525bf9691ee2a5 gcc/config/arm/aout.h + 62fcdf218b75986907eca422e13aabd4 gcc/config/arm/arm-arches.def +-9a616434ff1b3cb0ebf9fa48bab40ce3 gcc/config/arm/arm-builtins.c ++e4a314e21e266db6c5d485e913a6885c gcc/config/arm/arm-builtins.c + 1e0456dd3a7822f2fa3e26f77e2c2d26 gcc/config/arm/arm-c.c + 65b5dc7fa9360d10a9ca86119c20ba77 gcc/config/arm/arm-cores.def + b63afb8e425edc52c016b6c15066845e gcc/config/arm/arm-fixed.md +@@ -3020,7 +3008,7 @@ + b1cbf9ca4f296f2f39987d24e0af2530 gcc/config/arm/arm-simd-builtin-types.def + c103dfefc6fcb9ebb20a29729bfecb69 gcc/config/arm/arm-tables.opt + 3f73ffc85b17a98310aef5b53adc5d98 gcc/config/arm/arm-tune.md +-cc2c987327ef9a3356a045e607ef2aec gcc/config/arm/arm.c ++ea7cd77a1db03fa7b565ffbde84298d3 gcc/config/arm/arm.c + 23e54a7c9fe7e1c62983bdd39f19951d gcc/config/arm/arm.h + 55f1f86069e992742e1b89abcc6ec7c4 gcc/config/arm/arm.md + 2d7e7f27748045f2d77a7377fda31d5e gcc/config/arm/arm.opt +@@ -3060,7 +3048,7 @@ + 3c4127440c24e5b23dce8d0f7cb8619b gcc/config/arm/fa626te.md + 2e52ace39749711dc3787f62948b77ec gcc/config/arm/fa726te.md + 197df6dea714a30f83e9b80aae52e81a gcc/config/arm/fmp626.md +-4b74ce4cb188d764b7914f35639c2116 gcc/config/arm/freebsd.h ++0ecf27dc3b0558645025fe3aaa600593 gcc/config/arm/freebsd.h + 870d22c2f986f799ebc3522dace502f8 gcc/config/arm/genopt.sh + c8550f4949927e5334c212129185e2bb gcc/config/arm/gentune.sh + 05e346aff9b27762033d2fd03753ea06 gcc/config/arm/iterators.md +@@ -3116,16 +3104,16 @@ + 4c3c46eb845e3505658b81b8eaa14288 gcc/config/avr/avr-modes.def + 0fffc0f61c26f4c9de873ad542b094ed gcc/config/avr/avr-protos.h + 41b9882721bdec25585513f697848b5d gcc/config/avr/avr-stdint.h +-88ca6ca8ed203bb11f9d74491a225841 gcc/config/avr/avr.c ++b38d57af8ead4be8ee87d298ed78c01e gcc/config/avr/avr.c + aea75b0a042f09c4610dfd149483ed2d gcc/config/avr/avr.h +-66d5356d423c0d037897ef09cd81bc6d gcc/config/avr/avr.md ++eff9328f7a8233598fb881c52e6518cd gcc/config/avr/avr.md + 97ae0e97c66153cd01ba33e6dd23a191 gcc/config/avr/avr.opt + 6eea869c9b52b117753eab2b0bb544ab gcc/config/avr/avrlibc.h + 272063927d64ca768006dc1e703a4a4c gcc/config/avr/builtins.def + fe325d127710d93f8c73b9ebfdd07ef4 gcc/config/avr/constraints.md + 04cce33bd7b1254e4ef5acfd097d1e55 gcc/config/avr/driver-avr.c + 7ad86a6961289da9a41d477a7d06632f gcc/config/avr/elf.h +-ccb997e1a0a2c184e23e1d255ddbd5d8 gcc/config/avr/gen-avr-mmcu-specs.c ++ea6ae4085ca32c92536855c96966835b gcc/config/avr/gen-avr-mmcu-specs.c + ba3b75183e01f578520c7f5ad4822d65 gcc/config/avr/gen-avr-mmcu-texi.c + a9056b0b6e3fde442dc545459462b61e gcc/config/avr/genmultilib.awk + 5ee74356b8bc2a97c70d2b19e9547ad4 gcc/config/avr/predicates.md +@@ -3209,7 +3197,7 @@ + 9a96119bd809f334545f28e92af4d7da gcc/config/darwin-protos.h + 158992b1d82c85cd69b4d3a96fa964ba gcc/config/darwin-sections.def + 56de9a396d23dd931c1f0dfd326f7fae gcc/config/darwin.c +-1988031d70e01f816930f126da6a4f87 gcc/config/darwin.h ++217b6049deb67093ce6ace2e85e26144 gcc/config/darwin.h + b463a7c4d27e349e9f2cd0e00a61487f gcc/config/darwin.opt + f2c8f6f89fa8ec74c30f6d9bc2d0d4e8 gcc/config/darwin10.h + 3544d912bd14b11ecd2f3a94d712c1b9 gcc/config/darwin12.h +@@ -3332,7 +3320,7 @@ + fe17ca5109af0e6e93b74bae231d1a55 gcc/config/i386/clflushoptintrin.h + 8db337d30ef627209263315869a56a98 gcc/config/i386/clwbintrin.h + 876790e99f6c0bb421e1492c7ea46ff0 gcc/config/i386/clzerointrin.h +-90532cc9b95026c43a798885aa570e2f gcc/config/i386/constraints.md ++a6979d6ddcc5bb8ecf2a26f5ea34c71c gcc/config/i386/constraints.md + 71baed36fc56f65d8c91aaefd5758aa1 gcc/config/i386/core2.md + 869e4b210e6f821bb16ac1e41fe7c5b7 gcc/config/i386/cpuid.h + 7fee26d8fedd334aa6fcd4bdc08cffb3 gcc/config/i386/cross-stdarg.h +@@ -3350,7 +3338,7 @@ + 8f07bf469832ed4bd2cf349351a4be27 gcc/config/i386/djgpp.h + c8e620657991f87382f5e2868a3a49e4 gcc/config/i386/djgpp.opt + bf04c6bfb2855901059ede3c90d91a0e gcc/config/i386/dragonfly.h +-1d476bca8c104bac65750c75940c3f2f gcc/config/i386/driver-i386.c ++86578484e605e5669e9fa482de9ac349 gcc/config/i386/driver-i386.c + 0f5e3cbf6fc57e8c96539b55c3c5d03a gcc/config/i386/emmintrin.h + 4d39e44657c94313f49309df7592ed83 gcc/config/i386/f16cintrin.h + 0123c9ade82b62efeff1e8b33c49a4a9 gcc/config/i386/fma4intrin.h +@@ -3371,15 +3359,15 @@ + 7207180c0653cb9c7507f26a9a814675 gcc/config/i386/host-i386-darwin.c + b80037f63f5fd458518208bbd7dbaa4f gcc/config/i386/host-mingw32.c + 47ac29c21a60ee2ca29d54ea4a345deb gcc/config/i386/i386-builtin-types.awk +-304099577fa33b6bf5bf012bfb1257d8 gcc/config/i386/i386-builtin-types.def ++b3837bf5c922be13974120be24db78c3 gcc/config/i386/i386-builtin-types.def + bbfe1f7b817a5b3321bdc8c5ca0d6b32 gcc/config/i386/i386-c.c + c29497fe4c1e5389895075d220252ca8 gcc/config/i386/i386-interix.h + 1c71860a666631f1a174dea14c52dbff gcc/config/i386/i386-modes.def + ac0b4653ef3d1e8200e8efbf73c5d8f0 gcc/config/i386/i386-opts.h + d3f3a1198cf0be4e2a3b9b10e0f761cc gcc/config/i386/i386-protos.h +-8558c1ec5c184c6d477b1b353e12f1cc gcc/config/i386/i386.c +-8d0d0d6956f44b2dd70e2ccc5677fdc0 gcc/config/i386/i386.h +-ea9cb826551f214701f0ec1e3c12d742 gcc/config/i386/i386.md ++5dcd9d24f02d8cf92de3e00a69a09d94 gcc/config/i386/i386.c ++39295430120b7691bd2d787705eabfb1 gcc/config/i386/i386.h ++077d661cd9ce686cb9b40a9cb77c5c87 gcc/config/i386/i386.md + e16f0e58cf07c96d0511136d7c28611a gcc/config/i386/i386.opt + be209c39783d5218055012112fe03242 gcc/config/i386/i386elf.h + a56c5de1cde5aaa7a3753ce09e0be661 gcc/config/i386/ia32intrin.h +@@ -3425,7 +3413,7 @@ + 5aa912e76dac257cfe5012440f7ad90a gcc/config/i386/pmmintrin.h + 7810065fc76773a3b740126a476af54d gcc/config/i386/popcntintrin.h + 4dcd1cf3c734c77f06e840e1fbd678f8 gcc/config/i386/ppro.md +-d0e6526febb471bb3acfeb59218f2847 gcc/config/i386/predicates.md ++50884030e7b9ddc82422cf705f6659d7 gcc/config/i386/predicates.md + a0f562fc0aef289f6cdef5b931f5e39f gcc/config/i386/prfchwintrin.h + 7feefb44b5c73254b20e5b7820e45ba1 gcc/config/i386/rdos.h + d57b23dfe66e6405fed787f9047ce355 gcc/config/i386/rdos64.h +@@ -3437,7 +3425,7 @@ + 6d7b4d52cdc2a6db01f9c20c45be0795 gcc/config/i386/slm.md + d1a02c4509457e48895953880e756b4a gcc/config/i386/smmintrin.h + 0a7e726af98f6a39952052f361cdfbee gcc/config/i386/sol2.h +-9f55c5a60dd162d1ae5fb93d69b7a4a3 gcc/config/i386/sse.md ++30d0c0c8fd58d4ffee139d715d1e1b66 gcc/config/i386/sse.md + 91d7c7f7b9b34e3ae4e87882a355bf2b gcc/config/i386/ssemath.h + be9c2b7e2ff5d3a32ab3d902b56762ac gcc/config/i386/stringop.def + 96f9e071c5c165d0cc21e51cfebe5b92 gcc/config/i386/stringop.opt +@@ -3662,7 +3650,7 @@ + f298ec31e1348e797caa9f7a1a7ea94d gcc/config/microblaze/microblaze.md + 4dec1d8cba0ae9e95e0ae11ad82575dd gcc/config/microblaze/microblaze.opt + a16c7f39b0b2862c81dd0f0a4b232307 gcc/config/microblaze/predicates.md +-f986ab14af6b81f50248b55de266dfbb gcc/config/microblaze/rtems.h ++c560707d4508d14056eaacb33c6b00bf gcc/config/microblaze/rtems.h + ca8367ac97d24747376a746a1a3806c2 gcc/config/microblaze/sync.md + 17818a25ae3112098cd91d698e37f0f7 gcc/config/microblaze/t-microblaze + 63ccba4e7f745d36609d7c129bac6288 gcc/config/microblaze/t-microblaze-linux +@@ -3851,7 +3839,7 @@ + d835d08884a2846e70bef505767bd3f1 gcc/config/nios2/t-rtems + c2be83b7f197d233a6ce04c2245a312a gcc/config/nvptx/mkoffload.c + 71182308acd7b24f983c5c3836f21e97 gcc/config/nvptx/nvptx-protos.h +-656dbc77c4631baba2d2fc786dbfd286 gcc/config/nvptx/nvptx.c ++d16914348f2acdb5a72c4e8cd5c348d9 gcc/config/nvptx/nvptx.c + ee26c09dc69c862b8465425e61efb50d gcc/config/nvptx/nvptx.h + b6d00d17aa4debe5cbfb686a317af311 gcc/config/nvptx/nvptx.md + f20baafe92ab83b58eced858f6668a59 gcc/config/nvptx/nvptx.opt +@@ -3881,9 +3869,9 @@ + e1c6685604f681faea2ce89975cb7fb0 gcc/config/pa/pa-openbsd.h + 7fe7a5966510922de22aeefc35c8e010 gcc/config/pa/pa-opts.h + b1fa12eef4f2d69520c8e33ff00ea833 gcc/config/pa/pa-protos.h +-8db4f36dd448d091f4e3942edf612201 gcc/config/pa/pa.c ++9a436df6ba10cb315e4759c263bb20f7 gcc/config/pa/pa.c + 0cb5f8b8230c90bd6580010bb9088794 gcc/config/pa/pa.h +-85cf1e3de4bb1b1e4842fc2d8277c179 gcc/config/pa/pa.md ++870d0b3ff5e10512bbebb34482e95aa9 gcc/config/pa/pa.md + 2a55715c21637c72f4c2306798f28715 gcc/config/pa/pa.opt + 2c84ac4128fba0f0ec7a3a85f7724f7f gcc/config/pa/pa32-linux.h + 3eb3ff97a411ccda47b603da5c8cc95f gcc/config/pa/pa32-openbsd.h +@@ -3921,19 +3909,19 @@ + dbafb0fbae9820ebfe82de65a3b83f68 gcc/config/rl78/rl78.opt + 013aededeacbccea80fe3b6306066322 gcc/config/rl78/t-rl78 + ad241b2a8851ae9d5b6641c7b7b479cb gcc/config/rpath.opt +-a3432c56bcb7fc05fd6b64099e48f679 gcc/config/rs6000/40x.md +-8fc4d37e67deb5fe12ee814274162f79 gcc/config/rs6000/440.md ++be34836d1ba31c631716d5010c1fe037 gcc/config/rs6000/40x.md ++e2c353cd79f9a4399a0dc40fe79e035c gcc/config/rs6000/440.md + cfc1fff1a1e39dd4fd2f1e047c1b010d gcc/config/rs6000/476.h +-615d3d843859a69803593326d4b04616 gcc/config/rs6000/476.md ++76c22ba4be588931c8b58aff695d1d6f gcc/config/rs6000/476.md + 1da0524d2d6d22f5cb7d53d9fe1c611b gcc/config/rs6000/476.opt +-6c88c644d7df100d13787b316e121593 gcc/config/rs6000/601.md +-a6556ad3f85c0f4b0b1e84217fa9e114 gcc/config/rs6000/603.md +-d37c6f2ae8b08b04cff356c70860d541 gcc/config/rs6000/6xx.md +-fe7aaac8aa1b8059c3116b73e397f690 gcc/config/rs6000/7450.md ++7c0fa5cb3b835130227458f0f69f813b gcc/config/rs6000/601.md ++ecbb83eea3d6a47a6af5584c6be12ca9 gcc/config/rs6000/603.md ++481cf4bf7f0be523a61462b9fb81de69 gcc/config/rs6000/6xx.md ++0fe53917723a9db222e730f098ace1fa gcc/config/rs6000/7450.md + 03b5a697e67b56138a872018df4c3bab gcc/config/rs6000/750cl.h +-010f2f4c822c612437243e649ec4c102 gcc/config/rs6000/7xx.md +-c8e123f1b622c43a3745ff2b5f799035 gcc/config/rs6000/8540.md +-cc8a63fb23e95bd165f77f99193198fc gcc/config/rs6000/a2.md ++6eae8bf4ae5936dd0db712c9458f6901 gcc/config/rs6000/7xx.md ++02e47ab90dd56329510ee3801d6d700f gcc/config/rs6000/8540.md ++f27e2df971a7f7e80091bf85b9be16dc gcc/config/rs6000/a2.md + 215c8a4ac1298c2f899cb270f784122e gcc/config/rs6000/aix-stdint.h + d4d5391a097711b67df3082070de4c3a gcc/config/rs6000/aix.h + e580ffd868554681a147b5173478fb59 gcc/config/rs6000/aix43.h +@@ -3943,12 +3931,12 @@ + 02a3d453ca7e43f4bf70187e1c3cf346 gcc/config/rs6000/aix61.h + 21c1c24d19668403ff77dc915a743342 gcc/config/rs6000/aix64.opt + 1088dba38de5967f615c2c010164ec48 gcc/config/rs6000/aix71.h +-4b64a4bbfc491cdb49ae51bf4dbdbbb8 gcc/config/rs6000/altivec.h +-890c898bb424f6b9a14e77361e11c737 gcc/config/rs6000/altivec.md ++72b7be964acfdeb0ca6642e9bb019ee4 gcc/config/rs6000/altivec.h ++1ae5cce9f95be1f33759897a0e901575 gcc/config/rs6000/altivec.md + ebb5e6bcfc1093c0aff7c41cd9353433 gcc/config/rs6000/biarch64.h +-eb88cb402ce0ae76bea0e2669d29faf1 gcc/config/rs6000/cell.md +-ab77897337ed0bcc94d911de0a9b84d9 gcc/config/rs6000/constraints.md +-74ed46696e6d8336ffbaf386d75e54cf gcc/config/rs6000/crypto.md ++936aede56563f66921091a90d3d1d56a gcc/config/rs6000/cell.md ++2697e3b9700fedaea4ff0e78242d1382 gcc/config/rs6000/constraints.md ++3989f0e14500049f924ab6bf76471a93 gcc/config/rs6000/crypto.md + c85b3bacf772d069c8a138ff0cf48400 gcc/config/rs6000/darwin.h + cd92ef7ed3430ad83c27c94fc7c97de4 gcc/config/rs6000/darwin.md + e8e5a87925f97e07063bc36de5dc3b22 gcc/config/rs6000/darwin.opt +@@ -3956,14 +3944,14 @@ + 78939b2279a4d082aea92f53a289d711 gcc/config/rs6000/darwin7.h + ac431f1a0b8ae0c72fc7cab9bc9e2f1d gcc/config/rs6000/darwin8.h + a77da74ccfb88c7b6bcd77d4a5f98c90 gcc/config/rs6000/default64.h +-522858d4ee17f4b8129dc2ff6eac0b08 gcc/config/rs6000/dfp.md ++1a96a05c3098cba8dcad9a84f4da9c74 gcc/config/rs6000/dfp.md + b9490f963c3648aa2f0de7bc1cd5af58 gcc/config/rs6000/driver-rs6000.c +-d7a141c5235cb379dfa386c990ea731b gcc/config/rs6000/e300c2c3.md ++d949390c82f3443dbfb82eef160fa0c7 gcc/config/rs6000/e300c2c3.md + 85e4c2a561d394919589b92fdf2a6da3 gcc/config/rs6000/e500.h + 8bb8b4dc450a6089b1cfca551026bfce gcc/config/rs6000/e500mc.md + 3a8a9616dd1a37f5c41ea0eebe2b140b gcc/config/rs6000/e500mc64.md + 0474b71c5e8814f8a2c2929068ebd209 gcc/config/rs6000/e5500.md +-91ac3cc581488d8d5149cbb4bfb5925d gcc/config/rs6000/e6500.md ++fe4ae385f84f18458badf29e377e0771 gcc/config/rs6000/e6500.md + a737c12b8f7510a91988a05012db3ccf gcc/config/rs6000/eabi.h + cbd3019152cc1036fd011d0059012250 gcc/config/rs6000/eabialtivec.h + cb63806e3e70caa314033e967b7d4bb5 gcc/config/rs6000/eabisim.h +@@ -3973,7 +3961,7 @@ + 8eabfc237f6f5d69a39b97c2a170287b gcc/config/rs6000/genopt.sh + 386c32703bb134082430ae71c03664c9 gcc/config/rs6000/host-darwin.c + ff786276df16ab764e024e79f389d1f0 gcc/config/rs6000/host-ppc64-darwin.c +-e8f836ba652ea98cf75c38a9a51571f2 gcc/config/rs6000/htm.md ++2299a6244b44c4fa0b0180101f4c9284 gcc/config/rs6000/htm.md + 4902896bbb0c8507f0cef5391b46f052 gcc/config/rs6000/htmintrin.h + f8855608896ff92f191cd0ec0e8debce gcc/config/rs6000/htmxlintrin.h + c6a61039cfb5b76277bcccaa262e3ee0 gcc/config/rs6000/linux.h +@@ -3983,33 +3971,34 @@ + a0078bcc38f4ed35217a24ccfae5c528 gcc/config/rs6000/linuxspe.h + 27fed5a1c278b05b79d11ceb2b575b91 gcc/config/rs6000/lynx.h + 0cc3c5f9101501b8253ce3176c3ffce4 gcc/config/rs6000/milli.exp +-c624579cdc2079804105ce3d1189c52b gcc/config/rs6000/mpc.md ++2fa8dcb8bc43d9ba7fffddb47770b257 gcc/config/rs6000/mpc.md + c2fd14dbafe257185d6e8d9378100414 gcc/config/rs6000/netbsd.h + dbc5748d385f0a366a69b70e5f4b5200 gcc/config/rs6000/option-defaults.h + 41f286ebbc56d4aa7ccf8cab2e90cfc5 gcc/config/rs6000/paired.h + 55af659a3619ef1966eece3320f3c9dd gcc/config/rs6000/paired.md +-02aa07ccdebf9ed3f0df6f5d31a4dace gcc/config/rs6000/power4.md +-3cb4b79927603a40dcc7f54b0a07948c gcc/config/rs6000/power5.md +-253d89e0957e9e5492d8dcf15d208fc5 gcc/config/rs6000/power6.md +-83bc851e7693aeadfdf97ba3f11aec17 gcc/config/rs6000/power7.md +-9ad7a77314079c9e0cd64370c950c42b gcc/config/rs6000/power8.md ++31242fa4ed8abafeba3b82a860474603 gcc/config/rs6000/power4.md ++44d38db73ba888118ad2e68d58f463c5 gcc/config/rs6000/power5.md ++9c803622bb5146608fe9539f2af34f36 gcc/config/rs6000/power6.md ++392d61b850052a84dca819f18d09ec44 gcc/config/rs6000/power7.md ++d8b143420c8e25c7b2a8df221ae27589 gcc/config/rs6000/power8.md ++4c6843f36ebb8e0c06de737adda165b0 gcc/config/rs6000/power9.md + c335f4f65801de1318cd4db8b62934ba gcc/config/rs6000/ppc-asm.h + ea4871edf7de554404015404bafd83e6 gcc/config/rs6000/ppc-auxv.h + 30884ec5924e409646acd1aa99423fc5 gcc/config/rs6000/ppu_intrinsics.h +-6d9c1ca23d345218b3077b98e639e07b gcc/config/rs6000/predicates.md +-a68302ec6a66487c8ecec6e28ef0e043 gcc/config/rs6000/rs6000-builtin.def +-596338f547ae69967d84ba7f4f847693 gcc/config/rs6000/rs6000-c.c +-7c301066108088876ee2e09362770be1 gcc/config/rs6000/rs6000-cpus.def ++195cd4f51261ae5a6bab57f4be102730 gcc/config/rs6000/predicates.md ++fed7519f3fb7d3f6e3b9e82dd640d7c0 gcc/config/rs6000/rs6000-builtin.def ++7baaf3b9a76f29c14d1e20e921eef7da gcc/config/rs6000/rs6000-c.c ++3e5ef6c30730e4575563890ec3cfe76b gcc/config/rs6000/rs6000-cpus.def + 2f0d36a3bf95d74249364237cf04e29c gcc/config/rs6000/rs6000-linux.c + 192ddf2c1b6fd7fe7e53b1acadaee645 gcc/config/rs6000/rs6000-modes.def + 14f48bec5cd76d2a5aada931fb1fedf4 gcc/config/rs6000/rs6000-opts.h +-be801487c27166d61655a5ee6fb17163 gcc/config/rs6000/rs6000-protos.h ++7389795c236e28309f4187cce6e2dc55 gcc/config/rs6000/rs6000-protos.h + b43d18bcb08f2293531b3302947868a2 gcc/config/rs6000/rs6000-tables.opt +-157543f273b999d4aa0589bd9ec62145 gcc/config/rs6000/rs6000.c +-b3d76f8a9e6c3f285875d109152cac89 gcc/config/rs6000/rs6000.h +-79d11c1b7f5b67bf5e7dc1b88beb3be9 gcc/config/rs6000/rs6000.md +-334e5a36e5ba56cf459f5d29dc275a86 gcc/config/rs6000/rs6000.opt +-bc7c7fd50f8133954bd162f41163a526 gcc/config/rs6000/rs64.md ++71c5cdb7a1b42c30338eb5001a658ae1 gcc/config/rs6000/rs6000.c ++219d2a37391d11dee8e606c70d31fa65 gcc/config/rs6000/rs6000.h ++b555f8e178f9b8bd13235a2c7ed5ac40 gcc/config/rs6000/rs6000.md ++ca447d624d64bde7352a3632cff4e012 gcc/config/rs6000/rs6000.opt ++23eae5c1992970cba9db6c157ab8c4f6 gcc/config/rs6000/rs64.md + 089f55bc6e1565ba82f6d496569d3280 gcc/config/rs6000/rtems.h + 510ae383bcc5df111af9d4407a82b6cb gcc/config/rs6000/secureplt.h + 0377ddd2fcdd6253e75cfe7f6a9aee18 gcc/config/rs6000/si2vmx.h +@@ -4018,7 +4007,7 @@ + 4916c7683b7e0a7036c40eb6d7ee92f0 gcc/config/rs6000/spe.md + 70e488f99d30586ce36bfe7b9dc08fec gcc/config/rs6000/spu2vmx.h + 89082edb09e5818e9e5f9f05685cadcd gcc/config/rs6000/sync.md +-975824c5c614d1480831eb06f3b18f10 gcc/config/rs6000/sysv4.h ++056da47aa9e7eb07f8dea417fb567401 gcc/config/rs6000/sysv4.h + 2913dacd00e26860f7ad46828646ca14 gcc/config/rs6000/sysv4.opt + 72d0179bc61a6d4aa963be895a0d6e5b gcc/config/rs6000/sysv4le.h + 93056159fe947e9f851f95a932a97bfe gcc/config/rs6000/t-aix43 +@@ -4038,17 +4027,17 @@ + 7116c0a8cdb50f6a880f3e39b38fbee9 gcc/config/rs6000/t-ppcendian + 7f0dbbdf1e014933add4051db875bfae gcc/config/rs6000/t-ppcgas + 1b8aba690a39464c4ea9c647d73d6983 gcc/config/rs6000/t-ppcos +-7389d8d00e632c8845d538dc99e5c6b7 gcc/config/rs6000/t-rs6000 ++98cf7ab5ad50cd5fa7d1d38921be79a1 gcc/config/rs6000/t-rs6000 + ae9fccfa6dbce7c4de5e57cb98ea316e gcc/config/rs6000/t-rtems + 3139a8aaf8df8e678d1895cd6e6cdbc5 gcc/config/rs6000/t-spe + 0bd38a9da8637b9ca3a43b70bcd7f6ad gcc/config/rs6000/t-vxworks + f11925c88524d2fd457bf77944da1302 gcc/config/rs6000/t-vxworksae + 3f0601a68de7a0aee8264b538228d943 gcc/config/rs6000/t-vxworksmils + bb61df2b42a69a90853a503710200de1 gcc/config/rs6000/t-xilinx +-90d8139c477dc9d8ff1374f594342cd1 gcc/config/rs6000/titan.md ++cc22792d76d22d8203dc7c3680c1dbc7 gcc/config/rs6000/titan.md + 7369115a6bfe8259388f41e912c060f2 gcc/config/rs6000/vec_types.h +-3895f5086b0451178d2cab3a8edc0df6 gcc/config/rs6000/vector.md +-64991c6a25d1e8270725d50368b8fb85 gcc/config/rs6000/vsx.md ++ed5c9b710457da108e718e8517f71c08 gcc/config/rs6000/vector.md ++444b4ec5dd2806e425c1e3138284f3d2 gcc/config/rs6000/vsx.md + 4d14358837cff46d3efb3a12dfa4fb39 gcc/config/rs6000/vxworks.h + 724f6bc5a165006b67c0526f1bd7477f gcc/config/rs6000/vxworksae.h + d0482b801e0a94640973282cfb41b1a4 gcc/config/rs6000/vxworksmils.h +@@ -4059,10 +4048,10 @@ + 1aff8cb3714b63b6c3367f552dae743f gcc/config/rs6000/x-rs6000 + e5e773649ecdb110972c35e49c42b3e5 gcc/config/rs6000/xcoff.h + 14b84186ff830f20eb02a0e254ead887 gcc/config/rs6000/xfpu.h +-36a1d4af1d8697adca6a1af98b7b0cf4 gcc/config/rs6000/xfpu.md ++1c69fd8a6a2d3aa89f111d94a29c74a8 gcc/config/rs6000/xfpu.md + 750508def567aebb2fcd9b027515ce60 gcc/config/rs6000/xilinx.h + 1701cee04ec5d0023ee2f2ceb0ff7490 gcc/config/rs6000/xilinx.opt +-3735d6fa9e1f7a056f86652bf630d59e gcc/config/rtems.h ++c259e167d92ed9ea65d4529c9ac58029 gcc/config/rtems.h + 29973834f5994d1d1eb068d452b4912b gcc/config/rtems.opt + 7ade2acf000a30e0e591946c40cc5802 gcc/config/rx/constraints.md + e6126d96e89716a341e26fa279f84be1 gcc/config/rx/predicates.md +@@ -4093,9 +4082,9 @@ + df9ea5d53147f236d75784dfea931042 gcc/config/s390/s390-modes.def + 9fbc56cdaa1a0bfa0e8af1c738f747cb gcc/config/s390/s390-opts.h + ec6ce661c7b87984fbda470242973d68 gcc/config/s390/s390-protos.h +-286c274799f9c837c69299a3d92749cd gcc/config/s390/s390.c ++cf2b018db73bc2242c43e8fd064460b9 gcc/config/s390/s390.c + 6128183534b6460c3504e49da918f124 gcc/config/s390/s390.h +-aef50f68871f4a43a28df1fa615b7353 gcc/config/s390/s390.md ++3d0ed16a636ca7198d07e174a4bb3ec1 gcc/config/s390/s390.md + 93ff0c316888e0ae1e6e5fcbb89614ea gcc/config/s390/s390.opt + b92144af9dcab9d6a6bd0a619e8bd90a gcc/config/s390/s390intrin.h + 7182f5655f81cbe30f04b3209bb50a8c gcc/config/s390/s390x.h +@@ -4166,32 +4155,33 @@ + cce52944785c3c1036a7380adda38c22 gcc/config/sparc/constraints.md + 4899a6b24fe9d952cbb0a117c5014933 gcc/config/sparc/cypress.md + a6f5c02cb556d4484b510b1b080970f1 gcc/config/sparc/default-64.h +-8861dca695ebec27403ede9cba2e83aa gcc/config/sparc/driver-sparc.c ++999b81b4a3d65c9f3913d9c5ac50116e gcc/config/sparc/driver-sparc.c + 24b6ddb0c85a7d35c6bef23e162f238d gcc/config/sparc/freebsd.h + e3873b9f7262fe2e5e1c1ff303fd07f1 gcc/config/sparc/hypersparc.md + ceb5379ddc5c41b514ec37a1902d2f2e gcc/config/sparc/leon.md + bce3eb1a406fa181a3518aeca8a5f851 gcc/config/sparc/linux.h +-4d0b279be0d03ade9a7a03dea9aab8c6 gcc/config/sparc/linux64.h ++e90fb5dab384ef61b70412869846e81a gcc/config/sparc/linux64.h + 44524f5016f24f5db03ad91912a30fa7 gcc/config/sparc/long-double-switch.opt + d14affc9d9a7c6d706ac72f92b369f54 gcc/config/sparc/netbsd-elf.h + 08f60d645b2128365c08c0f6c6e221ff gcc/config/sparc/niagara.md + 16b7243175105a0d257eb4421bedc2ec gcc/config/sparc/niagara2.md +-e597ae6bcd05bbe47a86aea7463c12ae gcc/config/sparc/niagara4.md ++78dfd78b0f3609e0494bbaf344d70695 gcc/config/sparc/niagara4.md ++60463e86a2bfe089ae54632abf1cd938 gcc/config/sparc/niagara7.md + 3f126aec8253ea73daa2fbaafc3f7153 gcc/config/sparc/openbsd1-64.h + df546d4092fe20ba80bd5a3954f0bd35 gcc/config/sparc/openbsd64.h + fdf6ab88ad0b4e36a3b8ebf25cfdd547 gcc/config/sparc/predicates.md + 2042472acbe05e3e6c55253f1b308604 gcc/config/sparc/rtemself.h +-e105faae60a663602a2c212e0d82be55 gcc/config/sparc/sol2.h ++ea486cef33954ec2c7cd6b2bcd57b5c1 gcc/config/sparc/sol2.h + 027897262736bac521955a4e91403e9d gcc/config/sparc/sp-elf.h + 16197cb93f1fda192e849bde60b989d3 gcc/config/sparc/sp64-elf.h +-b16df431afbd3ad37c03599441a6a068 gcc/config/sparc/sparc-c.c ++24821a14bcdbe2e146ed8e020c06d35c gcc/config/sparc/sparc-c.c + 6e05fd82c65a1c0b69f52820e4e2c82a gcc/config/sparc/sparc-modes.def +-e7e72eec1accf85bc1badbb0941af4f6 gcc/config/sparc/sparc-opts.h ++76ec8424fd03e5e3660223b5ca3cf59a gcc/config/sparc/sparc-opts.h + 3b12f88afd2307417ea049e4a24a9bb8 gcc/config/sparc/sparc-protos.h +-9266b115b2f0af3232f05cf0c525c3e3 gcc/config/sparc/sparc.c +-28bbdfc6758c9c5ab027f2c08ef7a013 gcc/config/sparc/sparc.h +-1e404c290eca635c799aa01eb4d8d355 gcc/config/sparc/sparc.md +-48c9d42cb9fd0422c5cf112826aa7ffa gcc/config/sparc/sparc.opt ++c45d5a341822603b1d2e3234df6c4200 gcc/config/sparc/sparc.c ++da3c18895492fa52031c534e5825b3fe gcc/config/sparc/sparc.h ++1f89fb1ea3b02cbe8c12395bdcef59a6 gcc/config/sparc/sparc.md ++18fcbfcaaf4ebb852311426ae9f8571d gcc/config/sparc/sparc.opt + 9cb87fbe1c20a8991a89a8c2215a7c07 gcc/config/sparc/sparclet.md + 8fa2a5576a24f640750e744d90353334 gcc/config/sparc/supersparc.md + 12aaadc74ad00986b0b584b5670f83a2 gcc/config/sparc/sync.md +@@ -4210,7 +4200,7 @@ + 410423780343a1431e1c0dc5bf60dba8 gcc/config/sparc/tso.h + b6612a314463771600938ccbd967e4c1 gcc/config/sparc/ultra1_2.md + 664dc34c9e8a2da763a8d607cdd40c28 gcc/config/sparc/ultra3.md +-172bd3dd1afbcc416192c4348f242e3b gcc/config/sparc/visintrin.h ++6dd43af528bb6984a85f9b73d6cf430b gcc/config/sparc/visintrin.h + bf27cffd7002ed10c819216944e1fc8d gcc/config/sparc/vxworks.h + 9b2ddc345afcea4f415dd0c8bc2d2ed3 gcc/config/sparc/x-sparc + ec6f83b17b1625fed43638a36dc76ae5 gcc/config/spu/constraints.md +@@ -4327,10 +4317,10 @@ + 905539c10b01b14270085b2ff8a8e401 gcc/config/visium/t-visium + 5970b7b34f57ccb9e61f7e6ca0b0990b gcc/config/visium/visium-modes.def + bcbe3f2a16b7c074ac5b3f63ddaa9fe2 gcc/config/visium/visium-opts.h +-8b4eaf75ea504e522ec4e6f7e5d0a800 gcc/config/visium/visium-protos.h +-4a68104ef84d725cd7c9b18678dc889a gcc/config/visium/visium.c ++f179b316529c1e1aef8dd4a708a79edf gcc/config/visium/visium-protos.h ++f211ad99efeaa709f4eed4515950528d gcc/config/visium/visium.c + 13491427224304bc418ddad214bd2666 gcc/config/visium/visium.h +-5301760e9c5059d01ad49e4a4d27b512 gcc/config/visium/visium.md ++49f063ffb6ecc0eb5d9533b269661a66 gcc/config/visium/visium.md + 809a10680b60475e5abe66769cac59e5 gcc/config/visium/visium.opt + 883b3e153a9672ad32f1c8cb18cbea9d gcc/config/vms/make-crtlmap.awk + 9b09f55f7820a1189c8b3dd933aca2ea gcc/config/vms/t-vms +@@ -4374,8 +4364,8 @@ + bb1965ec2a1e0ce5e60d527c23ca610b gcc/config/xtensa/xtensa.h + d3ed3f2851a6ee9f647a0fe488ad1639 gcc/config/xtensa/xtensa.md + 6bc76a8cf807646d45ffd30b5ca7d2b2 gcc/config/xtensa/xtensa.opt +-a46aba5ea3ed52179bc15d322a73bab7 gcc/configure +-75eefe68ea80541c25dd77c91182eefa gcc/configure.ac ++ebf9ee0b037a06c3e8bd155c4eedc1eb gcc/configure ++19074c8f1663edb2fd70e9230c4b2bfd gcc/configure.ac + 0ec5b41e50536d76b12ce8977926b0df gcc/context.c + 26da2cb861339f31f80bd959e0d59598 gcc/context.h + cccacb2ac29511a68f30d50c4f2a9655 gcc/convert.c +@@ -4383,7 +4373,7 @@ + d80857164629763d35964508054ddcda gcc/coretypes.h + c1d9055612e35b11f4c86de664f8e1a7 gcc/coverage.c + 653580fc0a70e3ade04c5b00362b0daa gcc/coverage.h +-588dd1bd87a8445d4a2ce8e3c9bf6dc5 gcc/cp/ChangeLog ++07a267d95fe6b59a9cdf0b9c83620aa5 gcc/cp/ChangeLog + d271e3663538ba1f3281cab3838e92cd gcc/cp/ChangeLog-1993 + f5a44adbc05521162350ca409d1d95ce gcc/cp/ChangeLog-1994 + ac55db48d964cb5469ff03c1cd3ee04d gcc/cp/ChangeLog-1995 +@@ -4411,57 +4401,57 @@ + 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gcc/fortran/openmp.c +-32b64c520ae2d457708ccafb56bdb398 gcc/fortran/options.c +-e4982905a015e74a947f5cba2fd5bf8e gcc/fortran/parse.c +-5163fc3c6029dd5a8197395b4377afa0 gcc/fortran/parse.h +-061decb36333beede21dd5b1e6397fe8 gcc/fortran/primary.c +-5905d4d8099abc01becd40e015f04536 gcc/fortran/resolve.c +-9ed23a8532184ec8065a2896d8638c3c gcc/fortran/scanner.c ++0b73aa1351022bc9b69b35d237f97d12 gcc/fortran/misc.c ++90de8ceb7bf48f35b7e7bc456635ccb5 gcc/fortran/module.c ++e023aea3b853e2aac54c491b0c7dceaa gcc/fortran/openmp.c ++f8b10b2e5c40bc25b4d9eef7295880fc gcc/fortran/options.c ++025d3494f9ed075d99b64b4a7781543b gcc/fortran/parse.c ++043cf75f229c25d3de2bb79cc984c69d gcc/fortran/parse.h ++4e0e2fd36510d98c289456edbed2c292 gcc/fortran/primary.c ++be434b3f3d88d0010cc278c8d17d84f6 gcc/fortran/resolve.c ++99540dc62dd0f048881facab0517a129 gcc/fortran/scanner.c + 075cca4c5736634c587f4ed50ddc9f93 gcc/fortran/scanner.h + 4b5ab4f68e70934e8adea730a3fa4149 gcc/fortran/simplify.c + 75d50e5ade35f92e65fab4fe0b20630b gcc/fortran/st.c +-80b966958d6948acbf1c4c33cbe28c3b gcc/fortran/symbol.c ++f8bbffd124aabc78dbead99719f3d071 gcc/fortran/symbol.c + 186ec08e98303bc7e25afdb9f5e9aab9 gcc/fortran/target-memory.c + 2e5ed3113ab460b7be0e63a724f9f45d gcc/fortran/target-memory.h +-0295dbb04ca0ac845ba36122f250b6e6 gcc/fortran/trans-array.c ++adab4b79e93efc39a98d2bde342814f8 gcc/fortran/trans-array.c + 4e46ac05c6b8e884925b4b58c7d78a30 gcc/fortran/trans-array.h + e9814dc5252693185f3e60d55d55a701 gcc/fortran/trans-common.c + 7ca10244eca4229e1c832b3c393d9a24 gcc/fortran/trans-const.c + d23a0f8bcd86907559306d74723ffdbd gcc/fortran/trans-const.h +-9ed6a0a514291d5e841dd6379125ab8e gcc/fortran/trans-decl.c +-341c6bcf2a7d37d50cb6d5c0ed1affb6 gcc/fortran/trans-expr.c ++36a4681903f12b16f44566186a2691b9 gcc/fortran/trans-decl.c ++a146a0181d77d0294e107bf0c9ce93f6 gcc/fortran/trans-expr.c + 55c2dd391599f5dc06e34c6058f48ee4 gcc/fortran/trans-intrinsic.c +-6388c76555cc1e06e93cbe1e40796c0f gcc/fortran/trans-io.c +-109c58b7d897545dbe960eef88f09a06 gcc/fortran/trans-openmp.c +-12c15965589066ffdc046103e74eb21e gcc/fortran/trans-stmt.c ++988afa7187f8648d73cbbdd53cf6155b gcc/fortran/trans-io.c ++2f638266866f5af39a561ef341e82662 gcc/fortran/trans-openmp.c ++368d4cd52e8634e9fc5c1072a5640e29 gcc/fortran/trans-stmt.c + bd26fd364f82b04b35ca797f1500c5cd gcc/fortran/trans-stmt.h +-2dc8f56209eae7fbe3d3ad38d2c6fca0 gcc/fortran/trans-types.c ++3a0a015557497b74675a5808c440f290 gcc/fortran/trans-types.c + 82b8673b874f75d8200f4128222beeee gcc/fortran/trans-types.h + adca0f1898c7b04c8e1d9aee387964bd gcc/fortran/trans.c + 584e7bad1d3257b528944c0a88ac18e9 gcc/fortran/trans.h + ce4ba327ea19d94b982917bf5b2884d4 gcc/fortran/types.def + e02967179fdfb529c8aff94baaf469c2 gcc/fp-test.c +-59bd42fe759500cea34d37618a023b2e gcc/function.c ++b61f1a62642aad6032bd3875e55d56ac gcc/function.c + 047cfc91e18845f3b5cf442dbbdd1ee7 gcc/function.h + 497184e6dc781c16b3012d224ab58dd0 gcc/fwprop.c + 51d4643fae226ae5cb6c726118db12a3 gcc/gcc-ar.c +@@ -4731,7 +4696,7 @@ + 22091c79c390a71cf211f90328383954 gcc/gcc-rich-location.c + 6ab0670ac8edcc1a6f5cd76e7e47a982 gcc/gcc-rich-location.h + 3ec648b31caf0bcc6b2062384510367b gcc/gcc-symtab.h +-c8beb6d15ada1f869e8a126ba1fe0944 gcc/gcc.c ++1c6a4afc775cce3b78a2d8cedde32118 gcc/gcc.c + 8a5a93ab3252c5ded6be74e451700891 gcc/gcc.h + 1bf3695cc620fbe4091e454d41be48a5 gcc/gcov-counter.def + 46c61075acf42b3a7891409b607f0d19 gcc/gcov-dump.c +@@ -4766,7 +4731,6 @@ + 25b1b08c7f2e15a61f67137a395f2be5 gcc/genextract.c + 282f3c7433a024d985ddccc10c82d417 gcc/genflags.c + d44b194500c23b5c542dbac2c46abcec gcc/gengenrtl.c +-48ade094be628d6e2f9bf4c0255ab482 gcc/gengtype-lex.c + 5a1368b972210328f48b0ea87a7191c1 gcc/gengtype-lex.l + ff52666a6b0aebb48f2a4f746fe39b50 gcc/gengtype-parse.c + 0151a4b7715cf1cb836ee33cf7bfdf27 gcc/gengtype-state.c +@@ -4776,7 +4740,7 @@ + 3be5935abab096a672b81c80b559ef1b gcc/genmatch.c + 07b0962a5b0ac2a5f29d44d710ce1ea7 gcc/genmddeps.c + 43130364faec8aac159d938938a22fad gcc/genmddump.c +-7ecbd5f6591a89cdfd2fa1fff7b6db01 gcc/genmodes.c ++7c6aaaace1e7de1494b16ba3c1abbdb0 gcc/genmodes.c + ed5f5653c43e59c6b9281e0950f9666d gcc/genmultilib + 5dc9ce1d95f7efc01f7131e05df3e506 gcc/genopinit.c + 6b491dad9092e779224522d123ead72d gcc/genoutput.c +@@ -4795,7 +4759,7 @@ + 18fb4705ad51bdf06734fbcfc8e39d64 gcc/gimple-builder.h + f4acee1cf4c45a5b6db4d0ce9806d3cd gcc/gimple-expr.c + c17954a852b3ab19a3008cca3b24c128 gcc/gimple-expr.h +-b0cdbb6b0843346f1808c16e699dcbee gcc/gimple-fold.c ++a86905e31e7631aeec47b8745ae228f1 gcc/gimple-fold.c + 8951c8587158bdc60d4e7d612c6f838c gcc/gimple-fold.h + a14e519ebabb942d1e8a48a4403acab5 gcc/gimple-iterator.c + efd0e45c5f633c150550050337d54cd2 gcc/gimple-iterator.h +@@ -4818,12 +4782,12 @@ + 8c571fcc3b1ac0c3989e3a4973246484 gcc/gimple-streamer.h + 5b4269de0e90ff1a0e228f16c36acf15 gcc/gimple-walk.c + ad1356d1aee1bfaba3647e9dd12fb0bc gcc/gimple-walk.h +-e38c521db81137fc28162233d6a5c618 gcc/gimple.c ++b174a67cf43b8c8919274680e0b3ed21 gcc/gimple.c + 65f6f08852f115424e8495c343dcba61 gcc/gimple.def + 641cc4b975ba19a5b0e628733901c0cd gcc/gimple.h + e679c1b4ca7b2361262d0c6fa84805d2 gcc/gimplify-me.c + 16af853ca2f3e873e723eb5ff29a8168 gcc/gimplify-me.h +-965c6bde778d881723e3447c823a254f gcc/gimplify.c ++c685b720121fa09a6b261d5e5056561b gcc/gimplify.c + 89047a7045c4653b6016516742695593 gcc/gimplify.h + f8d3ba18b33f417a9767d330d93c0783 gcc/ginclude/float.h + 619900a9f2191899ea818da9819f1182 gcc/ginclude/iso646.h +@@ -4901,10 +4865,10 @@ + 02e7e8c97cb2d8864b2f8a3135ed0011 gcc/graphds.c + 43af169612c4e4d04e00673de385a56b gcc/graphds.h + 800359328b63c4c5c0ef9d59bad00fca gcc/graphite-dependences.c +-1527a741b446889615bccc68cd40c1ed gcc/graphite-isl-ast-to-gimple.c ++b3037189d263bf2518bd3521a8652edb gcc/graphite-isl-ast-to-gimple.c + d7586bd35c3d11933ceb61445987b1be gcc/graphite-optimize-isl.c + 44fa75ae4f5cb0ac377521ea75ea1739 gcc/graphite-poly.c +-a6fb22307a3a995855f46e2bb900025b gcc/graphite-scop-detection.c ++24cb5670390b40885b9f7e8cbc9e8f2d gcc/graphite-scop-detection.c + 2145e44f71f0e71c5d7525d412b11dc6 gcc/graphite-sese-to-poly.c + 5b53b1f39257a74d35d74267a10667d2 gcc/graphite.c + e2a89ed2d54d88eb79e9c45ac760ba2d gcc/graphite.h +@@ -4930,7 +4894,7 @@ + 3b0d55aa66be65dbe57933c94fa21773 gcc/hsa-brig-format.h + 68951ed27601fde925296e7050c19b08 gcc/hsa-brig.c + 3b45b6386324afbef0330d9d8cdbc09d gcc/hsa-dump.c +-78fc9f283cc1eabaf8bd8d95e6461dfe gcc/hsa-gen.c ++cbd0b5366af70ed50a5aa9583995daed gcc/hsa-gen.c + 74ffebc0a61f0ac8bd7a90c8454cdc14 gcc/hsa-regalloc.c + ca9a2dd3e189ffb7385e163641e91f95 gcc/hsa.c + e13e5df371956a53173b7fb59f95b1d5 gcc/hsa.h +@@ -4954,7 +4918,7 @@ + f6eb1829b56b52c1a98e463764f15bb2 gcc/internal-fn.h + fdde96aa99d01f4a2e122427c73416e1 gcc/intl.c + 364233341b4f1261da8627eb826e6269 gcc/intl.h +-8a05f2b124212ea048784639ae1805fc gcc/ipa-chkp.c ++26faa305263ec4b39061a74359f92d08 gcc/ipa-chkp.c + 0c2184ed06610d2b6afe4b6f4d417dbe gcc/ipa-chkp.h + f3a24a98107ccc8ad76113ede465029e gcc/ipa-comdats.c + 0da86e2392b6146c88d243312dd82027 gcc/ipa-cp.c +@@ -4962,15 +4926,15 @@ + 09da3707dcc58023f746ab4e5fabd815 gcc/ipa-hsa.c + 8cbeebf152275e9611ce91064d1006f3 gcc/ipa-icf-gimple.c + 455a02b19595e17d311284b20cd9946f gcc/ipa-icf-gimple.h +-a46784b0082b24c3723a6bd34efd2056 gcc/ipa-icf.c ++a42f3827f0d168e29f65c96a9e41e40a gcc/ipa-icf.c + 5021b0bbc0eb5fdd57764d9440bc112c gcc/ipa-icf.h +-937ec1ea45a11c5be2f5a51a4835000a gcc/ipa-inline-analysis.c +-55c5111a5231b83f1b37edd7c28362a2 gcc/ipa-inline-transform.c ++a218a778bd374b99f367df36983a2e05 gcc/ipa-inline-analysis.c ++02dbb68319cd1e4e8561bbcdc37e0b9d gcc/ipa-inline-transform.c + 6ffb5637e26835334d307237572a86d3 gcc/ipa-inline.c +-1ede16ebb03f841de4dd96f559a4147b gcc/ipa-inline.h ++5b9e28f57d5dcf8db033236d6d5ff9d7 gcc/ipa-inline.h + 6229fae545ec5dfe5099feff68acbc25 gcc/ipa-polymorphic-call.c + dd94f55f59c59919fcfe73719b53804c gcc/ipa-profile.c +-449b3b4152d0852cd2ec595c89f56dda gcc/ipa-prop.c ++6ece3a1963d838aa977b891f381ccc7f gcc/ipa-prop.c + 7a7386b290a6a93fcfde58bd22cfb1f2 gcc/ipa-prop.h + 74d1b10d200d7553ee6f2ca92c0887df gcc/ipa-pure-const.c + ef575b78ba6545da9a738bb6492ffaea gcc/ipa-ref.c +@@ -4982,7 +4946,7 @@ + d01eb784d4a63008ba2460c3b47972b2 gcc/ipa-utils.h + 380724728441c80c569b8ee31d8ab4f1 gcc/ipa-visibility.c + f5194dfc342426fb120aa6ef0dac2984 gcc/ipa.c +-bb05e32e874641496c916e3bbe6bd1d5 gcc/ira-build.c ++d40b36379402518db3bf0d60d97b5b55 gcc/ira-build.c + 964fe62f78d9da617c7eb903c20eb3da gcc/ira-color.c + e983cefc45ef903cf9ff61d0968b3bab gcc/ira-conflicts.c + 4a40c778a56feadfe0bd42965dbe084b gcc/ira-costs.c +@@ -4992,7 +4956,7 @@ + 048a61ff1463a425c9c13312cc4f2b77 gcc/ira.c + 74580aa160542aa4992d6a08ca5bc8f2 gcc/ira.h + 31f4d25e8f125875a26ac35cbc927cb8 gcc/is-a.h +-ffc43ab034b5486bf1b22c4e25652589 gcc/java/ChangeLog ++ceee6770040d5c58de02381d5a65fb30 gcc/java/ChangeLog + 507793f7d137759eaebce11bb6904781 gcc/java/ChangeLog.gimple-classes + c52fb3faa0748d26588a8c62e7a032e3 gcc/java/ChangeLog.jit + 3becfaac793f49e1f52cd74e78172b48 gcc/java/ChangeLog.ptr +@@ -5003,7 +4967,7 @@ + dd4e349eb537ed7cee7033421af1777f gcc/java/class.c + 08aee25cbbca0291809291e30cdd28e9 gcc/java/config-lang.in + 597e80cf93fe17c733b3325596a87089 gcc/java/constants.c +-62abdb3fb4dda2d1403f2255fcf02e67 gcc/java/decl.c ++4357af4636c74da6a36170ca55e3d8da gcc/java/decl.c + 87a5f387a742a553449af36a17f3d81f gcc/java/except.c + 193d30afff097161bfcd483e0fbf9389 gcc/java/expr.c + 6ca90df13b6db79a291d03502b2d026a gcc/java/gcj.texi +@@ -5157,7 +5121,7 @@ + 0e62588ade895bd5b41e9a9f468db224 gcc/lto-streamer-in.c + b93b516820b533bd1682f7a148299c10 gcc/lto-streamer-out.c + bdae986759b0d2c19d10cd95a3469cd6 gcc/lto-streamer.c +-239c64daad087416ff10a8a4cee81b36 gcc/lto-streamer.h ++cbc225f3a9d78c6fa301299f140baa3b gcc/lto-streamer.h + fdd4f9b1c13609e47f794ce0d6f0e8da gcc/lto-wrapper.c + 1ecfbd8094590b170282d2a351b69028 gcc/lto/ChangeLog + bdc9ad4ddf80ce5b1548924f27f8df54 gcc/lto/Make-lang.in +@@ -5176,9 +5140,9 @@ + 7055ad53a5a9d81672428d858bc0affe gcc/lto/lto.c + ccfecfc6344c571f12776c61c50b98e1 gcc/lto/lto.h + 1ad92c4f2096f1f11a9d722298472ee5 gcc/machmode.def +-2c8fae29dd077ed25751d1dd04ca361f gcc/machmode.h ++89fb633ceadc86168379eec86b822225 gcc/machmode.h + cf42eb61030c258fdda933a353c46798 gcc/main.c +-cd34301f756f23f585a735b5e74be501 gcc/match.pd ++541198a830d7864394eae8377a18b824 gcc/match.pd + b4586a3a75b5dc7b5d62ccb834ea81ef gcc/mcf.c + 2befd16012fa1d3dc246e33d405b79f8 gcc/mem-stats-traits.h + 3e4b7d3dfbb311377553673371f9561e gcc/mem-stats.h +@@ -5216,7 +5180,7 @@ + 7d680f67db0eb1b8ff1b353ceb2caa2c gcc/objcp/objcp-decl.h + 8cfb48ffee764ccd1ab5dbf70f0234e0 gcc/objcp/objcp-lang.c + 742609336d1f57839866345f3fe16a98 gcc/omp-builtins.def +-4933dc01313d0d9f8a01f52eee41e354 gcc/omp-low.c ++264284b664c34974388708ea2973fc49 gcc/omp-low.c + 17f7f9a5279dd46aca82fdd23c6ed175 gcc/omp-low.h + 56f009a0f93f52fc6e4bec4b17949a48 gcc/omp-simd-clone.c + f773f4ea009b64414353473ab70fc22d gcc/opt-functions.awk +@@ -5235,11 +5199,11 @@ + 5d7c8672928d8e9cb91ef0f415fdbedc gcc/optc-gen.awk + c4436c027680fe15e299195629d8d8ab gcc/optc-save-gen.awk + 0d8d3a459ed81fd2fa69cc19981521a8 gcc/opth-gen.awk +-ff58d1ec1d48045472754120b193b85c gcc/opts-common.c ++99b50659a43b24a13195fa23816dcca5 gcc/opts-common.c + 52240b1476d05158d2811656568e12f0 gcc/opts-diagnostic.h + 2f24b289e6b216a31c7775b6bcbe41e4 gcc/opts-global.c + b2e8f32205053e2c288e98224914182a gcc/opts.c +-6af4347f770893f6a8f33ce0d86e55da gcc/opts.h ++8bd47fc4db78292cef3e264347c4e0d3 gcc/opts.h + f7daf01f2540429baa36f933638dd34d gcc/output.h + ffc82aaffe672d77f230f006908b6fd0 gcc/params-enum.h + 6d350f6a56aff3c29a7b7ca665bc7c77 gcc/params-list.h +@@ -5252,48 +5216,29 @@ + c35d166939d6fdbd9bb5853c96bb673b gcc/plugin.c + 03231f119da6e6638a69e3c5111324f8 gcc/plugin.def + eb08b5caab095677d912ce793705caf7 gcc/plugin.h +-c896550ea8a704b726f70ca8cbe9f083 gcc/po/ChangeLog ++ba8a67e2a742b229f49c824c74fdb505 gcc/po/ChangeLog + b2d1566753aedf7900d55d33f985138c gcc/po/EXCLUDES +-73f5a360156bb96df0876f8ae49ee539 gcc/po/be.gmo +-858a8db5418c9d759b39a4a7da86584a gcc/po/be.po +-34603ebce82e592915a19c8e7c06f46b gcc/po/da.gmo +-f2678a98410da89c6ec8aa2b1908d0c6 gcc/po/da.po +-fa35eedf6605508229d033bc58e2a1f0 gcc/po/de.gmo +-1b41215282905586b826b85e24c8d1a3 gcc/po/de.po +-7e7ab58b8fc61fe93e33decf96ef8c73 gcc/po/el.gmo +-6b015487bd35c40a3fb5996908172cda gcc/po/el.po +-053a5568dc887cbbc880dfc566074b43 gcc/po/es.gmo +-d7b7435f6bfba7bcf40b5414a1358ea3 gcc/po/es.po ++da41f20602b08cf3060fdc3573e8bcf3 gcc/po/be.po ++94220484b47be9ea5471835c19a32a5b gcc/po/da.po ++739379c3b5456e6649601d0c629fd327 gcc/po/de.po ++6db04b03851e69d9513b958b788474a7 gcc/po/el.po ++cddbc322a1b9f50ba1b2de6c0235a2da gcc/po/es.po + f9ca050e999d59313ea3c78909a9f041 gcc/po/exgettext +-0e57143fe61f4f6ee0257ca229d161ad gcc/po/fi.gmo +-75abf91d71cecb1c755024e40d93ab22 gcc/po/fi.po +-b62f58644438cf2aaaae0f59982e73f8 gcc/po/fr.gmo +-b55a5d1e9f16c3a3aa2a44cfe4efec60 gcc/po/fr.po ++288d71e5a20c49fd49706768856b698f gcc/po/fi.po ++34a30c8ec15ddbd58918aa29b49d7faa gcc/po/fr.po + 7b979b2fb5ee1d4b22999b6b9f35f0d3 gcc/po/gcc.pot +-c2a77d92023af97b968c73b45528e1b0 gcc/po/hr.gmo +-e17454f620b1863396f3f2683af797ae gcc/po/hr.po +-f15aba6d908d5270942778e0ccbfb6cc gcc/po/id.gmo +-dd277eb29469e63bfe00ae4782905714 gcc/po/id.po +-77592ad1824b3f39700fe7b1894b1349 gcc/po/ja.gmo +-3fdef1cfc12a664bf8d23dde1e55244d gcc/po/ja.po +-2b1aa89972f54a139e091dbbeb7aa326 gcc/po/nl.gmo +-4605a46fbbc2dc43cf1ce2801b22d368 gcc/po/nl.po +-4a8ad42adb20bb31f9221cdbaa8f0d56 gcc/po/ru.gmo +-c15f983cd43fd56b2e0eed90ca85a5fe gcc/po/ru.po +-cd4395a161628525beb444f240c2307d gcc/po/sr.gmo +-fc88c9385f4e2e71082a6abd49bc898f gcc/po/sr.po +-ce69b0580d1817b86e13fd6c4428f476 gcc/po/sv.gmo +-e0a608252df131356ec65d17a9061c8b gcc/po/sv.po +-ff242c916dea333c8e317ec48003d4d1 gcc/po/tr.gmo +-45707ffef56abe9faf5b143a3bd3fdab gcc/po/tr.po +-4334a12890be23c351f96df0fffe489b gcc/po/uk.gmo +-baa5ef734ce0408426feb6b807ce880f gcc/po/uk.po +-29fda96b949730c3b7a8b4189bccabca gcc/po/vi.gmo +-f3ba9df1249e315a2d10d2cb75d5e357 gcc/po/vi.po +-6659d133d2a567dc01c9940413a53a17 gcc/po/zh_CN.gmo +-d8948f3a5f1de605509a5eb57b822e59 gcc/po/zh_CN.po +-c51a9eefbe0b85753a8853ac8eeb2caa gcc/po/zh_TW.gmo +-e0670c5e297590bdd0c77686fc15685a gcc/po/zh_TW.po ++abb2afd8fe7053a42cdea743592af384 gcc/po/hr.po ++ba1393a5c416098225a3f67e87525864 gcc/po/id.po ++26448d201f1c6a7c98d3da75046f49fb gcc/po/ja.po ++ea4a08bfee865ce879b44946bacb60eb gcc/po/nl.po ++71622d38892673e00a8acb1e9e495835 gcc/po/ru.po ++3d67f8989dd67ea4d0e1f94afa44e6e2 gcc/po/sr.po ++b6679504541e91960333afe4e78cf341 gcc/po/sv.po ++a986ac0aa1813678d4f968df72abdf9d gcc/po/tr.po ++289dcc1d2584b6c8ae1700abf19b1501 gcc/po/uk.po ++9a88bed7d4b0cfa06a9710a236f1dd37 gcc/po/vi.po ++6a15d527f4bb660ac2ebc11b87810e21 gcc/po/zh_CN.po ++14871a1a198c4b42159769507328fab2 gcc/po/zh_TW.po + 69cb8c2cd669d2ccb4d80d86bafa9b03 gcc/postreload-gcse.c + 136c02b2e1e680f2f1222e7b27b7719a gcc/postreload.c + 02aac36ac6c8089e57cdd45796f95237 gcc/predict.c +@@ -5353,7 +5298,7 @@ + a65b0839331cc74338b9a698a8c6516e gcc/sanopt.c + b765a177a40fac9fa436794081ec1a30 gcc/sbitmap.c + baf1028052c2a830de61b24d81ee5da7 gcc/sbitmap.h +-0aab6489f94f24f5fe2eafe5261de2dd gcc/sched-deps.c ++75438eaf5eff450c06d49e939f97fc11 gcc/sched-deps.c + d30bdfafacf75a59010d260990ec7582 gcc/sched-ebb.c + b3011146b1ff654e200cdd1c84fec4f0 gcc/sched-int.h + 39622a83269e62f7612fe8d39aea6bce gcc/sched-rgn.c +@@ -5386,8 +5331,8 @@ + 704b277d6624cf0434ceb4413e457e58 gcc/statistics.h + 7b179dec806446f7af9f32ba1fa83b4e gcc/stmt.c + db0a871bfd07020c451cf0485edc8552 gcc/stmt.h +-49f0ea4833afb345b5e18ca1f285b75c gcc/stor-layout.c +-e6d4593c48e3361d44b0e1053250fd6c gcc/stor-layout.h ++7e2228b71f5d90edc613ec0c4848cdac gcc/stor-layout.c ++364b3f58d3ac50134a8eefb5f91fa0ad gcc/stor-layout.h + 8e3a2b656051f3ce59d1cde56e90e8ff gcc/store-motion.c + f5f79d3f7f15413b9096d592037d0446 gcc/streamer-hooks.c + 1a4f5f53317ad7289c572457c76a8610 gcc/streamer-hooks.h +@@ -5406,7 +5351,7 @@ + 43bc671be91bb4d94848b3e7f27a2930 gcc/target.h + 390fdb346018f2dac89921ab740e4205 gcc/targhooks.c + 4e44e54a960fb8713cc9c2975d7d27f9 gcc/targhooks.h +-5787a5d3f70d58542e3517734f0ad8f1 gcc/testsuite/ChangeLog ++71f38c7eec649ccf0aa40be00b8367a6 gcc/testsuite/ChangeLog + 862f04afbd87da2cc6bc432c3f28430f gcc/testsuite/ChangeLog-1993-2007 + 029a5d8dacd25eb5d4711452ac448e5b gcc/testsuite/ChangeLog-2008 + 13ac28c41d51b66b4ec40dba6bd50f39 gcc/testsuite/ChangeLog-2009 +@@ -8145,6 +8090,7 @@ + 0a221c339accacadef51e91e2f07b9ba gcc/testsuite/c-c++-common/asan/pr63888.c + 2a794af8b446f3413fe5b973ea309b7b gcc/testsuite/c-c++-common/asan/pr64820.c + 430079f735bd0792e25216b9c0862dae gcc/testsuite/c-c++-common/asan/pr70541.c ++dee6718aa031ca364c15580524cba02b gcc/testsuite/c-c++-common/asan/pr70712.c + 53382ff9da47e361b5e5dc525d26e518 gcc/testsuite/c-c++-common/asan/red-align-1.c + 40dc4b3092482d9427dfbc9415f0b0a8 gcc/testsuite/c-c++-common/asan/red-align-2.c + 8940936501084c6e4d7f6d110ba612d8 gcc/testsuite/c-c++-common/asan/rlimit-mmap-test-1.c +@@ -8428,11 +8374,13 @@ + 25018148b12e7e9ba0bb52c882a3c39b gcc/testsuite/c-c++-common/goacc-gomp/nesting-fail-1.c + 318406ae2dc40af036abc40c46d96836 gcc/testsuite/c-c++-common/goacc/Wparentheses-1.c + a784e64918008022358c8ee789eb6150 gcc/testsuite/c-c++-common/goacc/asyncwait-1.c +-8c9f8683e5b47206924e6f5b01d98e86 gcc/testsuite/c-c++-common/goacc/cache-1.c ++f2b008762a25069d1c4d34ad85325ccc gcc/testsuite/c-c++-common/goacc/cache-1.c ++23d462264295eb148c028e9cc0c451ea gcc/testsuite/c-c++-common/goacc/cache-2.c + ed0df84115a0f8b333602804bdee2a95 gcc/testsuite/c-c++-common/goacc/clauses-fail.c + 8bfd01f209498815723e71000488572c gcc/testsuite/c-c++-common/goacc/collapse-1.c + ca2517a3cc3cd3ae7a63df0a68ad4598 gcc/testsuite/c-c++-common/goacc/combined-directives-2.c +-6a3920d3728f9ade384ff4fd7f3a5d2c gcc/testsuite/c-c++-common/goacc/combined-directives.c ++4b20350010ccaafbe6720c0beec63fb9 gcc/testsuite/c-c++-common/goacc/combined-directives.c ++c68fccfb3ff8b00b01d51396677c6d59 gcc/testsuite/c-c++-common/goacc/combined-reduction.c + 6ff2b7486e948a4634adb071ea7906c0 gcc/testsuite/c-c++-common/goacc/data-1.c + c6b67854e61db0e6384c49c9402e9939 gcc/testsuite/c-c++-common/goacc/data-2.c + b0b60bf50600ebe553878a82dfa99c8d gcc/testsuite/c-c++-common/goacc/data-clause-duplicate-1.c +@@ -8531,7 +8479,7 @@ + 99033a31ad0844a80bb561d39f21bc2c gcc/testsuite/c-c++-common/gomp/atomic-8.c + a6583e4cf6c5bb3b1a46172a0635d197 gcc/testsuite/c-c++-common/gomp/atomic-9.c + 6eec1bac67576f5cb167599634a153cb gcc/testsuite/c-c++-common/gomp/cancel-1.c +-443946b78808c77b5280fbe5ad4c87ff gcc/testsuite/c-c++-common/gomp/clauses-1.c ++4643decfdedb2843b4b2903c5f686d54 gcc/testsuite/c-c++-common/gomp/clauses-1.c + aeca3a50d934c2d4e5e18c86aa8ec65c gcc/testsuite/c-c++-common/gomp/clauses-2.c + 657094047e2432f3bc3c5cafde1eafcd gcc/testsuite/c-c++-common/gomp/clauses-3.c + 8d9ef02ce9840a58a8c64026e4df30b2 gcc/testsuite/c-c++-common/gomp/clauses-4.c +@@ -8592,6 +8540,8 @@ + f230f09eac11df86e31192d6bf15c8d3 gcc/testsuite/c-c++-common/gomp/pr67521.c + befbc361d92f725fefa0029d54d3c22b gcc/testsuite/c-c++-common/gomp/pr70550-1.c + 4c7e38cbcd8c76fb43d8ce5a9a036711 gcc/testsuite/c-c++-common/gomp/pr70550-2.c ++9c6ccd1b697ca4b2f7de134bafdfda56 gcc/testsuite/c-c++-common/gomp/pr71371.c ++8d4187a1bda8777b2ff9ff3a8693ac86 gcc/testsuite/c-c++-common/gomp/pr71758.c + 5d522e2f1f7455bc45f6c1f230d5a5b0 gcc/testsuite/c-c++-common/gomp/priority-1.c + 1dc7bbbafb91e179ac43fa3959ab125f gcc/testsuite/c-c++-common/gomp/reduction-1.c + a73d7c3b3886856e6621c6e5854c3333 gcc/testsuite/c-c++-common/gomp/schedule-modifiers-1.c +@@ -8714,7 +8664,7 @@ + cbe3fc815940c07168eae35940a68240 gcc/testsuite/c-c++-common/pr69558-3.c + 021fff0470a2865e5a38b50712393164 gcc/testsuite/c-c++-common/pr69558-4.c + 11a73961cd31ec2471c0e9cc3200e966 gcc/testsuite/c-c++-common/pr69558.c +-31a4c6dc3751ea2efa2efa81ce54fc52 gcc/testsuite/c-c++-common/pr69669.c ++388b963ce0a6d74b387fe44e74666652 gcc/testsuite/c-c++-common/pr69669.c + dc7d9d40dac973e012fc8b7b6f54d784 gcc/testsuite/c-c++-common/pr69764.c + f4386df5fa5c32d56388c75bdf15c9d4 gcc/testsuite/c-c++-common/pr69797.c + 65bc4d5f65c8acc789b20b18a397a09c gcc/testsuite/c-c++-common/pr70144-1.c +@@ -8723,6 +8673,7 @@ + 25c6ea4844eb15010d49a3780fb6bb37 gcc/testsuite/c-c++-common/pr70297.c + ccc164356d4817396e516749bf924ce8 gcc/testsuite/c-c++-common/pr70336.c + ddcfc64c63208f870fb7e0fe0276319d gcc/testsuite/c-c++-common/pr70651.c ++ab8ceba35b76e5122ef1d15e5a6d31ba gcc/testsuite/c-c++-common/pr71372.c + b0ba836310044e7b419ef679f0b48d6f gcc/testsuite/c-c++-common/raw-string-1.c + 554e7071d2525351de28445762633866 gcc/testsuite/c-c++-common/raw-string-10.c + fc54e7227094f307fa566b3a8cd0ba9a gcc/testsuite/c-c++-common/raw-string-11.c +@@ -8901,6 +8852,7 @@ + f7ac21b5467fdafd31e4d63c13bba697 gcc/testsuite/c-c++-common/ubsan/bounds-10.c + 8a79b5ac2324b237d4b97f40d8caef20 gcc/testsuite/c-c++-common/ubsan/bounds-11.c + c0cea811b60785fdbeb5a8c17cbfe97d gcc/testsuite/c-c++-common/ubsan/bounds-12.c ++e41a9c9640280bfabdc970ff41f1e444 gcc/testsuite/c-c++-common/ubsan/bounds-13.c + 5ce7dbfd4301c9cde8b861eef45a151b gcc/testsuite/c-c++-common/ubsan/bounds-2.c + e7f60e0642d24587e57ad55271053c36 gcc/testsuite/c-c++-common/ubsan/bounds-3.c + 55d21c141077691618a0992441b77856 gcc/testsuite/c-c++-common/ubsan/bounds-4.c +@@ -9522,9 +9474,9 @@ + 0f37e29f62414944ff8ae0b75a77f2c0 gcc/testsuite/g++.dg/concepts/constrained-parm.C + b5e01f926b642aa30736fa60d24db29a gcc/testsuite/g++.dg/concepts/decl-diagnose.C + 391bcf94c298040bce05a2bc3c1fe6a6 gcc/testsuite/g++.dg/concepts/deduction-constraint1.C +-61025db31db6fc9bd377f8dbcc5b997c gcc/testsuite/g++.dg/concepts/diagnostic1.C ++ef831b23357717a1194aabd267da39eb gcc/testsuite/g++.dg/concepts/diagnostic1.C + d8f521f37e4f01ddd0581d00a83a9be0 gcc/testsuite/g++.dg/concepts/disjunction1.C +-d9435abbf2c120b3e86351722c471f92 gcc/testsuite/g++.dg/concepts/dr1430.C ++eca2e51caee3cfce80ec8e3714c464f4 gcc/testsuite/g++.dg/concepts/dr1430.C + 5088c07f3bb6eeb91fa790bf5e35ac12 gcc/testsuite/g++.dg/concepts/equiv.C + 8d8c066843ef43dad83d062249b81c9e gcc/testsuite/g++.dg/concepts/equiv2.C + 1952696facfb66a6315b0d4f4705c4ee gcc/testsuite/g++.dg/concepts/explicit-inst1.C +@@ -9538,7 +9490,7 @@ + 501c4dfeab8ff32a18f46ad605b6546d gcc/testsuite/g++.dg/concepts/explicit-spec5.C + 8119a7faeb5616c44ff49d2bd334eac9 gcc/testsuite/g++.dg/concepts/explicit-spec6.C + 96104c437a91a0fb547269950a1e36f4 gcc/testsuite/g++.dg/concepts/expression.C +-52f0561a49ff6a8c9b047023f5157daf gcc/testsuite/g++.dg/concepts/expression2.C ++9cd0bdf0163dc59d13bb259276c6ae5e gcc/testsuite/g++.dg/concepts/expression2.C + 87c2debb21e393a5ad7cace00e6e3ebc gcc/testsuite/g++.dg/concepts/expression3.C + 1014808baa24324e788c7dd8365e1ce3 gcc/testsuite/g++.dg/concepts/feature-macro.C + b7abb47c2caa2a79fd16fab511bb2732 gcc/testsuite/g++.dg/concepts/fn-concept1.C +@@ -9608,11 +9560,13 @@ + 027f2c7c0ad7e093a74f28f9d0d7d647 gcc/testsuite/g++.dg/concepts/req16.C + 561f41b46177b2306d20376cbf26d558 gcc/testsuite/g++.dg/concepts/req17.C + 8af4e2969556c6e997e15e5f597d1321 gcc/testsuite/g++.dg/concepts/req18.C ++9ffd899c33f7220af9323a4c2742bd97 gcc/testsuite/g++.dg/concepts/req19.C + fc37b1d1ffeb8646c92ec29e5dedb414 gcc/testsuite/g++.dg/concepts/req2.C ++0ca7d0d8ad43bd2d06816711d6448be1 gcc/testsuite/g++.dg/concepts/req20.C + 9240432b308eb3d01848b9219bf54574 gcc/testsuite/g++.dg/concepts/req3.C +-789edfd6a18eb7aefdb70de5ee2d7fc0 gcc/testsuite/g++.dg/concepts/req4.C +-e6fadc6e6565a21c82b671cf83db5509 gcc/testsuite/g++.dg/concepts/req5.C +-a837c9f121398c34d9d464990ba30ef4 gcc/testsuite/g++.dg/concepts/req6.C ++1bdb8c23a97fc02dc59b0fca6be8514d gcc/testsuite/g++.dg/concepts/req4.C ++a847d33fd2714f5bc1c7bf82c0176102 gcc/testsuite/g++.dg/concepts/req5.C ++9553bc47ec33281c4ec07de996a4989b gcc/testsuite/g++.dg/concepts/req6.C + cf1a1cf4f90160b4b86afb8e6484459d gcc/testsuite/g++.dg/concepts/req7.C + 16d982b507ffee80be5a1bc873fff0ea gcc/testsuite/g++.dg/concepts/req8.C + 8280cb973b01ac7880086901d73a394e gcc/testsuite/g++.dg/concepts/req9.C +@@ -9637,16 +9591,17 @@ + 28cce2ca57d1f29a0d0eade359d3c202 gcc/testsuite/g++.dg/concepts/var-concept4.C + 014df05bdbdfd4aef2968bb90ad28e65 gcc/testsuite/g++.dg/concepts/var-concept5.C + c0a0dd84a577ada307b7869dc3ea7612 gcc/testsuite/g++.dg/concepts/var-concept6.C +-b6115b5e4ac7a76ce3c27db80d14c531 gcc/testsuite/g++.dg/concepts/var-templ1.C ++d686009ae0430347493849435d065149 gcc/testsuite/g++.dg/concepts/var-templ1.C + e943848fb59fdc24e521fa408a8d7684 gcc/testsuite/g++.dg/concepts/var-templ2.C + 55d37ce4725b2bb2562b6bf081fb2d6e gcc/testsuite/g++.dg/concepts/variadic1.C +-1c6ba3dc03a4aac6e93ecddc77820621 gcc/testsuite/g++.dg/concepts/variadic2.C ++49188af171efd3fc7a4910e5f4c2ed79 gcc/testsuite/g++.dg/concepts/variadic2.C + b090b7633124e41a8ed5f692e4b2bdef gcc/testsuite/g++.dg/concepts/variadic3.C + 47d50ea9841dfff2e1add4fe21d8cdd8 gcc/testsuite/g++.dg/conflict-markers-1.C + f25f03bef75b49b3242b2b981a26687a gcc/testsuite/g++.dg/constexpr-null1.C + f0aed431ce3357281e21fdd3e10a7644 gcc/testsuite/g++.dg/conversion/access1.C + cae83e7bca15183b3b346f9a00467f2c gcc/testsuite/g++.dg/conversion/ambig1.C + 65bec450f1ba3239f73319431b72958b gcc/testsuite/g++.dg/conversion/ambig2.C ++722f350c4414b8268cd41e6ba6e87739 gcc/testsuite/g++.dg/conversion/ambig3.C + 692916f43054879ce077252221b118a2 gcc/testsuite/g++.dg/conversion/base1.C + f1b5334044ded17fb9949549b0502764 gcc/testsuite/g++.dg/conversion/bitfield1.C + 38f6bad87ae88f3b5e8814eb2a0cb3cd gcc/testsuite/g++.dg/conversion/bitfield10.C +@@ -9747,6 +9702,7 @@ + 74bb2cd707774dcc79b45b939b21d2a8 gcc/testsuite/g++.dg/cpp0x/Wnarrowing3.C + 98f5997ac53fff61b85f99bfe358a506 gcc/testsuite/g++.dg/cpp0x/Wnarrowing4.C + 6ae3451e0c7b222e73c985a0c76a4253 gcc/testsuite/g++.dg/cpp0x/Wunused-parm.C ++c9c65f2ce729014de1f8d5a02bf08a2a gcc/testsuite/g++.dg/cpp0x/Wunused-variable-1.C + 948a776d6405969529e65e69911b6f98 gcc/testsuite/g++.dg/cpp0x/Wzero-as-null-pointer-constant-1.C + 1821a76c969bbe9fe98225106370d360 gcc/testsuite/g++.dg/cpp0x/Wzero-as-null-pointer-constant-2.C + 1388db9b52c8fb258faed2c95049bb99 gcc/testsuite/g++.dg/cpp0x/__func__.C +@@ -9804,6 +9760,7 @@ + 8202db24e0fe65d1f9e1618bd0be1554 gcc/testsuite/g++.dg/cpp0x/alias-decl-50.C + 72736d15450a5e2c6eff6d212a1c62ea gcc/testsuite/g++.dg/cpp0x/alias-decl-51.C + ff3cdd35e9b74954a4247257ac643335 gcc/testsuite/g++.dg/cpp0x/alias-decl-52.C ++aeae7dcc61eb495ebb095caa00a5f429 gcc/testsuite/g++.dg/cpp0x/alias-decl-55.C + a16b0e12dce894e9bc097e3fbad8787d gcc/testsuite/g++.dg/cpp0x/alias-decl-6.C + 816dbf372a71890f9515376534ec312b gcc/testsuite/g++.dg/cpp0x/alias-decl-7.C + 77aa48fcd9f9b9ffab08fa7ebc5d52e2 gcc/testsuite/g++.dg/cpp0x/alias-decl-8.C +@@ -9820,6 +9777,7 @@ + f441b8f61e57b375afffc578a0ab410b gcc/testsuite/g++.dg/cpp0x/alignas3.C + 842d4bc39d9ce4591190d72ce324a6a8 gcc/testsuite/g++.dg/cpp0x/alignas4.C + 2490568ef637fae72e27c31a035040f2 gcc/testsuite/g++.dg/cpp0x/alignas5.C ++6cd5b5dc6ccc7b589a806bdced15c4db gcc/testsuite/g++.dg/cpp0x/alignas7.C + dad14da1d0b01a33c9cdabaaf609eb0a gcc/testsuite/g++.dg/cpp0x/alignof.C + f6ed96119608d817c8a36a47de91e2bc gcc/testsuite/g++.dg/cpp0x/alignof2.C + a341935f38f4b4581206e23c9027c975 gcc/testsuite/g++.dg/cpp0x/alignof3.C +@@ -9866,6 +9824,7 @@ + d9b716e1c070d979f6ba213732af91c4 gcc/testsuite/g++.dg/cpp0x/auto45.C + 19479e39ea80e3649e4b4b41c4c2abeb gcc/testsuite/g++.dg/cpp0x/auto46.C + 44db23ed368948ddb9b1a48f48c7bdaa gcc/testsuite/g++.dg/cpp0x/auto47.C ++a9475f77c4033a39fd7cae71ded2db91 gcc/testsuite/g++.dg/cpp0x/auto48.C + 7abd7f6467fdec05adaab6e23e984bfb gcc/testsuite/g++.dg/cpp0x/auto5.C + a2ff527dcef7e9b2af2703655b2eda60 gcc/testsuite/g++.dg/cpp0x/auto7.C + e90d2ff3c84b5ead3e920a1d12881e02 gcc/testsuite/g++.dg/cpp0x/auto9.C +@@ -9928,6 +9887,7 @@ + 6d2a7bdbddfaf87d584b814bf1961f04 gcc/testsuite/g++.dg/cpp0x/constexpr-70204b.C + 4b441a48b11747fe319801157a36c4a6 gcc/testsuite/g++.dg/cpp0x/constexpr-70323.C + afb210848d078a6555666048b75692fb gcc/testsuite/g++.dg/cpp0x/constexpr-70323a.C ++34638f51d99af855474a3feb1f02e5d7 gcc/testsuite/g++.dg/cpp0x/constexpr-71828.C + de3d6255780c29f63df3f8d96932bd39 gcc/testsuite/g++.dg/cpp0x/constexpr-98.C + 1bc1c995533b047ed8df6f6f24905cd1 gcc/testsuite/g++.dg/cpp0x/constexpr-99.C + 3ccc1912e7827aae6b55936a3bf3bb24 gcc/testsuite/g++.dg/cpp0x/constexpr-__func__.C +@@ -9955,6 +9915,8 @@ + c674590e5f0bbd6aa35938ccaa364818 gcc/testsuite/g++.dg/cpp0x/constexpr-array13.C + a3fe89999694d5e28c05f50283b43674 gcc/testsuite/g++.dg/cpp0x/constexpr-array14.C + 9a2ca70ccd537baf9a32359fd8f4b890 gcc/testsuite/g++.dg/cpp0x/constexpr-array15.C ++0d357130ee7bed073a309d7d917b8baa gcc/testsuite/g++.dg/cpp0x/constexpr-array16.C ++b67bdded4c1fdae8a63fc397fa97f855 gcc/testsuite/g++.dg/cpp0x/constexpr-array17.C + 687c6e77d4af3cd918c0ff421773a66c gcc/testsuite/g++.dg/cpp0x/constexpr-array2.C + 8b7c8e7c1b64cfa0626f7f2311c9fef5 gcc/testsuite/g++.dg/cpp0x/constexpr-array3.C + 6451aa5bb5fa736dda3ebad1dc2e8336 gcc/testsuite/g++.dg/cpp0x/constexpr-array4.C +@@ -10123,10 +10085,11 @@ + 4d49e9b974a931e39b282bff1452e17a gcc/testsuite/g++.dg/cpp0x/constexpr-ptrmem3.C + 3123b806108a774709cd5a02856fa2a3 gcc/testsuite/g++.dg/cpp0x/constexpr-ptrmem4.C + 207019aa55e1983b45122db974bd0948 gcc/testsuite/g++.dg/cpp0x/constexpr-ptrmem5.C ++bdbdee9b8211644ca4eaf7ef1be48857 gcc/testsuite/g++.dg/cpp0x/constexpr-ptrmem6.C + 32da508b62d5ba45ac51680a9a5638a4 gcc/testsuite/g++.dg/cpp0x/constexpr-ptrsub.C + c893e2388f9acef593b874b1e6b02071 gcc/testsuite/g++.dg/cpp0x/constexpr-pure.C + 3d462eb6b34feb0c1cf9349c9e6e976c gcc/testsuite/g++.dg/cpp0x/constexpr-recursion.C +-e928dbbe606fe0e66600ffb39f8ec1ac gcc/testsuite/g++.dg/cpp0x/constexpr-recursion2.C ++d0613cd67d583f80a028bb4816e6c9e8 gcc/testsuite/g++.dg/cpp0x/constexpr-recursion2.C + 5e160a188aef7805034f272bd43d2ab7 gcc/testsuite/g++.dg/cpp0x/constexpr-redeclaration1.C + dc7a7eb622691a6363e90822f0e39072 gcc/testsuite/g++.dg/cpp0x/constexpr-ref1.C + d1d1aecd66ba1c7f2b50e13b37172d43 gcc/testsuite/g++.dg/cpp0x/constexpr-ref2.C +@@ -10204,7 +10167,7 @@ + 58e380f5c0bc16e86009e605e19acb07 gcc/testsuite/g++.dg/cpp0x/constexpr-volatile.C + 7bca20d6ac21d6cb78ab16d5c52b7e64 gcc/testsuite/g++.dg/cpp0x/constexpr-wstring1.C + 1bd363de99cf0f80a7a4045242fee01f gcc/testsuite/g++.dg/cpp0x/constexpr-wstring2.C +-dd5a416dd6cf70c8d633073c2bdfd8b3 gcc/testsuite/g++.dg/cpp0x/conv-tmpl1.C ++70dc080523c40a07cec30261f6f7007a gcc/testsuite/g++.dg/cpp0x/conv-tmpl1.C + 38cf671e2c9af718ef5149c2d09c8383 gcc/testsuite/g++.dg/cpp0x/cplusplus.C + 61947bc3307a11bf874ab41c139e4d41 gcc/testsuite/g++.dg/cpp0x/cplusplus_0x.C + 785a499e3417eea504fae30dbd16a77f gcc/testsuite/g++.dg/cpp0x/dc1.C +@@ -10287,6 +10250,7 @@ + 052b7eec67bbc39fded7404fdeff4428 gcc/testsuite/g++.dg/cpp0x/decltype61.C + b7d187347381223b6effdb89e05e85df gcc/testsuite/g++.dg/cpp0x/decltype62.C + e0815b98196aea0739acd0b3e2b6b78f gcc/testsuite/g++.dg/cpp0x/decltype63.C ++d2625dbb2a029ee93a5c64304e4db88e gcc/testsuite/g++.dg/cpp0x/decltype65.C + c3626f3b26fbb53bd234a4e39649b63f gcc/testsuite/g++.dg/cpp0x/decltype7.C + bbdff105c665351973aaa6a25eaa0940 gcc/testsuite/g++.dg/cpp0x/decltype8.C + 4b13c00f57a3a7cb225369c29f8fd6f6 gcc/testsuite/g++.dg/cpp0x/decltype9.C +@@ -10534,6 +10498,8 @@ + d3df2168b01c7df3891e31a076616e58 gcc/testsuite/g++.dg/cpp0x/inh-ctor18.C + 798dc3612d523e6b99b6a497b1f8ae60 gcc/testsuite/g++.dg/cpp0x/inh-ctor19.C + 69ee4b066e7054d7163a882761fcc7c7 gcc/testsuite/g++.dg/cpp0x/inh-ctor2.C ++1e245cab6f0228068139bd22ddc79d66 gcc/testsuite/g++.dg/cpp0x/inh-ctor20.C ++ae53be78261501cbb9b25c7630f78cb5 gcc/testsuite/g++.dg/cpp0x/inh-ctor21.C + 6a7a4b5897b83f2f6ebdd08eb567d152 gcc/testsuite/g++.dg/cpp0x/inh-ctor3.C + 071eafda7f7d2d4bff42921fbd048a45 gcc/testsuite/g++.dg/cpp0x/inh-ctor4.C + fda4f7d4f4b57c79d7734d634ae9041f gcc/testsuite/g++.dg/cpp0x/inh-ctor5.C +@@ -10558,6 +10524,7 @@ + e3ec7ab89d20e6ccf50aa92954896f07 gcc/testsuite/g++.dg/cpp0x/initlist-postfix-open-square.C + 1b5c7e432be89c3edcbfaad424a2e353 gcc/testsuite/g++.dg/cpp0x/initlist-protected.C + fd02e573e3be3d0a146192cd840840a1 gcc/testsuite/g++.dg/cpp0x/initlist-pure.C ++b981bb775821a5230961a162ba38ff43 gcc/testsuite/g++.dg/cpp0x/initlist-template1.C + 742c772ced8eedc3c0511b94b8410082 gcc/testsuite/g++.dg/cpp0x/initlist-value.C + fab23eb9efdcf1b8c0f8393aa5ad7913 gcc/testsuite/g++.dg/cpp0x/initlist-value2.C + 93763afe3eb7edb5553f76daf0ed0de3 gcc/testsuite/g++.dg/cpp0x/initlist-vect.C +@@ -10690,6 +10657,7 @@ + fc87adf1aa8763a35e80b1067faf9948 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const5.C + 25265bcafc26c3a0ab3727a9ff348916 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv.C + 862ed5b4e67a8a0e32b42b5792ae7fff gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv10.C ++522c3e9a3e7905c1f6e87fc6ce263930 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv11.C + 299fbfde279f22ba6cf7e79d7e17f49b gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv2.C + 13859d1112ce3900c792dcdc2e8ae085 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv3.C + b91c55a7472ec7a8d2f35a01f04cc387 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv4.C +@@ -10737,6 +10705,7 @@ + c4dbb33289335abfc0e81ecec97d4f05 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice13.C + dc3a51c8d29b09710666fc488cca027c gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice14.C + 1042a4840f48bd0952ae8bb7b25b0885 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice15.C ++37dfc8c9afae1533f73b7fca269e891d gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice16.C + f7f1dbbd136c0efa4e64ac7431acecd4 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice2.C + 32e4ddab4dbbba84634a9be94759430d gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice3.C + 47226bea0ac5dc3c286fd8fe05473a80 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice4.C +@@ -11095,6 +11064,9 @@ + ab186fe632aff8530f69060d5961b489 gcc/testsuite/g++.dg/cpp0x/pr68726.C + d584417478a609ab589447aa7e173812 gcc/testsuite/g++.dg/cpp0x/pr69056.C + 4ca96cbe7b69845eba2cf016007957a4 gcc/testsuite/g++.dg/cpp0x/pr70528.C ++cf9cf154014255688dedeb39cfe8e73b gcc/testsuite/g++.dg/cpp0x/pr70869.C ++c69896dc2fac3243e492d5e8acf8d0b8 gcc/testsuite/g++.dg/cpp0x/pr71054.C ++bf28b34cff6af29465046bf24b9bff82 gcc/testsuite/g++.dg/cpp0x/pr71739.C + 53428f69a6d0153074c9b06ee9fbe9e7 gcc/testsuite/g++.dg/cpp0x/ptrmem-cst-arg1.C + 6e8e648c26d9bf237cc152180e88c2c2 gcc/testsuite/g++.dg/cpp0x/range-for1.C + 5c7a98d8ca2f0f427c081bf6902aa831 gcc/testsuite/g++.dg/cpp0x/range-for10.C +@@ -11120,11 +11092,12 @@ + 64c77a507ebcd58347cb4a538ae16807 gcc/testsuite/g++.dg/cpp0x/range-for29.C + ba9e5975a5058b94945c4d18bb19b344 gcc/testsuite/g++.dg/cpp0x/range-for3.C + 4b0681c49d2c294d37da68e8ae679248 gcc/testsuite/g++.dg/cpp0x/range-for30.C ++2e0b59cf549f3ada1e2c24f0828fd564 gcc/testsuite/g++.dg/cpp0x/range-for31.C + cf3faabae812bd6f8ade13f3c1d36871 gcc/testsuite/g++.dg/cpp0x/range-for4.C + 9d70da20463079b62be580867a3e6601 gcc/testsuite/g++.dg/cpp0x/range-for5.C + bf09a13cfe61445a898ea383c44bc795 gcc/testsuite/g++.dg/cpp0x/range-for6.C + cf6c66c2c1f26f78f53b3a006d996662 gcc/testsuite/g++.dg/cpp0x/range-for7.C +-52e4fd10daa41fb157218e52014c09f1 gcc/testsuite/g++.dg/cpp0x/range-for8.C ++b111f953ff16a99ffc3ad09a151f0958 gcc/testsuite/g++.dg/cpp0x/range-for8.C + 68a9925bd047631ad89890587ebf286d gcc/testsuite/g++.dg/cpp0x/range-for9.C + 87cba3bd81389f956a4ab8405ad5dc46 gcc/testsuite/g++.dg/cpp0x/ref-qual-mangle1.C + af4673410b97bcc5393dd82a2599c2d1 gcc/testsuite/g++.dg/cpp0x/ref-qual-multi-neg.C +@@ -11251,6 +11224,7 @@ + 6cdcb8a895c4b3868012fd320d412513 gcc/testsuite/g++.dg/cpp0x/sfinae54.C + 1e0939ee9e6841aacffde1ae4c5d3023 gcc/testsuite/g++.dg/cpp0x/sfinae55.C + c0fee994e880e6032fe6c1fa1a6efa69 gcc/testsuite/g++.dg/cpp0x/sfinae56.C ++2628399b955cc58affa3be676427e085 gcc/testsuite/g++.dg/cpp0x/sfinae57.C + 7d2a515d9dca41b0e82b2e6ea54bd2d3 gcc/testsuite/g++.dg/cpp0x/sfinae6.C + ec1a51ea3fd41e6e61c8f425bde1fd0b gcc/testsuite/g++.dg/cpp0x/sfinae7.C + 547894832b1452d5f513938e0cb8a166 gcc/testsuite/g++.dg/cpp0x/sfinae8.C +@@ -11385,6 +11359,10 @@ + aaa90c1c2261698f9319415498163db1 gcc/testsuite/g++.dg/cpp0x/variadic-function.C + fb23a824547af5cbc2d6ee6a52d5e3c0 gcc/testsuite/g++.dg/cpp0x/variadic-init.C + f64443a27f946984ec474714387b99a8 gcc/testsuite/g++.dg/cpp0x/variadic-lambda.C ++61d159a494882dad368e53517bf8df8d gcc/testsuite/g++.dg/cpp0x/variadic-mangle1a.C ++7727443a155c2eed9930c6bc3f808465 gcc/testsuite/g++.dg/cpp0x/variadic-mangle2a.C ++8dd845093d366e371bdaf222fda42413 gcc/testsuite/g++.dg/cpp0x/variadic-mangle3.C ++efdeb5b65b79fc6ff926b12f711edcb1 gcc/testsuite/g++.dg/cpp0x/variadic-mangle3a.C + 6c67e276177a53a05508b5e974504d12 gcc/testsuite/g++.dg/cpp0x/variadic-mem_fn.C + 7d2b8191fa109fd1786f979fbfa18b4e gcc/testsuite/g++.dg/cpp0x/variadic-new.C + 5ad1db01bdd9d87f2a8276b08cff8db7 gcc/testsuite/g++.dg/cpp0x/variadic-new2.C +@@ -11646,6 +11624,8 @@ + c62290c3433fd946afe248d80f2f0e63 gcc/testsuite/g++.dg/cpp1y/auto-fn29.C + c4e86a95bc6b38f69a4a30b1b1cf1e4e gcc/testsuite/g++.dg/cpp1y/auto-fn3.C + 51f8ba9d1f0f20256658a6298e611261 gcc/testsuite/g++.dg/cpp1y/auto-fn30.C ++2166d3092f2a511f64d91ad91795c1ac gcc/testsuite/g++.dg/cpp1y/auto-fn31.C ++f475a3e97ef5d08fb361f8070d183611 gcc/testsuite/g++.dg/cpp1y/auto-fn32.C + a87641c12e6bf65af1e8d592973cba76 gcc/testsuite/g++.dg/cpp1y/auto-fn4.C + eaab8c47716923537d6580ede6fbe3ae gcc/testsuite/g++.dg/cpp1y/auto-fn5.C + 3861eed28323480e4913eea3d9c0ec00 gcc/testsuite/g++.dg/cpp1y/auto-fn6.C +@@ -11702,28 +11682,34 @@ + 695cc86426b24103c2a80eda00cf2189 gcc/testsuite/g++.dg/cpp1y/digit-sep-neg.C + 2ccf049767734b973a90dea30576d8a8 gcc/testsuite/g++.dg/cpp1y/digit-sep.C + 7f7fdf0f184e22144c0d2d80c0827581 gcc/testsuite/g++.dg/cpp1y/feat-cxx11-neg.C +-c254f2d5cb21443479f2bf917857354d gcc/testsuite/g++.dg/cpp1y/feat-cxx11.C ++f7b649949cc8d31bf746a3565f161066 gcc/testsuite/g++.dg/cpp1y/feat-cxx11.C + a3ed2dff5176ed6eef5ae2d57cf13c3c gcc/testsuite/g++.dg/cpp1y/feat-cxx14-neg.C +-abea85deb4cd6b8a3a2d8a806b4779a7 gcc/testsuite/g++.dg/cpp1y/feat-cxx14.C +-3aa0ecb004b47e939728528453a77d12 gcc/testsuite/g++.dg/cpp1y/feat-cxx98-neg.C ++593fb77a3a5089f92e2c81898ae570ff gcc/testsuite/g++.dg/cpp1y/feat-cxx14.C ++d8f10984fce17881f14be647e37c6342 gcc/testsuite/g++.dg/cpp1y/feat-cxx98-neg.C + d9680a99825535ba499a795339ce02c2 gcc/testsuite/g++.dg/cpp1y/feat-cxx98.C + 01260d1a223a8398c967796299932d12 gcc/testsuite/g++.dg/cpp1y/feat-neg.C + 018149928d964ce66689bf4960400c07 gcc/testsuite/g++.dg/cpp1y/feat-sized-dealloc-neg.C + b7edad357bb503949f49802295729019 gcc/testsuite/g++.dg/cpp1y/feat-sized-dealloc.C + fc5875e8af08d0f9488344e80bf6f764 gcc/testsuite/g++.dg/cpp1y/feat-vla.C + f4be44f045dc9cb6f8b7acd5e3193c1d gcc/testsuite/g++.dg/cpp1y/fn-generic-member-ool.C ++2cf8b2b7a7dc5ba828766c37a54e2315 gcc/testsuite/g++.dg/cpp1y/lambda-conv1.C ++4734b77212418e40ce4f8965c6017a39 gcc/testsuite/g++.dg/cpp1y/lambda-conv2.C + 5f112fcc57ff57c8e803342bde4e9c25 gcc/testsuite/g++.dg/cpp1y/lambda-deduce-mult-neg.C + a5fcad1d0708a6218c6fe69c1871df02 gcc/testsuite/g++.dg/cpp1y/lambda-deduce-mult.C + 18a2431f49a5d003b8c4af0ee1ee26fb gcc/testsuite/g++.dg/cpp1y/lambda-generic-cfun.C + 043e19917f87f2b2acd754fc6d7db469 gcc/testsuite/g++.dg/cpp1y/lambda-generic-const1.C + 565bd59fb2dca8cbcfbfa5b7e1e94368 gcc/testsuite/g++.dg/cpp1y/lambda-generic-const2.C + 2e80b291e01a2cfa45ff49e595eefeb5 gcc/testsuite/g++.dg/cpp1y/lambda-generic-conv1.C ++4826d92e5c4d99fa506ff2e846ff01a4 gcc/testsuite/g++.dg/cpp1y/lambda-generic-conv2.C ++78cdb2dc3c8d671d96c375fa61f96dc5 gcc/testsuite/g++.dg/cpp1y/lambda-generic-conv3.C + 254c0618a7c86ead274dccfd78d8434f gcc/testsuite/g++.dg/cpp1y/lambda-generic-dep.C + 82fea772a2540cf9ab702c17cc2cdb54 gcc/testsuite/g++.dg/cpp1y/lambda-generic-ice1.C + 767d5be8b02f5e7228313580ecdc27bf gcc/testsuite/g++.dg/cpp1y/lambda-generic-ice2.C + fd449c2760b279bd0767e28da8a563bf gcc/testsuite/g++.dg/cpp1y/lambda-generic-ice3.C + 2d18bbc76edb8b7a9ae068d833d222fb gcc/testsuite/g++.dg/cpp1y/lambda-generic-ice4.C + 3982e2c97cd56293f3566844b67df18c gcc/testsuite/g++.dg/cpp1y/lambda-generic-mixed.C ++db3760d317d0220aeddc9a1ce4072105 gcc/testsuite/g++.dg/cpp1y/lambda-generic-static1.C ++c6cfff44332b8bfb7c52ace4e1af76c5 gcc/testsuite/g++.dg/cpp1y/lambda-generic-static2.C + 06ba6684e3759115ec5098f38667687b gcc/testsuite/g++.dg/cpp1y/lambda-generic-trailing1.C + c175c183205acb7386648c9340cb5b77 gcc/testsuite/g++.dg/cpp1y/lambda-generic-udt.C + 7515a5372d247dd5a94ef0626c25c2ae gcc/testsuite/g++.dg/cpp1y/lambda-generic-uneval1.C +@@ -11766,6 +11752,7 @@ + 7d97ba4392709fc8da484e897e085d27 gcc/testsuite/g++.dg/cpp1y/paren1.C + b37062a8a2160ab7a8f6b2faf63a7687 gcc/testsuite/g++.dg/cpp1y/paren2.C + e8c6da7fb812f06074a9399c95d62136 gcc/testsuite/g++.dg/cpp1y/paren3.C ++86a0b848e4db7d7f6ee1c78dcc897448 gcc/testsuite/g++.dg/cpp1y/paren4.C + a59e5fd28eae5235838080483b6939a6 gcc/testsuite/g++.dg/cpp1y/phoobhar.h + 7d18afb36bcaa55af2030c6546d5df38 gcc/testsuite/g++.dg/cpp1y/pr57640.C + c4165eafc91468f7acbe5ba99603b2e7 gcc/testsuite/g++.dg/cpp1y/pr57644.C +@@ -11863,7 +11850,8 @@ + 1d11dd14feca38229a393d32dcdfc3d2 gcc/testsuite/g++.dg/cpp1y/var-templ36.C + 69d95f597d98b91cb3856be43d3c5546 gcc/testsuite/g++.dg/cpp1y/var-templ37.C + 8794fe86c499aa19549c780c79aa368a gcc/testsuite/g++.dg/cpp1y/var-templ38.C +-f050d11349ddbf7b7819f451dc9afd8d gcc/testsuite/g++.dg/cpp1y/var-templ39.C ++8d67f45e619e5e401002587bef8da3a5 gcc/testsuite/g++.dg/cpp1y/var-templ39.C ++8fbb09c96293e0ad0adec02f8c333330 gcc/testsuite/g++.dg/cpp1y/var-templ39a.C + a82697cf228f6c067aa7a0fdefbfe94c gcc/testsuite/g++.dg/cpp1y/var-templ4.C + bb4283f25d1a9ee27311f1ab54256222 gcc/testsuite/g++.dg/cpp1y/var-templ40.C + da28be896a54e4517281f1dced095bee gcc/testsuite/g++.dg/cpp1y/var-templ42.C +@@ -11876,6 +11864,8 @@ + 6795aca168270525552bd48975a98225 gcc/testsuite/g++.dg/cpp1y/var-templ49.C + 34e14d27e3c00f201eeb1fb1d4d286c1 gcc/testsuite/g++.dg/cpp1y/var-templ5.C + 5160d45ceedf6faed4671f12ca9eae37 gcc/testsuite/g++.dg/cpp1y/var-templ50.C ++868d0756ba26f1a2a91e775d64bad123 gcc/testsuite/g++.dg/cpp1y/var-templ51.C ++145d4d5f8a5e4afaf223d9a444d14037 gcc/testsuite/g++.dg/cpp1y/var-templ52.C + 46f96806c3f041172407dd6ff7943dc8 gcc/testsuite/g++.dg/cpp1y/var-templ6.C + 3c670164f1a7f8f91ef1db2f80526182 gcc/testsuite/g++.dg/cpp1y/var-templ7.C + 7490ba7f2bf9511118a48f52e8c4ceed gcc/testsuite/g++.dg/cpp1y/var-templ8.C +@@ -11894,8 +11884,9 @@ + 68f716938002307e7dcda9d5dc357f14 gcc/testsuite/g++.dg/cpp1z/attributes-enum-1.C + c0f76eabaeee19f702ca129c32355700 gcc/testsuite/g++.dg/cpp1z/attributes-enum-1a.C + 98b1106ed209b91da77baabfe32a0221 gcc/testsuite/g++.dg/cpp1z/cplusplus.C +-90ef12e7060fa023a9c65acb99fbd917 gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C ++b78ef62cdf62c62127e6ef6b082f3bbf gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C + f6bf72fc22cf2e0b2625b0da029798a4 gcc/testsuite/g++.dg/cpp1z/fold-ice1.C ++89cd455176ece385a64d1d1b18aa7468 gcc/testsuite/g++.dg/cpp1z/fold-mangle.C + 31887e84574fe8c28417b43ab6292361 gcc/testsuite/g++.dg/cpp1z/fold1.C + ec8f049d9f6e3cc6a0a94adeaf70a315 gcc/testsuite/g++.dg/cpp1z/fold2.C + 402016faa295175165f8ebd8f741b826 gcc/testsuite/g++.dg/cpp1z/fold3.C +@@ -12078,6 +12069,7 @@ + 5c1e2db64783ad9531a0a03f6e23da46 gcc/testsuite/g++.dg/debug/pr56819.C + 41269ba367aaa19e5abac5932fdc247c gcc/testsuite/g++.dg/debug/pr65678.C + ccda43f2f659360264083e64ebc66d22 gcc/testsuite/g++.dg/debug/pr70271.C ++441b2b85c00e5fb81636a85d6732eb55 gcc/testsuite/g++.dg/debug/pr71057.C + a5e8d546d53a780cc3eb41574ea9f263 gcc/testsuite/g++.dg/debug/ra1.C + c3f392076ad11f8768ef0321b89abd5f gcc/testsuite/g++.dg/debug/static1.C + 7e13d86d33b17cfb7cdf61b7b8cca961 gcc/testsuite/g++.dg/debug/template1.C +@@ -12630,6 +12622,7 @@ + 53628223a07c6bbfb1cd7aef3f2b93cf gcc/testsuite/g++.dg/ext/flexary13.C + c4a658a25ef8a25aeef375a3ce711fa2 gcc/testsuite/g++.dg/ext/flexary14.C + aaba8fe44d3e6fec2f01feeb83885ba8 gcc/testsuite/g++.dg/ext/flexary15.C ++858ff0064f04a2ffe669c5f8458aa820 gcc/testsuite/g++.dg/ext/flexary16.C + fa0fdbfe242e37c8962c867f656e7e36 gcc/testsuite/g++.dg/ext/flexary2.C + 21926590c31816347bbb7ba438127f63 gcc/testsuite/g++.dg/ext/flexary3.C + c59d230f31793ac10c850433a29a2a25 gcc/testsuite/g++.dg/ext/flexary4.C +@@ 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gcc/testsuite/g++.dg/gomp/depend-1.C + cdd29f4ee662c46448400d10d8f0535c gcc/testsuite/g++.dg/gomp/depend-2.C +@@ -13243,6 +13238,7 @@ + 69587a534832b53372f1e04087c04986 gcc/testsuite/g++.dg/gomp/pr67514.C + 55299f8d5853e349499aeed5c702a80a gcc/testsuite/g++.dg/gomp/pr67522.C + 1c935120e3c1e7d165ea068f57519a6e gcc/testsuite/g++.dg/gomp/pr67523.C ++79e222486ea33d87026b4ecac4bb3593 gcc/testsuite/g++.dg/gomp/pr71941.C + d2c2484d4d1236326efc32a01fddaa03 gcc/testsuite/g++.dg/gomp/predetermined-1.C + edac71d2b358ecd6e646fece69c5426d gcc/testsuite/g++.dg/gomp/private-1.C + d447246d410ae61ed9f733998e77b958 gcc/testsuite/g++.dg/gomp/reference-1.C +@@ -13635,6 +13631,7 @@ + a5a0c6bb188e4c01d4db2d84a5014752 gcc/testsuite/g++.dg/init/pr66857.C + 788ed5b002d14f945d06c72d6b7c78bc gcc/testsuite/g++.dg/init/pr69658.C + 154196e0320831a54c0ed5e880a704cd gcc/testsuite/g++.dg/init/pr70501.C ++effadbfc637d03ffccebf5ad6b37c6c0 gcc/testsuite/g++.dg/init/pr71516.C + 697d82f637fb8839d98efadd58ededf5 gcc/testsuite/g++.dg/init/ptrfn1.C + c3eaccdcf8e35f944dee4d4b3d720336 gcc/testsuite/g++.dg/init/ptrfn2.C + 111716aa5bd4c456321772f776bd97d1 gcc/testsuite/g++.dg/init/ptrfn3.C +@@ -13781,6 +13778,7 @@ + 890af13d278e4e0706986dbc2c5a1884 gcc/testsuite/g++.dg/ipa/ipa-icf-5.C + 97e97070da1c97a8b6352ba2dbe100c3 gcc/testsuite/g++.dg/ipa/ipa-icf-6.C + baa7a26fbd7f93011660ae486b2d5a03 gcc/testsuite/g++.dg/ipa/ipa-pta-1.C ++10ce8060f456afad572b21a436f24c5c gcc/testsuite/g++.dg/ipa/ipa-pta-2.C + dce8034edae4f3ebb13a737d288cc800 gcc/testsuite/g++.dg/ipa/ivinline-1.C + 394623fa3c8fc8afefe76c7e05bcd23d gcc/testsuite/g++.dg/ipa/ivinline-2.C + 4ade5754b9cadd69737394051664462b gcc/testsuite/g++.dg/ipa/ivinline-3.C +@@ -14018,6 +14016,7 @@ + bcba89d3ec64e8fc005f26cebc29ef75 gcc/testsuite/g++.dg/lookup/redecl1.C + a0c29cb4b5f7577e6f70badabcf54df5 gcc/testsuite/g++.dg/lookup/scope-operator1.C + ac54cbb864f44961ac42e88050c9ad49 gcc/testsuite/g++.dg/lookup/scoped1.C ++bf3eaff26a33ccd4611b5f6e55765a4d gcc/testsuite/g++.dg/lookup/scoped10.C + b7a658adf99cb82ba017f02f1f2411c6 gcc/testsuite/g++.dg/lookup/scoped2.C + fd5b1d6b45ff24d721908d389585b869 gcc/testsuite/g++.dg/lookup/scoped3.C + aa72bf12de95e37fe79a3293544473d4 gcc/testsuite/g++.dg/lookup/scoped4.C +@@ -14025,6 +14024,7 @@ + d0e63df38adea95bde4f29a4a8adbd7a gcc/testsuite/g++.dg/lookup/scoped6.C + 36c8df686ba39d71b24a97d15b78bcba gcc/testsuite/g++.dg/lookup/scoped7.C + 26af3964407b493bd173a74dadeb7ffb gcc/testsuite/g++.dg/lookup/scoped8.C ++6369d16eb28b1bd2774c54434aaec082 gcc/testsuite/g++.dg/lookup/scoped9.C + 2b1b09d91910d20eece0379cd7533859 gcc/testsuite/g++.dg/lookup/strong-using-1.C + 9cf5f616cd7d12356a4b60ef67aaf1e1 gcc/testsuite/g++.dg/lookup/strong-using-2.C + 7da1d317c0e74ab901f17a10189784da gcc/testsuite/g++.dg/lookup/strong-using-3.C +@@ -14592,6 +14592,12 @@ + 3cc6fd0213a86e9af54303b476324b4f gcc/testsuite/g++.dg/opt/pr70245.C + 3ca6d038cb6338c3f99ac2cf4bb8b829 gcc/testsuite/g++.dg/opt/pr70245.h + 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gcc/testsuite/g++.dg/other/i386-10.C + 76d10b67eca4193b848abdfb0dbf492a gcc/testsuite/g++.dg/other/i386-2.C + ad4545acd2416049630459a66f6c3f86 gcc/testsuite/g++.dg/other/i386-3.C + a4ad4c2cb3c1448496351241a77aedb7 gcc/testsuite/g++.dg/other/i386-4.C +@@ -14897,6 +14904,7 @@ + 3634dbc3147618af0685ced6e33189ea gcc/testsuite/g++.dg/other/pr63815.C + edba4dc64424b99c4e6984f1aa7e9507 gcc/testsuite/g++.dg/other/pr66130.C + 335c58f031e8af025ac6bd25a8f5e0ed gcc/testsuite/g++.dg/other/pr67065.C ++3c357334529bfcf67faa2a847f3c9290 gcc/testsuite/g++.dg/other/pr71728.C + 2b96e0cda3aaa703c284fca6a0dd72c9 gcc/testsuite/g++.dg/other/pragma-re-1.C + bdec0c9208af6ee3a9ab1f2c07d3ba19 gcc/testsuite/g++.dg/other/pragma-re-2.C + f804e6064a0c7cd94d73f58ba8f6e5e0 gcc/testsuite/g++.dg/other/profile1.C +@@ -15422,6 +15430,7 @@ + 5cf1aa6b471b7c8c4120c7b9642955c6 gcc/testsuite/g++.dg/parse/pr68722.C + af9e56882c04892fe78e6734f13353e2 gcc/testsuite/g++.dg/parse/pr69628.C + 1e79347577849ae03e3a20e2fc6247ff gcc/testsuite/g++.dg/parse/pr70635.C ++5eb3f5d17e121a7a8f7884b589a7a7ce gcc/testsuite/g++.dg/parse/pr71909.C + 5a9d33aff7826f90760a0154af35d9f0 gcc/testsuite/g++.dg/parse/pragma1.C + b8553036b01aadac9e932e75221336ae gcc/testsuite/g++.dg/parse/pragma2.C + d516a5d017b9be02cd665abb61b0fbaf gcc/testsuite/g++.dg/parse/pragma3.C +@@ -15669,9 +15678,12 @@ + 29300174b10233fd47c932d1ffd4c3bf gcc/testsuite/g++.dg/pr69123.C + 07ceb93faa4d6543359b7c47e9a5e94a gcc/testsuite/g++.dg/pr69379.C + e77af829a8368cadb2874c601ccda7ee gcc/testsuite/g++.dg/pr69667.C +-514f19a372e6da2045ad3ac8a01eff0a gcc/testsuite/g++.dg/pr70098.C ++6574022bacba25e4efad4b7c4931c69a gcc/testsuite/g++.dg/pr70098.C + b6486240b7f881b41363b5c5aed08fef gcc/testsuite/g++.dg/pr70590-2.C + 78887d1698e74e4fca9c756431fc9a37 gcc/testsuite/g++.dg/pr70590.C ++0b728dae13a5f48195e47018a83c4f35 gcc/testsuite/g++.dg/pr71184.C ++dd5b895f9e8e377b3fc861eecf9bdbf7 gcc/testsuite/g++.dg/pr71389.C ++bb847cc20ee8eeae077a40b58e2964fc gcc/testsuite/g++.dg/pr71624.C + d038107e5b87bb2651ccfef7fa33748a gcc/testsuite/g++.dg/predict-loop-exit-1.C + b091c5510d946f61175720e0e6a70c8e gcc/testsuite/g++.dg/predict-loop-exit-2.C + 89ad4872e69c75752e361c89ce72b02b gcc/testsuite/g++.dg/predict-loop-exit-3.C +@@ -16066,6 +16078,7 @@ + c2f7a35b429490ab54f2fba257ca0dd9 gcc/testsuite/g++.dg/template/defarg19.C + 21ce3e77355010aaab1b59936da8bfbb gcc/testsuite/g++.dg/template/defarg2.C + 307285b77c17f229ecbeb4c647090190 gcc/testsuite/g++.dg/template/defarg20.C ++c96940bb22962f4c0c4140417e941221 gcc/testsuite/g++.dg/template/defarg21.C + e55baeaf118c452b9f707b8236ee86b1 gcc/testsuite/g++.dg/template/defarg3.C + 64d2588370b2c020d9d5828deadfc7dc gcc/testsuite/g++.dg/template/defarg4.C + 84d085b3ed907df1747cc523efd8d714 gcc/testsuite/g++.dg/template/defarg5.C +@@ -16259,6 +16272,7 @@ + fa72543a9a7163dc659966b7f85022ea gcc/testsuite/g++.dg/template/friend61.C + eee225d465c763fca3009704a441430f gcc/testsuite/g++.dg/template/friend61a.C + c83fbbe1bf313e9ff650368a049b6600 gcc/testsuite/g++.dg/template/friend61b.C ++0546ae6263680a8b8e42b5726f432e63 gcc/testsuite/g++.dg/template/friend62.C + 1d4f923241bfe8578940f39c34f80d7c gcc/testsuite/g++.dg/template/friend7.C + ceb858e95982ac0af2e9168f31aea229 gcc/testsuite/g++.dg/template/friend8.C + 59b5bf61b7f6210d3cf3b9b45692794a gcc/testsuite/g++.dg/template/friend9.C +@@ -16543,6 +16557,8 @@ + af6d997be6d23572000a1f53fb362c54 gcc/testsuite/g++.dg/template/pr69091.C + 74c16422bfee14becfdab59426868fb7 gcc/testsuite/g++.dg/template/pr69961a.C + 2bb8ec1b3640d593c78682666bf1f95a gcc/testsuite/g++.dg/template/pr69961b.C ++fd9d0d596049d0cdf35f01b62e86ae81 gcc/testsuite/g++.dg/template/pr70466-1.C ++a351a9dbecc556fb14937111d4035d00 gcc/testsuite/g++.dg/template/pr70466-2.C + 18029bea1be37e44787c856e7688884a gcc/testsuite/g++.dg/template/pr70610-2.C + a02fabd2632ab8c07600d017af625b9d gcc/testsuite/g++.dg/template/pr70610-3.C + f85232cc2d2ce2406ad9221174563c83 gcc/testsuite/g++.dg/template/pr70610-4.C +@@ -17052,6 +17068,7 @@ + 2023e08d493ba5b9b6b027ead9dbcdfb gcc/testsuite/g++.dg/tm/pr58635-2.C + c9e5bbfe98ec7fbaa16a15a1f925bb18 gcc/testsuite/g++.dg/tm/pr60004.C + 106a3fd65d1feeb38d0f2a3224a6087b gcc/testsuite/g++.dg/tm/pr67811.C ++f20200faa0befb0bfc51cc6eb591119c gcc/testsuite/g++.dg/tm/pr71909.C + 3081869c37283a01aeadd31d8c3a912d gcc/testsuite/g++.dg/tm/pretty-print1.C + 247e972c9babb265ea63db256a00ff3e gcc/testsuite/g++.dg/tm/static_cast1.C + ce59808ad2521265d21615e9fd232ebd gcc/testsuite/g++.dg/tm/sync1.C +@@ -17386,6 +17403,11 @@ + 3e80469d72e0d17bb9473080988a1256 gcc/testsuite/g++.dg/torture/pr70251.C + a8995237f42d84212dd09e432dd3f071 gcc/testsuite/g++.dg/torture/pr70499.C + 742e71bf561b5af56ed84fc963a0fe07 gcc/testsuite/g++.dg/torture/pr70526.C ++256b51401f6858dc5a0cad2e0da871b1 gcc/testsuite/g++.dg/torture/pr71002.C ++561facc41670baebfb84a4231ec62bca gcc/testsuite/g++.dg/torture/pr71405.C ++874216a8c65d270dcf488d29a8847247 gcc/testsuite/g++.dg/torture/pr71448.C ++411a467861248626a89023d9cd86be57 gcc/testsuite/g++.dg/torture/pr71452.C ++6d87997ae70f613b7ae47faba21523d9 gcc/testsuite/g++.dg/torture/pr71874.C + 389892c1f2e87d69449479d1b053c70c gcc/testsuite/g++.dg/torture/predcom-1.C + d28910105d9c9253d94d70eacd5e19d4 gcc/testsuite/g++.dg/torture/pushpop_macro.C + a1b47b9c3e69d79d1895ebc4fd11032b gcc/testsuite/g++.dg/torture/stackalign/check.h +@@ -17638,6 +17660,7 @@ + f4706f41ca654ceb8586f65654dc9bed gcc/testsuite/g++.dg/ubsan/null-4.C + e33cd115b2a5b1796134963715ca2601 gcc/testsuite/g++.dg/ubsan/null-5.C + ebc4dd8d7b9c346d612ab748d0d8bda0 gcc/testsuite/g++.dg/ubsan/null-6.C ++9a6263b0a0fc24a8d910d2b11d215637 gcc/testsuite/g++.dg/ubsan/null-7.C + cefd426836ca36a8554ac0ad41946a30 gcc/testsuite/g++.dg/ubsan/object-size-1.C + a654df71119821a4303cc9fe0501191b gcc/testsuite/g++.dg/ubsan/pr59250.C + 420a6623146bb014dc1310134356d81f gcc/testsuite/g++.dg/ubsan/pr59306.C +@@ -17666,6 +17689,8 @@ + ce9a3608f9ea7f32723d27471f56a902 gcc/testsuite/g++.dg/ubsan/pr70135.C + 56810c4012d688f214e18664f2974426 gcc/testsuite/g++.dg/ubsan/pr70147-1.C + af8fe8f8c142ba4099bf3fd97c7fb5f4 gcc/testsuite/g++.dg/ubsan/pr70147-2.C ++1248cf51218287e0763e9bafddb6e95e gcc/testsuite/g++.dg/ubsan/pr70847.C ++3ad68deac55fd26921bbcc306e06b206 gcc/testsuite/g++.dg/ubsan/pr71393.C + 23b03c04f7b3df05a2e3c261dbfbc91d gcc/testsuite/g++.dg/ubsan/return-1.C + c729687b59770dc8f9e0991370cb1879 gcc/testsuite/g++.dg/ubsan/return-2.C + 40257a16173db28137a5538f88bfea0e gcc/testsuite/g++.dg/ubsan/return-3.C +@@ -17740,6 +17765,7 @@ + 98d320060b90cb4d7efb2ca7dd9ca6a7 gcc/testsuite/g++.dg/vect/simd-clone-4.cc + 4147d578711be9e486c8907900862fdd gcc/testsuite/g++.dg/vect/simd-clone-4.h + c3079a303a422fbdcc1f72b0e2a98a47 gcc/testsuite/g++.dg/vect/simd-clone-5.cc ++b8fb5b23ece050421d669915c600780b gcc/testsuite/g++.dg/vect/simd-clone-6.cc + 3bc95c24ca829b61efcb7f80670d3ab5 gcc/testsuite/g++.dg/vect/simd-mask-store-bool.cc + 3c7b50dc56c581720a466e94943ccdae gcc/testsuite/g++.dg/vect/slp-pr50413.cc + ba398e1bec8514d144840b9f8de00b90 gcc/testsuite/g++.dg/vect/slp-pr50819.cc +@@ -17814,6 +17840,7 @@ + d3017d025f43f9093bf016847e418a34 gcc/testsuite/g++.dg/warn/Wmissing-declarations-1.C + 050c0fd9eb9dcd48940d99ba2041761b gcc/testsuite/g++.dg/warn/Wmissing-field-initializers-1.C + 13048d07bf8630f21562df0b77b67343 gcc/testsuite/g++.dg/warn/Wno-div-by-zero.C ++7c3ea8d27e4d862f83fc6998269f6f42 gcc/testsuite/g++.dg/warn/Wno-narrowing1.C + 26f056d6de0144f7aed85c81b3e4f583 gcc/testsuite/g++.dg/warn/Wno-return-local-addr.C + e3b6729ae62aef0d9d8acd63677ef06e gcc/testsuite/g++.dg/warn/Wnonnull-compare-1.C + 79a3c427fc105036228222b1a6ea9772 gcc/testsuite/g++.dg/warn/Wnonnull-compare-2.C +@@ -17867,6 +17894,7 @@ + 6ac2e35b5e4a2de47ad29a14a6dbe103 gcc/testsuite/g++.dg/warn/Wparentheses-9.C + 18e91a351f8fd1aae42cc8fbbe2dcbc5 gcc/testsuite/g++.dg/warn/Wplacement-new-size-1.C + 6b2c96f7011ece11947155ec8924a6f8 gcc/testsuite/g++.dg/warn/Wplacement-new-size-2.C ++d384bb1bb46e31c69b6a5c612b417019 gcc/testsuite/g++.dg/warn/Wplacement-new-size-3.C + d61eea5f0486bf652aaee2370544ea0e gcc/testsuite/g++.dg/warn/Wplacement-new-size.C + 10ae80ca102a17979ad4df9d03d42f13 gcc/testsuite/g++.dg/warn/Wpointer-arith-1.C + bc5f141d5ba64d906981c425b810d3ed gcc/testsuite/g++.dg/warn/Wredundant-decls-spec.C +@@ -23012,6 +23040,9 @@ + 1906f2e6e6b20628e9f16d77bc066d28 gcc/testsuite/gcc.c-torture/compile/pr70263-1.c + d47f5879509ae9dfb39ea1ee1063230e gcc/testsuite/gcc.c-torture/compile/pr70355.c + 86500b6aaf9f75325f0cad332855ed1b gcc/testsuite/gcc.c-torture/compile/pr70633.c ++6aa2a7d0fe94be24238130841efe702b gcc/testsuite/gcc.c-torture/compile/pr70916.c ++97df20a3b66d4cb718ca2f94a7c64ec5 gcc/testsuite/gcc.c-torture/compile/pr71693.c ++6893a5c3e89b00abc6ffaaadabf19bbb gcc/testsuite/gcc.c-torture/compile/pr71916.c + 9611ffa8936d9c80d0a9ccde8dd093b2 gcc/testsuite/gcc.c-torture/compile/pret-arg.c + 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gcc/testsuite/gcc.c-torture/execute/printf-chk-1.c +@@ -25250,6 +25285,7 @@ + ab3955f55aa596a98faf0528f22b1d0c gcc/testsuite/gcc.dg/alias-9.c + b87d726d798335bcf014c51ea61e9a4c gcc/testsuite/gcc.dg/align-1.c + ecaba7c928af85c280e63fa96b9b5e1b gcc/testsuite/gcc.dg/align-2.c ++6583b4f8147fde31faab62b525508999 gcc/testsuite/gcc.dg/align-3.c + b3869c9bd68bb9659f230f48bf56f83c gcc/testsuite/gcc.dg/always_inline.c + 5ad6d0d750af2e3c8488e96cfa1aa195 gcc/testsuite/gcc.dg/always_inline2.c + 99fe8a4ba9676a42a20bb593c81371e0 gcc/testsuite/gcc.dg/always_inline3.c +@@ -26232,8 +26268,8 @@ + 1e77dbdb1a2f17c79ae5421293c320fd gcc/testsuite/gcc.dg/const-1.c + 6ccf395fc674b370645bdd0d50fb25b8 gcc/testsuite/gcc.dg/const-elim-1.c + 8aeed4136d64b28976407e1f80bce896 gcc/testsuite/gcc.dg/const-elim-2.c +-b73512af2bf6823cc97da864bfc84920 gcc/testsuite/gcc.dg/const-float128-ped.c +-737e99e3ec08db1f5521d0ecc2431cc8 gcc/testsuite/gcc.dg/const-float128.c ++40322523d50e8ca68ce1454542758211 gcc/testsuite/gcc.dg/const-float128-ped.c ++88bbf89357957ad93147bfe868e6a9e3 gcc/testsuite/gcc.dg/const-float128.c + e3f3945c878b9cf4fa5b3f0074bd6302 gcc/testsuite/gcc.dg/const-float80-ped.c + e781844c1655d36c9b6e04d59aad8996 gcc/testsuite/gcc.dg/const-float80.c + d6841b339bfbaf4ab219c4c497889936 gcc/testsuite/gcc.dg/const-uniq-1.c +@@ -26921,6 +26957,7 @@ + 94f8101679e6cc4b9fabcf3f776ded40 gcc/testsuite/gcc.dg/debug/dwarf2/pr51410.c + 01ec5869a59f91af2fdeee3396a4b76f gcc/testsuite/gcc.dg/debug/dwarf2/pr53948.c + eb3e8d32cc98a65b9bf903f485425719 gcc/testsuite/gcc.dg/debug/dwarf2/pr66482.c ++3aefd6c464c0631839d12e370ea3b504 gcc/testsuite/gcc.dg/debug/dwarf2/pr71855.c + 8c1766fffa68df425fe8305ed4ddb614 gcc/testsuite/gcc.dg/debug/dwarf2/prod-options.c + 84c94e8435cec0cb1a4a8e83a9c3633d gcc/testsuite/gcc.dg/debug/dwarf2/short-circuit.c + fd5753c0c85e2e3c862b46c2f851ad80 gcc/testsuite/gcc.dg/debug/dwarf2/sso.c +@@ -27508,8 +27545,11 @@ + b0c5cb8db5ab29eb4607edcfaf632c3c gcc/testsuite/gcc.dg/goacc-gomp/goacc-gomp.exp + e301304e13590c1ce7f775ce00ef95b0 gcc/testsuite/gcc.dg/goacc/acc_on_device-1.c + e16a173a45eff735a99e16e66cc01685 gcc/testsuite/gcc.dg/goacc/goacc.exp ++9e00e7a94f979942198724398d213cee gcc/testsuite/gcc.dg/goacc/nested-function-1.c ++d28df196e898f3e95d6f476710c89624 gcc/testsuite/gcc.dg/goacc/nested-function-2.c + acdc22584322b69f4483834bf48a45e9 gcc/testsuite/gcc.dg/goacc/nvptx-merged-loop.c + 73513698286ba33d0b064ff8b57e6775 gcc/testsuite/gcc.dg/goacc/nvptx-sese-1.c ++75dd052bd164a3a9070c1d0861bc0e3c gcc/testsuite/gcc.dg/goacc/pr71373.c + 2f3333af08b8042445e79536694a34b4 gcc/testsuite/gcc.dg/gomp/appendix-a/a.1.1.c + 885f61f4895f1224def50fcf707b2f2e gcc/testsuite/gcc.dg/gomp/appendix-a/a.10.1.c + c8cf5f6a748356f3bcea8e2dbb2e4196 gcc/testsuite/gcc.dg/gomp/appendix-a/a.12.1.c +@@ -27907,8 +27947,11 @@ + f8f3d098512d881d68138c6f1e3a363f gcc/testsuite/gcc.dg/graphite/pr68809.c + bdbd7edf45b97574c83d3755df22a28b gcc/testsuite/gcc.dg/graphite/pr68953.c + d0f22c16c5fac5ae8f190b3564aba97d gcc/testsuite/gcc.dg/graphite/pr68976.c ++cbc1d72a5a486c20f3b581d86ceb6480 gcc/testsuite/gcc.dg/graphite/pr69067.c ++47d652714c7a00602400f743b5e3c11c gcc/testsuite/gcc.dg/graphite/pr69068.c + 4e7f8240209ca1b787c57a784dd3ab73 gcc/testsuite/gcc.dg/graphite/pr69292.c + 469d8e302d82650a54a8f0b48adb251a gcc/testsuite/gcc.dg/graphite/pr70045.c ++187adff90265612446489b184d1ca625 gcc/testsuite/gcc.dg/graphite/pr70956.c + 16574d3df752f79e2361bed11b712e31 gcc/testsuite/gcc.dg/graphite/run-id-1.c + 69c11dc302a921c92977db519167bec1 gcc/testsuite/gcc.dg/graphite/run-id-2.c + 84a75a861553ce658d85018a3ced0a6b gcc/testsuite/gcc.dg/graphite/run-id-3.c +@@ -27976,6 +28019,7 @@ + bc96d3d7a369ee1d75a9841b80312226 gcc/testsuite/gcc.dg/guality/param-2.c + 4f7560385c9b3bd900cc1de342ed58bc gcc/testsuite/gcc.dg/guality/param-3.c + 523107373abe1115fc7567ad1914508b gcc/testsuite/gcc.dg/guality/param-4.c ++f932e4faa7d538859c699e070447bc01 gcc/testsuite/gcc.dg/guality/param-5.c + 19bacc1e91869a8697eb548fb674e517 gcc/testsuite/gcc.dg/guality/pr36728-1.c + 15b728fbd163d9aa4e4d3a41ff5d237c gcc/testsuite/gcc.dg/guality/pr36728-2.c + 3a0a4f52233f47c7abff4081856aa824 gcc/testsuite/gcc.dg/guality/pr36728-3.c +@@ -28288,6 +28332,7 @@ + 3fa23bf649fb3d873b131ed5fb5ed9fe gcc/testsuite/gcc.dg/ipa/pr68035.c + 6391743d2f9ed0c57ef00442b79ff9fa gcc/testsuite/gcc.dg/ipa/pr68790.c + 47f323ada98e8576e87b3d61e280cf39 gcc/testsuite/gcc.dg/ipa/pr70306.c ++9e20144eec96000223a2e983ffcba9fa gcc/testsuite/gcc.dg/ipa/pr70646.c + 923d1086789aa370483859e89c2a5e1e gcc/testsuite/gcc.dg/ipa/propalign-1.c + c42a02d7f371ea4de7e4bb2088296655 gcc/testsuite/gcc.dg/ipa/propalign-2.c + b9df72c49860f187596351812c6e05be gcc/testsuite/gcc.dg/ipa/propalign-3.c +@@ -30227,6 +30272,13 @@ + ac328b834a1ea6428569ff38945772b0 gcc/testsuite/gcc.dg/pr70442.c + 36a35251047803a79950fef784d13ae4 gcc/testsuite/gcc.dg/pr70725.c + 99ff30c22aa2b72409036bea8bda66da gcc/testsuite/gcc.dg/pr70747.c ++0c7a5fc07d2ac3fe95b4a3f606e9fddc gcc/testsuite/gcc.dg/pr71006.c ++b2932869d7ba5888238dbb86f20e94de gcc/testsuite/gcc.dg/pr71071.c ++dc3c7225f47bd3f37227cbbb8d77804b gcc/testsuite/gcc.dg/pr71279.c ++9e22a8b7163e8cdad2514a0bcaaf73e3 gcc/testsuite/gcc.dg/pr71518.c ++79f760cb1168bdcad7ceef62cd0034c3 gcc/testsuite/gcc.dg/pr71558.c ++2d57cd18f3b5a4ce14ac9f867103994d gcc/testsuite/gcc.dg/pr71581.c ++0b5d052704c3f9b22ab6c09c3a2c44d1 gcc/testsuite/gcc.dg/pr71685.c + 8b7d73da2d5d78000716492365a85d5a gcc/testsuite/gcc.dg/pr8715.c + 3d08410b2dd57259aa63f0e1c64b376e gcc/testsuite/gcc.dg/pr8788-1.c + be04382a35ebb1cfae1b2168f1693a94 gcc/testsuite/gcc.dg/pr8835-1.c +@@ -30411,6 +30463,7 @@ + cc4ae3ffffb03645629e69a469281efb gcc/testsuite/gcc.dg/spellcheck-fields.c + ad32dc4c817caee29dda724b10b45399 gcc/testsuite/gcc.dg/spellcheck-options-1.c + 2d679bf081885df2fd43ceb67d70169a gcc/testsuite/gcc.dg/spellcheck-options-10.c ++44c49d832fbefb746e48d86f5808c52f gcc/testsuite/gcc.dg/spellcheck-options-12.c + 59ceb721847c724a4d56bf8a0d6c13d6 gcc/testsuite/gcc.dg/spellcheck-options-2.c + a2aa8beaba2a63cd762df20a0ff259f9 gcc/testsuite/gcc.dg/spellcheck-options-3.c + 533ff9109ecb7635d6ee9e965bed64d5 gcc/testsuite/gcc.dg/spellcheck-options-4.c +@@ -30797,10 +30850,10 @@ + 4db0a33ee448d1a3cb855abe7fd5dd87 gcc/testsuite/gcc.dg/torture/cris-volatile-1.c + 8e9f5b7c091bd1c8d9aad12b2fe2c7e8 gcc/testsuite/gcc.dg/torture/darwin-cfstring-3.c + 537c85296c73ca5b8d5644f2db0f4333 gcc/testsuite/gcc.dg/torture/dg-torture.exp +-d0e69d6fa9e82fcd758b481dd8566f35 gcc/testsuite/gcc.dg/torture/float128-cmp-invalid.c +-5347ab8c7c39b162eae4e5405881495f gcc/testsuite/gcc.dg/torture/float128-div-underflow.c ++58373efe3ee21c51efa41c133c58b857 gcc/testsuite/gcc.dg/torture/float128-cmp-invalid.c ++f866a0ec75af63274fded6d6e704572a gcc/testsuite/gcc.dg/torture/float128-div-underflow.c + 4c582f75a6506b2d756ac4784481eef0 gcc/testsuite/gcc.dg/torture/float128-exact-underflow.c +-2fa501d06d2488d2bb44859676922e40 gcc/testsuite/gcc.dg/torture/float128-extend-nan.c ++7439f4476ac9bb24498a6a5c7da023c4 gcc/testsuite/gcc.dg/torture/float128-extend-nan.c + 9e1eb456af728c416f591eacdc4d7fb7 gcc/testsuite/gcc.dg/torture/float128-extendxf-underflow.c + 1d581b89a6131cdc2bd3dc2b34fc7fa9 gcc/testsuite/gcc.dg/torture/float128-mul-underflow.c + a0352637f21fc07fa0443b4c4e043743 gcc/testsuite/gcc.dg/torture/float128-truncdf-underflow.c +@@ -30809,9 +30862,9 @@ + 4a1efbe908d1984e5c7866446e422e72 gcc/testsuite/gcc.dg/torture/fp-int-convert-2.c + c7193c3a55681849a60a8019763547be gcc/testsuite/gcc.dg/torture/fp-int-convert-double.c + 740b8077c12192879798984879fe4c76 gcc/testsuite/gcc.dg/torture/fp-int-convert-float.c +-f13160e874231fbfd5ad487b1a65a359 gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode-2.c +-0e198766e1144ee6a29b4e083231ef2b gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode-3.c +-48cf228cef8e597a9a40466b1f579f1f gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode.c ++6faf10cae6549a32de0e939a1032515b gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode-2.c ++4290c9342edd63f5948e29a0e4e61fbe gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode-3.c ++0fc40435832160baeff38f387f5ab974 gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode.c + bc0467f96f8340a44838f93689215df9 gcc/testsuite/gcc.dg/torture/fp-int-convert-float128.c + 80a27657c85bbe07fc57a74624f9f20a gcc/testsuite/gcc.dg/torture/fp-int-convert-float80-timode.c + 55b7dc542b219e0ef16ee001197d2ce4 gcc/testsuite/gcc.dg/torture/fp-int-convert-float80.c +@@ -31472,6 +31525,12 @@ + da4037959e336e19cb95c25f91f8eb52 gcc/testsuite/gcc.dg/torture/pr70628.c + 4bf720800970b360938f42a250aa3e59 gcc/testsuite/gcc.dg/torture/pr70724.c + 058fe139380690d2ec38aa882c1f7908 gcc/testsuite/gcc.dg/torture/pr70780.c ++e8b6639bf1f3ed2ec4f89afdb36f44f9 gcc/testsuite/gcc.dg/torture/pr70935.c ++b6bb0c63d9e968f4f16f282365518a50 gcc/testsuite/gcc.dg/torture/pr70941.c ++08b15e14c6c9f4cc6291f19fc8ba963b gcc/testsuite/gcc.dg/torture/pr71423.c ++0c398d952cf20fc83aec050f85d8a44b gcc/testsuite/gcc.dg/torture/pr71452.c ++d7822d9246b54abacbdc7d6230ab041d gcc/testsuite/gcc.dg/torture/pr71522.c ++b0020481b01ba2fea155b7e666817dc3 gcc/testsuite/gcc.dg/torture/pr71606.c + 62b28db4200d0c4e51bde8d1e5693886 gcc/testsuite/gcc.dg/torture/pr8081.c + d086c3946230ba05df33a45be4862730 gcc/testsuite/gcc.dg/torture/pta-callused-1.c + 39620328710fd9ff170741766805e426 gcc/testsuite/gcc.dg/torture/pta-escape-1.c +@@ -32331,6 +32390,7 @@ + 885c1be5e32bb9fbd61002b21649165d gcc/testsuite/gcc.dg/tree-ssa/pr69845-2.c + 6e6845a9fd535b1e4161176393d5993c gcc/testsuite/gcc.dg/tree-ssa/pr70232.c + f1ac7f1c1aea72571d0586fcaa61bef4 gcc/testsuite/gcc.dg/tree-ssa/pr70372.c ++f25359056dca264e17755adacd92210b gcc/testsuite/gcc.dg/tree-ssa/pr70919.c + 183e9199984b76de9f1701381d4f612d gcc/testsuite/gcc.dg/tree-ssa/predcom-1.c + e1366016e9a4c05dbd1cdb3f152b83dc gcc/testsuite/gcc.dg/tree-ssa/predcom-2.c + 49817baec76470758acdd34458c9fb91 gcc/testsuite/gcc.dg/tree-ssa/predcom-3.c +@@ -32759,6 +32819,8 @@ + b18ed34db76e8a818f24ae5532580fdb gcc/testsuite/gcc.dg/tree-ssa/vrp08.c + 00af09eb12b671fc3835354fe975d76f gcc/testsuite/gcc.dg/tree-ssa/vrp09.c + 8c9b46ae3e96ee0bd4ea529a368c310d gcc/testsuite/gcc.dg/tree-ssa/vrp10.c ++35a86d5c3d5d6dfdbf910fd80c544328 gcc/testsuite/gcc.dg/tree-ssa/vrp100.c ++43b49a2dc407364da07b46e140893140 gcc/testsuite/gcc.dg/tree-ssa/vrp101.c + 02186bb95ddef36513b909863c8d3ed8 gcc/testsuite/gcc.dg/tree-ssa/vrp11.c + 419ced6aac18d78614ce2296a1a6b660 gcc/testsuite/gcc.dg/tree-ssa/vrp12.c + 5c02e78e0a19d3b4ab362211af9c057d gcc/testsuite/gcc.dg/tree-ssa/vrp13.c +@@ -32874,6 +32936,7 @@ + 38f4467be27d0432adea9abcaf9cc366 gcc/testsuite/gcc.dg/typespec-1.c + b9d67dbc50419a82b76d70029936f329 gcc/testsuite/gcc.dg/ubsan/bounds-1.c + 8ef707e5f4c734c1b8be85269cd93d06 gcc/testsuite/gcc.dg/ubsan/bounds-2.c ++804ebe3c0a2fc929bc12b7e5c7c4098f gcc/testsuite/gcc.dg/ubsan/bounds-3.c + 7740693c7bb19d8fc6ab727a6ffbb65c gcc/testsuite/gcc.dg/ubsan/c-shift-1.c + 577cc36a854722ee2c73da1a6a6e2322 gcc/testsuite/gcc.dg/ubsan/c-shift-2.c + 2dbfddf9f012a91eb07b3c83841941a1 gcc/testsuite/gcc.dg/ubsan/c99-shift-1.c +@@ -33468,7 +33531,7 @@ + 909245027a67eed899841d65ca788c26 gcc/testsuite/gcc.dg/vect/pr66142.c + 94ba2ffa702e68550138d2586c87e9d7 gcc/testsuite/gcc.dg/vect/pr66251.c + fe55b7b3a0180146eb06495eed9f01a0 gcc/testsuite/gcc.dg/vect/pr66253.c +-013ee9e98fd328680fc3f320b6adc0f3 gcc/testsuite/gcc.dg/vect/pr66636.c ++31de59c90b606bb80ee8c60486379cc0 gcc/testsuite/gcc.dg/vect/pr66636.c + 86169de4aac395fc7dd49fd713661f87 gcc/testsuite/gcc.dg/vect/pr66677.c + f4505aa6c41d3aa5d36144edc00b927e gcc/testsuite/gcc.dg/vect/pr66951.c + b0c728b20c3631680ab365d1bc5a0fd8 gcc/testsuite/gcc.dg/vect/pr67790.c +@@ -33489,6 +33552,9 @@ + 78b19e684925d21a4076e909bc9096cf gcc/testsuite/gcc.dg/vect/pr70138-2.c + 0918022cdf657101e47743d5c80133f3 gcc/testsuite/gcc.dg/vect/pr70354-1.c + 72d0484eead5cc2ea42d3951a7cd63f2 gcc/testsuite/gcc.dg/vect/pr70354-2.c ++05e2c1c28c7f8e8f0887ba6298c0b0cb gcc/testsuite/gcc.dg/vect/pr71259.c ++c03f1f02e7f7d30e17a072dbbe18a16b gcc/testsuite/gcc.dg/vect/pr71264.c ++bfbd314e67532ca23e292ce54b72762f gcc/testsuite/gcc.dg/vect/pr71823.c + 32d06c886c85516fbdce4ca1bd516496 gcc/testsuite/gcc.dg/vect/section-anchors-pr27770.c + 00b8b4e778221f5bedb59cfc69f6c9d7 gcc/testsuite/gcc.dg/vect/section-anchors-vect-69.c + 218f2e2bcfb33c838c80a2ae8c302759 gcc/testsuite/gcc.dg/vect/slp-1.c +@@ -33581,7 +33647,7 @@ + b1336a4a12ea0ec587c41f16332879bc gcc/testsuite/gcc.dg/vect/slp-widen-mult-s16.c + 31669e2cb35c18913f0b7f913f2a0f63 gcc/testsuite/gcc.dg/vect/slp-widen-mult-u8.c + 613196aaada7504743f2f4d92488772b gcc/testsuite/gcc.dg/vect/trapv-vect-reduc-4.c +-5f4c323565e9614879f28bd4f7091c96 gcc/testsuite/gcc.dg/vect/tree-vect.h ++402f466a32d7175024ee9b8ec5e02d1b gcc/testsuite/gcc.dg/vect/tree-vect.h + 908fa625b55d7d283163e9dfb4e3cb97 gcc/testsuite/gcc.dg/vect/unswitch-loops-pr26969.c + 6520c3dd9e657028a89c31328634d22a gcc/testsuite/gcc.dg/vect/vec-scal-opt.c + 9b5d0a9d2e1a81f9454f0082b9f240b7 gcc/testsuite/gcc.dg/vect/vec-scal-opt1.c +@@ -34977,7 +35043,7 @@ + a8bddbe3eece3831dd80ac4cdf09f85e gcc/testsuite/gcc.target/aarch64/nofp_1.c + 16f10ec9128105b137b7139eec150171 gcc/testsuite/gcc.target/aarch64/noplt_1.c + a08d94353bf55af1d22441a406d830ca gcc/testsuite/gcc.target/aarch64/noplt_2.c +-766dade6022566e9d591b71777427f70 gcc/testsuite/gcc.target/aarch64/noplt_3.c ++5adbb32c5ec104efca72061e09229b8f gcc/testsuite/gcc.target/aarch64/noplt_3.c + 03797fef944cc43885e1c80c25f368e4 gcc/testsuite/gcc.target/aarch64/pic-constantpool1.c + 8084b7f8a23ba9dc5bb389d20d29ec1b gcc/testsuite/gcc.target/aarch64/pic-small.c + dca6942a94e55d4ebfd32c380eb279ff gcc/testsuite/gcc.target/aarch64/pic-symrefplus.c +@@ -35013,6 +35079,7 @@ + 0eb5fd232a04413cc6f2bd5fd4c3c47d gcc/testsuite/gcc.target/aarch64/pr70120-2.c + 61ea50a51a3ed94b38acd7cd026cd077 gcc/testsuite/gcc.target/aarch64/pr70120-3.c + eb748e6de8945b3aa35ce6b22a073829 gcc/testsuite/gcc.target/aarch64/pr70398.c ++e7efe396ef16dbc7526785247ead6d84 gcc/testsuite/gcc.target/aarch64/pr70809_1.c + d3e6defa85b5cd4bb506306377e59a53 gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_1.c + 1f95766b4ed5bfb5f2cf1f168a607a8d gcc/testsuite/gcc.target/aarch64/predefine_large.c + d38e476730748c653068e7cb2d8d6ca6 gcc/testsuite/gcc.target/aarch64/predefine_small.c +@@ -35125,6 +35192,7 @@ + a675084fb22386c9d27ff4bd900947af gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u32_indices_1.c + 83cf956b7cb17956c744f7db38fe3416 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u64_indices_1.c + 099bad0585432f164e86079dbf03595e gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u8_indices_1.c ++163cc0d113c2aef5ebd776e9553efbf1 gcc/testsuite/gcc.target/aarch64/simd/vminmaxnm_1.c + d3471e819805085e851c6ef99b412fc9 gcc/testsuite/gcc.target/aarch64/simd/vmla_f64.c + 76bd294b136cfc9375488944eb7f3ba0 gcc/testsuite/gcc.target/aarch64/simd/vmls_f64.c + f4f3b7ca3433b577e0c8b5a94bd6c11a gcc/testsuite/gcc.target/aarch64/simd/vmul_f64_1.c +@@ -35466,7 +35534,7 @@ + f87f898044cd78f2ebf530577d3cf7bb gcc/testsuite/gcc.target/aarch64/sync-op-release.c + 95f377cbd6e6173deb76efafbc90634f gcc/testsuite/gcc.target/aarch64/sync-op-release.x + 0168137c2b608147cb69283541a282f1 gcc/testsuite/gcc.target/aarch64/table-intrinsics.c +-d5d082ded76a499c259ef0099673369a gcc/testsuite/gcc.target/aarch64/tail_indirect_call_1.c ++e259ba8323c6ae474eebb9f1a89e0a1d gcc/testsuite/gcc.target/aarch64/tail_indirect_call_1.c + 84204d959d96933bbdeb4d6f2a41264c gcc/testsuite/gcc.target/aarch64/target_attr_1.c + fa7117ece82474e6ad64b002ff16f391 gcc/testsuite/gcc.target/aarch64/target_attr_10.c + 495425b7459f1a259607e93ad71f13c5 gcc/testsuite/gcc.target/aarch64/target_attr_11.c +@@ -35940,8 +36008,8 @@ + 4b9f02224346043bca551bf81124f90b gcc/testsuite/gcc.target/arm/headmerge-2.c + b7fc1639bee153568add250d53ea751f gcc/testsuite/gcc.target/arm/identical-invariants.c + 6b37d9e567d7851e4e037dc6ffb87d9c gcc/testsuite/gcc.target/arm/ifcvt-size-check.c +-5a6755f195973a69d09c58dc46caa013 gcc/testsuite/gcc.target/arm/interrupt-1.c +-fc9965e47a9641a2b14bf7461100be94 gcc/testsuite/gcc.target/arm/interrupt-2.c ++b8c039847c1a73baf76ec3ceb27b1a11 gcc/testsuite/gcc.target/arm/interrupt-1.c ++80759aaae06958909d3fcc2edf843783 gcc/testsuite/gcc.target/arm/interrupt-2.c + 5fb126c6d9486e40aebcb4051dcefd2a gcc/testsuite/gcc.target/arm/iordi3-opt.c + 942d9efedfb779e0de45df976f1585de gcc/testsuite/gcc.target/arm/iordi_notdi-1.c + 88f7d27029fb631e0a53d287d5f7f83c gcc/testsuite/gcc.target/arm/its.c +@@ -38203,6 +38271,8 @@ + 32fee62df6d98765a5508d0d96c9eb65 gcc/testsuite/gcc.target/arm/pr69904.c + 1099addf5e35417ab2cda454cb2ec7f0 gcc/testsuite/gcc.target/arm/pr70278.c + 7b0dff48f8c89cbeb037deb0439e2888 gcc/testsuite/gcc.target/arm/pr70496.c ++48ed10e4b1714bfea3579dda3447be58 gcc/testsuite/gcc.target/arm/pr70830.c ++dc5c76ff01c564582222b3a2ea1fc21c gcc/testsuite/gcc.target/arm/pr71056.c + 321232597c3b16471c510b972ad557b4 gcc/testsuite/gcc.target/arm/pragma_attribute.c + cdf14fd079c2cd544c152c39ceb8ac66 gcc/testsuite/gcc.target/arm/pragma_cpp_fma.c + 639f9aee9e13df807ade02e6ee96c2d3 gcc/testsuite/gcc.target/arm/reg_equal_test.c +@@ -38490,11 +38560,13 @@ + 2028ceccf9f97e5e84e9adf6beb7597e gcc/testsuite/gcc.target/avr/exit-abort.h + 2931177f4aeff49d531d5474224448f6 gcc/testsuite/gcc.target/avr/pr46779-1.c + 572dc228e08385a1db0fcbab66dbaa4e gcc/testsuite/gcc.target/avr/pr46779-2.c ++d92831f37e30237d1dc568f585e4c2c9 gcc/testsuite/gcc.target/avr/pr50739.c + fc917fcfe7cfe97b5f27265d5960f0e6 gcc/testsuite/gcc.target/avr/pr52472.c + 421d2b9b36fa2496dce05d129d2c352b gcc/testsuite/gcc.target/avr/pr58545.c + 9e82df166e8b559cb56d2c4f48cbaf30 gcc/testsuite/gcc.target/avr/pr60991.c + 94f026369213dad7565383028ef6afcf gcc/testsuite/gcc.target/avr/pr65210.c + efe0a9fdac4e9b6140f4228816b9db64 gcc/testsuite/gcc.target/avr/pr67839.c ++292bf2dc33b5cfededd107fe1c0ebc88 gcc/testsuite/gcc.target/avr/pr71103.c + 881cb1836ddfc3105e0aacacc481aa09 gcc/testsuite/gcc.target/avr/progmem-error-1.c + 2eb3f167ae58b534e25afc1b94617746 gcc/testsuite/gcc.target/avr/progmem-error-1.cpp + 56de611fd29076ce9da389a853476819 gcc/testsuite/gcc.target/avr/progmem-warning-1.c +@@ -38532,6 +38604,7 @@ + 7f56c1b750dfe8d7e4128f15aa3eaffe gcc/testsuite/gcc.target/avr/torture/pr63633-ice-mult.c + 44584f49cd0975073be7b86102774077 gcc/testsuite/gcc.target/avr/torture/pr64331.c + dcabffeb42e88a442661b9e47e43a9c1 gcc/testsuite/gcc.target/avr/torture/pr64452.c ++ab53af0eb6dbfe2791a8ac1bbaf0c11f gcc/testsuite/gcc.target/avr/torture/pr71103-2.c + 21a45d34960ba9567b9f2483d22c843f gcc/testsuite/gcc.target/avr/torture/progmem-1.c + 564c71a894aff68e98d5c4a6db2b47ae gcc/testsuite/gcc.target/avr/torture/progmem-1.cpp + e3e1c41865f5287c9ff7e200745758fd gcc/testsuite/gcc.target/avr/torture/sat-hr-plus-minus.c +@@ -39055,6 +39128,7 @@ + b6e744a5c521873cc8be2dbb5f25790d gcc/testsuite/gcc.target/i386/avx-pr57233.c + ab15d222e706bd85c87c037d1e9b6f51 gcc/testsuite/gcc.target/i386/avx-pr63594-1.c + 7e490de1d2a70d21844cdc70c1546f49 gcc/testsuite/gcc.target/i386/avx-pr63594-2.c ++52efc199588007563ddb240d620c0f01 gcc/testsuite/gcc.target/i386/avx-pr71559.c + 4e3d37bb04b99394790fa9e8caddf790 gcc/testsuite/gcc.target/i386/avx-recip-vec.c + 02ae18a66bd7b76f7a651b896f066b70 gcc/testsuite/gcc.target/i386/avx-reduc-1.c + 772f703b19bb27d5947d136a2f72221e gcc/testsuite/gcc.target/i386/avx-rint-sfix-2-vec.c +@@ -40324,10 +40398,22 @@ + c88d598d6edb7c0c743c1dc16a2cc16d gcc/testsuite/gcc.target/i386/avx512f-broadcast-gpr-2.c + 499c39d2a4857a6b8d1b83ff9a57f0ff gcc/testsuite/gcc.target/i386/avx512f-ceil-sfix-vec-1.c + 043ca358343e3cd8084b52ddd77fc44b gcc/testsuite/gcc.target/i386/avx512f-ceil-sfix-vec-2.c ++0d4151fb05d050a11cf92664e9209d3a gcc/testsuite/gcc.target/i386/avx512f-ceil-vec-1.c ++e37893c9abd7382a7def7fd7274dcd64 gcc/testsuite/gcc.target/i386/avx512f-ceil-vec-2.c ++576df336a9d07a5da958ad681902765b gcc/testsuite/gcc.target/i386/avx512f-ceilf-sfix-vec-1.c ++8a2399e65f2d83ffe127b069db603b09 gcc/testsuite/gcc.target/i386/avx512f-ceilf-sfix-vec-2.c ++5b2ffd909879a410f6b4a26c1a8e5676 gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-1.c ++a4b256bf9501d70dd2182eab7f624689 gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-2.c + b40bff9ed49ef04a7cc3b22ed64e6ebb gcc/testsuite/gcc.target/i386/avx512f-check.h + 9db780c1e1f36c905bedd1fd077c44bc gcc/testsuite/gcc.target/i386/avx512f-dummy.c + 0de473631153a37da362d01bb42a56bd gcc/testsuite/gcc.target/i386/avx512f-floor-sfix-vec-1.c + f449e800780313dbf245bac9b4df7ed5 gcc/testsuite/gcc.target/i386/avx512f-floor-sfix-vec-2.c ++147745798007b9631a908f9e78411336 gcc/testsuite/gcc.target/i386/avx512f-floor-vec-1.c ++ae10c62470cea283261617eaed4fb4bd gcc/testsuite/gcc.target/i386/avx512f-floor-vec-2.c ++f3f3241adb2a57e08f624dd5dee7bde2 gcc/testsuite/gcc.target/i386/avx512f-floorf-sfix-vec-1.c ++36f5b8ecaa1309fea47c6565009b0e43 gcc/testsuite/gcc.target/i386/avx512f-floorf-sfix-vec-2.c ++2ab0eec1590b189f1c4f7fe79a454db5 gcc/testsuite/gcc.target/i386/avx512f-floorf-vec-1.c ++0e2a8a11b7939edbb836489d6d1ae8cb gcc/testsuite/gcc.target/i386/avx512f-floorf-vec-2.c + 093d097bdccce35c0df38597a7980d22 gcc/testsuite/gcc.target/i386/avx512f-gather-1.c + c8ce7ffcdf3dead2fa41448cdfd421d8 gcc/testsuite/gcc.target/i386/avx512f-gather-2.c + fba9972cad8dda541a5aa6eec12675fc gcc/testsuite/gcc.target/i386/avx512f-gather-3.c +@@ -40386,6 +40472,15 @@ + 381f53de01f1e9893e6903d9fac40b87 gcc/testsuite/gcc.target/i386/avx512f-pr63594-2.c + e97c0c19cafc88b7e3701f64c4ee5e2f gcc/testsuite/gcc.target/i386/avx512f-pr70059.c + d3690c9abdc1f96ff5183a85ab642fc8 gcc/testsuite/gcc.target/i386/avx512f-pr70421.c ++2bec208bfec85d6675be24e134318011 gcc/testsuite/gcc.target/i386/avx512f-pr71559.c ++ada32523be27898684e961dc8a530319 gcc/testsuite/gcc.target/i386/avx512f-rint-sfix-vec-1.c ++cf72f487882aa5cbbf2a730ccced5372 gcc/testsuite/gcc.target/i386/avx512f-rint-sfix-vec-2.c ++afd1c2340191f1da5c9f296da3642106 gcc/testsuite/gcc.target/i386/avx512f-rintf-sfix-vec-1.c ++3e831baba699ee173a9b5a01e94803d7 gcc/testsuite/gcc.target/i386/avx512f-rintf-sfix-vec-2.c ++e6b938f5b671843917a112a53a8a7860 gcc/testsuite/gcc.target/i386/avx512f-round-sfix-vec-1.c ++8ec0c6ee2d9b777f1da5706d825590f4 gcc/testsuite/gcc.target/i386/avx512f-round-sfix-vec-2.c ++7b55ada214bda7b0ec5755ad95771081 gcc/testsuite/gcc.target/i386/avx512f-roundf-sfix-vec-1.c ++8b538e860606539734b2c832df5c63eb gcc/testsuite/gcc.target/i386/avx512f-roundf-sfix-vec-2.c + 5158ac78802e368957a44c0f68b3b5d8 gcc/testsuite/gcc.target/i386/avx512f-rounding.c + 8eb7f0638fb7f71388916d2f90f89f93 gcc/testsuite/gcc.target/i386/avx512f-scatter-1.c + a705c702fd9fc8889d25e23e48746f5b gcc/testsuite/gcc.target/i386/avx512f-scatter-2.c +@@ -40413,6 +40508,10 @@ + 5e82ba7d6ba2bc9eb1ce979813f8d396 gcc/testsuite/gcc.target/i386/avx512f-setzero-pd-1.c + 47fee7cb6c90c9ac41c16bb5604a8121 gcc/testsuite/gcc.target/i386/avx512f-setzero-ps-1.c + 45e69165f83009060e6547672824081d gcc/testsuite/gcc.target/i386/avx512f-setzero-si512-1.c ++9f1be97318b9c5fe371f3dc949de070d gcc/testsuite/gcc.target/i386/avx512f-trunc-vec-1.c ++b74179ff996ee056241e1c5238385936 gcc/testsuite/gcc.target/i386/avx512f-trunc-vec-2.c ++22ac9712c0faaf3a282e62daa525a8a2 gcc/testsuite/gcc.target/i386/avx512f-truncf-vec-1.c ++75f99d519bd7e5ff40d6b2db26925c32 gcc/testsuite/gcc.target/i386/avx512f-truncf-vec-2.c + 06c531d6ffd8e2dc9c35db5a25f946d2 gcc/testsuite/gcc.target/i386/avx512f-typecast-1.c + 4ebc7b200a5160aa639c1a2a5b13a59f gcc/testsuite/gcc.target/i386/avx512f-vaddpd-1.c + 9c96dcbb2e757b7198aeba742c29a128 gcc/testsuite/gcc.target/i386/avx512f-vaddpd-2.c +@@ -41870,6 +41969,7 @@ + 9fa05574c82a870139a2524c4a9ea84c gcc/testsuite/gcc.target/i386/extract-6.c + b9e834d41c948e584d3f1cd39c3a5959 gcc/testsuite/gcc.target/i386/extract-insert-combining.c + 4ea9a85bc3f40b1ebeb0581bd96620de gcc/testsuite/gcc.target/i386/f16c-check.h ++019f466ae9c955f33a105efa418493cf gcc/testsuite/gcc.target/i386/fabsneg-1.c + c8661d46af4e71184c4904ae6ab3be9b gcc/testsuite/gcc.target/i386/fastcall-1.c + dbf3cc9b53b5e2d78a16330cbb9137e5 gcc/testsuite/gcc.target/i386/fastcall-sseregparm.c + ba226e9b8c6e56794bbc8f0d614ee8c6 gcc/testsuite/gcc.target/i386/fentry-override.c +@@ -42002,7 +42102,7 @@ + 7aef940035776cbf7ecabc540f63e33e gcc/testsuite/gcc.target/i386/hle-xor-rel-1.c + 27f333984dddefbecb9e2c639d7c3066 gcc/testsuite/gcc.target/i386/i386.exp + 7272fad8a3b85477e1b6954e2c36656d gcc/testsuite/gcc.target/i386/iamcu/abi-iamcu.exp +-a75b4ffb604aa8a4ae22652bfd0455d0 gcc/testsuite/gcc.target/i386/iamcu/args.h ++824179ec90e1e4fdb872aed133f8d523 gcc/testsuite/gcc.target/i386/iamcu/args.h + 75e691882a781a986cbf2b848eacc017 gcc/testsuite/gcc.target/i386/iamcu/asm-support.S + a77c8e89ec538edb98eb4ac96da0db61 gcc/testsuite/gcc.target/i386/iamcu/defines.h + ced3e7fc25757fe027f4eacc904e6881 gcc/testsuite/gcc.target/i386/iamcu/macros.h +@@ -43246,6 +43346,7 @@ + 939cb1764c085054007c93662975586c gcc/testsuite/gcc.target/i386/pr68497.c + e783cba59986d894ea86576ba3dba9de gcc/testsuite/gcc.target/i386/pr68633.c + 86970bbb2e352887837e71a47d7d1b1b gcc/testsuite/gcc.target/i386/pr68647.c ++ef3f1636440165ca1e8cb1ff5a7fd262 gcc/testsuite/gcc.target/i386/pr68657.c + ed977b2e07a2b51f6a0171f6ad454c88 gcc/testsuite/gcc.target/i386/pr68674.c + 37cbc35061a580832dbc0ce4a1604d83 gcc/testsuite/gcc.target/i386/pr68680.c + 82889ba70f826af56789c8d9456aea07 gcc/testsuite/gcc.target/i386/pr68691.c +@@ -43319,6 +43420,14 @@ + 4fbcd5b3350355ed9b86fc2f9efebbcf gcc/testsuite/gcc.target/i386/pr70593.c + c4dd0a4466890153a50da4018a6840e3 gcc/testsuite/gcc.target/i386/pr70596.c + 63614f4a8e03a5baed97479f04e87900 gcc/testsuite/gcc.target/i386/pr70662.c ++b98041baad19fb37bd266fc10bd5bc38 gcc/testsuite/gcc.target/i386/pr70728.c ++0adbcabe255b36ad14e5fced66fe8a7c gcc/testsuite/gcc.target/i386/pr70750-1.c ++683fe4353ec025a523da5da93c42a89a gcc/testsuite/gcc.target/i386/pr70750-2.c ++1003b2af30448864252327bd08ddb57b gcc/testsuite/gcc.target/i386/pr70858.c ++c4f6a31f14b030cd9290db1df9495760 gcc/testsuite/gcc.target/i386/pr70876.c ++960f365b62f7bf57c12061d19e6822e3 gcc/testsuite/gcc.target/i386/pr70877.c ++61d0b6b6f6714737a9330dc7fae9ed11 gcc/testsuite/gcc.target/i386/pr71529.C ++a9c6395b5501af8f7e41af6ddea5ede0 gcc/testsuite/gcc.target/i386/pr71647.c + 849234c7a569c1e86023244bc5561263 gcc/testsuite/gcc.target/i386/pr9771-1.c + 24ceb6d5f3f5cde4b9d852839bdb98ae gcc/testsuite/gcc.target/i386/prefetchw-1.c + f11f4731c396f099373c033ab016a64f gcc/testsuite/gcc.target/i386/prefetchwt1-1.c +@@ -43594,6 +43703,7 @@ + bdbcd892d3f88fe1d7a07a2122cb928d gcc/testsuite/gcc.target/i386/sse2-pr57233.c + ab93046758268c8e3106f1bed7d4e8a5 gcc/testsuite/gcc.target/i386/sse2-pr63594-1.c + ae0d76797c5135e83ce818bce0003cfa gcc/testsuite/gcc.target/i386/sse2-pr63594-2.c ++f83e050eb6a6a72950d4ead5f0340a6a gcc/testsuite/gcc.target/i386/sse2-pr71559.c + 306e316bf36fd1022168fa5560198f41 gcc/testsuite/gcc.target/i386/sse2-psadbw-1.c + 31949c673c69db630bfaf04449d2677f gcc/testsuite/gcc.target/i386/sse2-pshufd-1.c + 2890c692e114956ac819984c965d389e gcc/testsuite/gcc.target/i386/sse2-pshufhw-1.c +@@ -44861,6 +44971,7 @@ + 59520e2fbc082b0ec9e051f4e7c804f9 gcc/testsuite/gcc.target/powerpc/440-nmaclhw-1.c + 1740cc665d8423adf426eedd3a8276eb gcc/testsuite/gcc.target/powerpc/440-nmaclhw-2.c + 5931e32eea29c20bbd53794357f5ebad gcc/testsuite/gcc.target/powerpc/980827-1.c ++3836ca1b6787ffdabd915481b096bf59 gcc/testsuite/gcc.target/powerpc/abs128-1.c + c441836462a082b52b8df4f3644b8ee1 gcc/testsuite/gcc.target/powerpc/altivec-1.c + 7594d13b6afbb5788fd3ff108fa1798d gcc/testsuite/gcc.target/powerpc/altivec-10.c + 87921f986b2e966c18eb11c96891c323 gcc/testsuite/gcc.target/powerpc/altivec-11.c +@@ -44962,12 +45073,18 @@ + 76368ec7aa2b631ffe91a52dbe0c7e7a gcc/testsuite/gcc.target/powerpc/compress-float-ppc-pic.c + caf3aba39c0565b4369f2e0263b16af5 gcc/testsuite/gcc.target/powerpc/compress-float-ppc.c + 6419d1aaea22c0476688f484ac4f0f43 gcc/testsuite/gcc.target/powerpc/const-compare.c ++1f7277471f008809ee3572d95097e11a gcc/testsuite/gcc.target/powerpc/copysign128-1.c + 4b60a8662648a73cedee85dd08e278eb gcc/testsuite/gcc.target/powerpc/cprophard.c + 4c8d1f97ae959775777a07679512e4b5 gcc/testsuite/gcc.target/powerpc/cpu-builtin-1.c + 1fb2215d04b688ce2fdb0faccd58b012 gcc/testsuite/gcc.target/powerpc/crypto-builtin-1.c + 14fe4a3bc84df2b97d9440c94d7c8339 gcc/testsuite/gcc.target/powerpc/crypto-builtin-2.c + 4e3992362b37b544083ac6eaeaa1acca gcc/testsuite/gcc.target/powerpc/ctz-1.c + 9266181f224f779baa6b98a2f3b171e8 gcc/testsuite/gcc.target/powerpc/ctz-2.c ++dcd67b030ac5a36c48772f45c9311a7a gcc/testsuite/gcc.target/powerpc/ctz-3.c ++531f016ec3779129874335e4d662190c gcc/testsuite/gcc.target/powerpc/ctz-4.c ++dff00811bdc4a0d32afb132f16084b8c gcc/testsuite/gcc.target/powerpc/darn-0.c ++a3b7e0d3cc77ae3e0b0aea94e91b58e5 gcc/testsuite/gcc.target/powerpc/darn-1.c ++3a484a34727d320db4da25fdd45adeeb gcc/testsuite/gcc.target/powerpc/darn-2.c + 965986b227062a2b8c664c916a71ad45 gcc/testsuite/gcc.target/powerpc/darwin-abi-1.c + 9a0e4836781f28669ddca26eb214c2b2 gcc/testsuite/gcc.target/powerpc/darwin-abi-10.c + 66e5cfd1b7491e37c0ef258d09b6634d gcc/testsuite/gcc.target/powerpc/darwin-abi-11.c +@@ -44990,8 +45107,9 @@ + a034d7a8bf265623a75800f01113e836 gcc/testsuite/gcc.target/powerpc/darwin-split-ld-stret.c + 548fc585bcbf766f23bef7319f0b0a18 gcc/testsuite/gcc.target/powerpc/darwin64-abi.c + 48cfcb8d91718cca2ec942edea2af044 gcc/testsuite/gcc.target/powerpc/dfmode_off.c +-37c328fb120fbf675f6e47f6e2626f1f gcc/testsuite/gcc.target/powerpc/dform-1.c +-062afe6d6e8128fc20cdfb56900ba68d gcc/testsuite/gcc.target/powerpc/dform-2.c ++f6511eaddea2d2d6dbb6428c8e9f5822 gcc/testsuite/gcc.target/powerpc/dform-1.c ++bf3533458cbe01184881116cdb4e822c gcc/testsuite/gcc.target/powerpc/dform-2.c ++571072f2c83195496efb8b6a3d7921a1 gcc/testsuite/gcc.target/powerpc/dform-3.c + f2e8694ab86e1d671840cc1b4d010431 gcc/testsuite/gcc.target/powerpc/dfp-builtin-1.c + 70b901aef4fec169c6e0277e173417fe gcc/testsuite/gcc.target/powerpc/dfp-builtin-2.c + edc590c61b2a5fd6c1f8da5e10b52099 gcc/testsuite/gcc.target/powerpc/dfp-dd-2.c +@@ -44999,6 +45117,87 @@ + 918f43d2707c381ec6a3c8f95d06ba7a gcc/testsuite/gcc.target/powerpc/dfp-td-2.c + d29a538f7ef7ada44a91b35380ca809c gcc/testsuite/gcc.target/powerpc/dfp-td-3.c + f99e26532b9bfe0b24631290281df325 gcc/testsuite/gcc.target/powerpc/dfp-td.c ++cc553c1019d680b116be75246855e5d0 gcc/testsuite/gcc.target/powerpc/dfp/dfp.exp ++03cc7e47a4479ec2055b9af5a2055522 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-0.c ++6959ef5cd0438cde997e2af826ef2d8d gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-1.c ++8f82047dd5d13bd7808101a6cae2f96a gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-10.c ++758f013931d8cc97a719f89662e5f559 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-11.c ++3b8212a7bdbfd7228a56f2142a77082d gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-12.c ++65380dd3577ee9e0a9b22cad78b2565c gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-13.c ++80d4ddd21f937e7f5cc6b1f54d5d3777 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-14.c ++f2469b3c94f1f566011419ed3f6c54c3 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-15.c ++9a597227f69d2f2ce0f06ce5d68e7e46 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-16.c ++98c6e4c9b297b48f787a19ea13166fee gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-17.c ++6278ed0a2ff858f774d06e4fa6833c07 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-18.c ++b50bd5c52b5f27cf4b0eee6c78eef867 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-19.c ++68c7553b8028a8c430aa1c40c8f624da gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-2.c ++70da3a0ca0e2c3a4e51d3fbbbcd51313 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-20.c ++fa0668a907811b58e0a0c4f409996798 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-21.c ++abe6816951e1b9e949e8b911a3b180cd gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-22.c ++2c31ee89174617e3ba574448053a4776 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-23.c ++3e0335739986a16a45163048e08ed006 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-24.c ++a22bc1b3d29bb75f9e9f4da82ccf7000 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-25.c ++f3a402fb571a70912ac64e7756e95960 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-26.c ++48fd4c4f5b16ff2839d5091efc51bc1c gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-27.c ++0c90090dac2694d64341be49176ef464 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-28.c ++d6c16f057f007ccdd7d443182f2f58ed gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-29.c ++36c01ff92130550706fac5b98007820d gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-3.c ++8e75374fe860fe454da6f1a680c53093 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-30.c ++03f7f40b1ee77245c4ed1db91842709e gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-31.c ++134a1c8226d793ac94d0652e4b65ae51 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-32.c ++67f1fa247cbccff554d48bb98247665d gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-33.c ++4edb941d627fbc374887b9f23e0f17e3 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-34.c ++e5cc2dfa10fd84ddaad3943264a4ad7f gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-35.c ++418c5a05711f0f9acd8020fe4b275a27 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-36.c ++df4d094eb16f0b1be12e3e39058baccf gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-37.c ++91d74d67304699dcaa0bcc5fea885968 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-38.c ++99ba4e76415ae84299cdbd2e35e691be gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-39.c ++955c200f2a3a98a7dc3ce9fbf4a5d301 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-4.c ++39dac34ae8d1af68556468f7c696b8aa gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-40.c ++a1cf710e376403fc2fa6bc0a774cd55a gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-41.c ++239e077c75c03ada560d0ef45ba111ed gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-42.c ++6a91cd2b45b92620b9b44d1e1d6c8a1d gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-43.c ++4c0f2cfece2b5a5e87eaa33c36b3b3c7 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-44.c ++ff7d194ce3581accd4fd84661a45b7e5 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-45.c ++b6c2800bdfb9e964c574e9f6647766b7 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-46.c ++a384e1a8d2656a2eded5ddbbbb85944d gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-47.c ++1af4396cdb9e44ea23e581e3bc867f1a gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-48.c ++3a822bc78662a47bca3c325640886000 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-49.c ++42702dc12a998715cd502e0f58c1a084 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-5.c ++59131225f967e9974e4056c8724eb44d gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-50.c ++ca1730fffd35b4df6944a51eb8e6ecd0 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-51.c ++6f290c19a8e109a3d2386b1bf4ec52fb gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-52.c ++e0c0eb7cd795a9e89a8d3bb2a7dae3c1 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-53.c ++d17666a7a3f1f4012dea704edcb358c1 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-54.c ++bc14720a9dc1307f25839ed1e2ea1df8 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-55.c ++5f29e6111a8c4445a3d2e82737ed852c gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-56.c ++4ecd75bfc45420b8fe41eb1a6f75d1a6 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-57.c ++0b3e0dd4599b91e7eb77033764ef84f4 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-58.c ++1898d182bb390c8c6491b7c435026a9e gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-59.c ++a348525fc964f3f41e12f8381fd4bcf0 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-6.c ++8fe72a2d44a5dbae21dedb5009bd7060 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-60.c ++1b1a3ecb85d752278437daf2eea0e6eb gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-61.c ++52a091925e77ba1144deef4224d6f9ca gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-62.c ++f26a1170d2c83041d7a069b94343a9d7 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-63.c ++7f10d8beb44cbeb34704f04daf38dca2 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-64.c ++1243afa79ef71c09ca472c7ad6965e54 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-65.c ++54e131b3227f901fd2e26be9a409249d gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-66.c ++e771d4d8a905e5bf787121a83f8fb1bd gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-67.c ++231bcc25e02275bc7eba589b808e66c4 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-68.c ++f72240bd263e9d2959d34419b48ec7a1 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-69.c ++e5c6066babd8f328700bb917a676f848 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-7.c ++7f5d4d6487570d1848a67d1deb2569de gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-70.c ++11baa718d3b7a09edcd806f460dbbc25 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-71.c ++b8a10e75320b7331731319d76c48b973 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-72.c ++af92c107465b701524293f2e133ca47b gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-73.c ++630a7ec679fff8883a406b022cf38aff gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-74.c ++c1e8ae021e1d249573f6608e39e8d86e gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-75.c ++b33ec26b8a79deea82491f02092ff7eb gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-76.c ++9f6e7688c4fef262f7ed52de311ab068 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-77.c ++2b710812d98f7baa361e357f4e747316 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-78.c ++2652ccf7999779ff5319bf65f0b659c1 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-79.c ++341058672752eae6a423c51813b90e2c gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-8.c ++e8ac5024db4f3ad13af9c932702e4b7f gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-9.c + e1dbd1140383b4dbafeb6bc38684cf93 gcc/testsuite/gcc.target/powerpc/dimode_off.c + c6886ac188c6209f2a35a8c394fabfa1 gcc/testsuite/gcc.target/powerpc/direct-move-double1.c + bdc2a6ba20c8709781a896620fe1326b gcc/testsuite/gcc.target/powerpc/direct-move-double2.c +@@ -45010,6 +45209,7 @@ + 8d289ff49f69a167c01f4b6855e110ac gcc/testsuite/gcc.target/powerpc/direct-move-vint1.c + c08abaae6dddb0af0b1430cc189c6040 gcc/testsuite/gcc.target/powerpc/direct-move-vint2.c + 6aa10299b67de4618abcf699cb851ce8 gcc/testsuite/gcc.target/powerpc/direct-move.h ++be7ab318182d2d9e0f83da284efdde33 gcc/testsuite/gcc.target/powerpc/divkc3-1.c + 8f2229fba1c4dc16358c52a26e62a35e gcc/testsuite/gcc.target/powerpc/doloop-1.c + 1e28ad29e43de3bf402fb713b7540c32 gcc/testsuite/gcc.target/powerpc/e500-1.c + 6b480fbd59c1e52ed8af5509486a3432 gcc/testsuite/gcc.target/powerpc/e500-ord-1.c +@@ -45025,6 +45225,8 @@ + 44257db5dbf13763224f09982671b766 gcc/testsuite/gcc.target/powerpc/float128-1.c + 8431c27a8973acc6b663c3e4190c2f2e gcc/testsuite/gcc.target/powerpc/float128-2.c + 9e6f60ec112f9373cd63307f592ff5a7 gcc/testsuite/gcc.target/powerpc/float128-call.c ++da43f175c7dca2bbe0139db71bea74f9 gcc/testsuite/gcc.target/powerpc/float128-complex-1.c ++ba0af867a51a0f317dfaf5694d966c85 gcc/testsuite/gcc.target/powerpc/float128-complex-2.c + 278c3bcb22b5f3322ae25ff38796870a gcc/testsuite/gcc.target/powerpc/float128-hw.c + e930a70de9d4456cf3f5cae8c611ac1c gcc/testsuite/gcc.target/powerpc/float128-mix.c + 437cac345cf3e7c88a4c1c8b8480547f gcc/testsuite/gcc.target/powerpc/fusion.c +@@ -45037,6 +45239,7 @@ + 238571a7588bf04ee725a409029ddaf1 gcc/testsuite/gcc.target/powerpc/htm-ttest.c + bd2f03394b7690c22ce1aab465adb75f gcc/testsuite/gcc.target/powerpc/htm-xl-intrin-1.c + 8d634b2a7d443f1e5b4b69716e57ac00 gcc/testsuite/gcc.target/powerpc/indexed-addr.c ++1cc843325d44861ca12b01f8232baced gcc/testsuite/gcc.target/powerpc/inf128-1.c + de6c3cf42bacd45ce2c483d586831396 gcc/testsuite/gcc.target/powerpc/le-altivec-consts.c + 7893fdf7b4681a84cb4d049bea9ffc10 gcc/testsuite/gcc.target/powerpc/leaf.c + 1853e044fc4484c52b41a7d64cfddd8c gcc/testsuite/gcc.target/powerpc/lhs-1.c +@@ -45052,6 +45255,8 @@ + cfbe35822c519cf32e8f41ddb02759ed gcc/testsuite/gcc.target/powerpc/mmfpgpr.c + 995bc75d9399474fb48494a941a1e00a gcc/testsuite/gcc.target/powerpc/mod-1.c + 68dd42cf85da89132923bd22aec1f9dc gcc/testsuite/gcc.target/powerpc/mod-2.c ++3aa7fc41d135e303f0c05c03811cfb39 gcc/testsuite/gcc.target/powerpc/mulkc3-1.c ++1f98efd43a15bde30353489bd97a085d gcc/testsuite/gcc.target/powerpc/nan128-1.c + e22a7266629ff9fe810fc66e708b11a6 gcc/testsuite/gcc.target/powerpc/no-r11-1.c + 0f3e464b60c769b9067c0b49078b50e5 gcc/testsuite/gcc.target/powerpc/no-r11-2.c + 302a3a348ae2f60a0b1366d1c9481f97 gcc/testsuite/gcc.target/powerpc/no-r11-3.c +@@ -45069,7 +45274,7 @@ + 218190fe0e4f681dda260926232e56b5 gcc/testsuite/gcc.target/powerpc/p8vector-builtin-7.c + 39413d857162f864cd0cfa0c0a600923 gcc/testsuite/gcc.target/powerpc/p8vector-builtin-8.c + 3f96842d16ce43bf9d8c92dab6d38fb8 gcc/testsuite/gcc.target/powerpc/p8vector-fp.c +-f29a688c117106072da0c3eb645375e9 gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c ++36ce3b715645c5b3d320e55d92cecb36 gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c + dc5273f33a688389eb35c5a79b6b04b9 gcc/testsuite/gcc.target/powerpc/p8vector-int128-2.c + fa4a7a4c3fc9401f5f7a3c80eca753f3 gcc/testsuite/gcc.target/powerpc/p8vector-ldst.c + 11c5f55b0b21129d8c523e1f11c76274 gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c +@@ -45080,8 +45285,17 @@ + 8c128eee1ed213711e07bd5bbf4ea8c5 gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-5.c + f368a72cbfc951f5d512a015f6e8c2fe gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-1.c + 46765159df83126bf98a3389decd9548 gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-2.c +-ec4a1b33aeb2dc10bc385f3a5cab0690 gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c +-44fb83fb0d58cbe1b55027ec048d86a7 gcc/testsuite/gcc.target/powerpc/p9-permute.c ++b2136c61215bc040108f9a44241aa4b3 gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c ++a56e3fa096d4eb9c5d04e5ef09bccdf7 gcc/testsuite/gcc.target/powerpc/p9-minmax-1.c ++a67318a36c32f549811fc609d45bcebe gcc/testsuite/gcc.target/powerpc/p9-minmax-2.c ++1778c48c8bde0f502ec1184c17d6661b gcc/testsuite/gcc.target/powerpc/p9-permute.c ++ce1b8af0ff483cd3f89e77c6158773e6 gcc/testsuite/gcc.target/powerpc/p9-splat-1.c ++ae816fd528711a489a96d36403ab4796 gcc/testsuite/gcc.target/powerpc/p9-splat-2.c ++90f06243a7fc1c6079c823376b9b6cc4 gcc/testsuite/gcc.target/powerpc/p9-splat-3.c ++76e637efba841cdc036746e8f48a0914 gcc/testsuite/gcc.target/powerpc/p9-splat-4.c ++1001e87b8d8b5b7135c100a89e4def45 gcc/testsuite/gcc.target/powerpc/p9-vneg.c ++69dc6d7d44a9c96a4258141385a846d7 gcc/testsuite/gcc.target/powerpc/p9-vparity.c ++7d6c7bf2bdc6cb2de461278049408eb4 gcc/testsuite/gcc.target/powerpc/p9-vpermr.c + de89784ed878c699a73dbedef03c25ef gcc/testsuite/gcc.target/powerpc/pack01.c + c9ce448310ccdac5da6fa5b69ec461fa gcc/testsuite/gcc.target/powerpc/pack02.c + fa72c1f9512bac14ea57ebf20c94c152 gcc/testsuite/gcc.target/powerpc/pack03.c +@@ -45198,7 +45412,7 @@ + 09542fc0756c51e091818e0d1a7a05b5 gcc/testsuite/gcc.target/powerpc/pr47197.c + 524c7b62ac0c9686a6bdb4804a11fce4 gcc/testsuite/gcc.target/powerpc/pr47251.c + 9bcd4da8d1ead179f5ca0c94808c2ec3 gcc/testsuite/gcc.target/powerpc/pr47755-2.c +-bcabc94dfa3cff99515bf6e3ff144a3a gcc/testsuite/gcc.target/powerpc/pr47755.c ++b15f022f6f08a7dca1b72ba59441c31f gcc/testsuite/gcc.target/powerpc/pr47755.c + a126c8ee58b9156d861ed2d613db885a gcc/testsuite/gcc.target/powerpc/pr47862.c + 187f203dd54fe5ba94f23b9af10db192 gcc/testsuite/gcc.target/powerpc/pr48053-1.c + e3647ff87eca8354091eead60728a16f gcc/testsuite/gcc.target/powerpc/pr48053-2.c +@@ -45254,7 +45468,7 @@ + 1dc925cae1c688a77865627d749d015c gcc/testsuite/gcc.target/powerpc/pr67071-3.c + 35c73d31cfb2ab34903671c0ed5ded53 gcc/testsuite/gcc.target/powerpc/pr67789.c + d513afbb48bce30e890a5d3d76987740 gcc/testsuite/gcc.target/powerpc/pr67808.c +-f9c4133177a090e3d877342b2d04766f gcc/testsuite/gcc.target/powerpc/pr68805.c ++b0dae0a08b67b28c3e8a71536d261274 gcc/testsuite/gcc.target/powerpc/pr68805.c + d369a7045eda68cbec3227a16d5de67b gcc/testsuite/gcc.target/powerpc/pr68872.c + faf2ed46677346059dd2b7fd42254985 gcc/testsuite/gcc.target/powerpc/pr69252.c + 49c8c108299a8b499707f5665d377a18 gcc/testsuite/gcc.target/powerpc/pr69461.c +@@ -45264,6 +45478,17 @@ + a31fef5f59c5f12ea342e66137c45ae7 gcc/testsuite/gcc.target/powerpc/pr70117.c + 222fda9019693e635c2d63ebdda27d2b gcc/testsuite/gcc.target/powerpc/pr70640.c + da2f788bebe8f041672950b7347513cf gcc/testsuite/gcc.target/powerpc/pr70669.c ++d3a79432800e585b3905439b686d873b gcc/testsuite/gcc.target/powerpc/pr70963.c ++31132ce703c42e34a14c7d103e655da2 gcc/testsuite/gcc.target/powerpc/pr71186.c ++18f516c22671e1293affe8823881c35c gcc/testsuite/gcc.target/powerpc/pr71493-1.c ++7d83053012a7579379ae3f803b73b2ec gcc/testsuite/gcc.target/powerpc/pr71493-2.c ++28b1e9d8edb2081a7279eaec89871fee gcc/testsuite/gcc.target/powerpc/pr71656-1.c ++d9ffd95a09400f5746357a34145f6515 gcc/testsuite/gcc.target/powerpc/pr71656-2.c ++a6ef0034e7b09484d521e41a8f3e2b46 gcc/testsuite/gcc.target/powerpc/pr71670.c ++9d1ceb34ff4072b9b15ceedc2d7a4618 gcc/testsuite/gcc.target/powerpc/pr71698.c ++140c404b55422d7f1ea527d9803d6b5f gcc/testsuite/gcc.target/powerpc/pr71720.c ++d9ccfe0048f3d64bbe5861c9aea6294f gcc/testsuite/gcc.target/powerpc/pr71763.c ++743729f568d85b4bd156413e92dea820 gcc/testsuite/gcc.target/powerpc/pr71805.c + 17f878b62dd2e08735d53fce64232a47 gcc/testsuite/gcc.target/powerpc/quad-atomic.c + 171a411d14f30e8450dc3f2ef38b1bd7 gcc/testsuite/gcc.target/powerpc/recip-1.c + 6b7c4920c070e84f6819377bcdb90c0d gcc/testsuite/gcc.target/powerpc/recip-2.c +@@ -45287,6 +45512,9 @@ + 65a53924a48d5df99017fa40a01962f4 gcc/testsuite/gcc.target/powerpc/sd-vsx.c + a53a4937c325ba3bc85e0bdea0b94e11 gcc/testsuite/gcc.target/powerpc/shift-dot.c + 416332739a98fa1f2023fe8c217782e4 gcc/testsuite/gcc.target/powerpc/shift-int.c ++4262b23e41d93c06cc511429249fcda3 gcc/testsuite/gcc.target/powerpc/signbit-1.c ++289a117f2abe4e588c45c20e3418566e gcc/testsuite/gcc.target/powerpc/signbit-2.c ++1ef9b2c104b31118ee37ca3c09991d00 gcc/testsuite/gcc.target/powerpc/signbit-3.c + b3e9870bc5d831fd67c299ee87dfb2f7 gcc/testsuite/gcc.target/powerpc/spe-evmerge.c + 89537cc7476c27c7c10b811da61def34 gcc/testsuite/gcc.target/powerpc/spe-small-data-1.c + 9d04892083c467f0ebf1fc75e043d6d8 gcc/testsuite/gcc.target/powerpc/spe-small-data-2.c +@@ -45325,6 +45553,18 @@ + d1f9b55044b5c80d668c846e0f160115 gcc/testsuite/gcc.target/powerpc/timode_off.c + fe21d9465e0313b29a24703b2cef2b7e gcc/testsuite/gcc.target/powerpc/upper-regs-df.c + 7f45b205e570d7d45266076bd4fd4f4c gcc/testsuite/gcc.target/powerpc/upper-regs-sf.c ++fe1198a185fcf0cf3c192cb7e0f554af gcc/testsuite/gcc.target/powerpc/vadsdu-0.c ++0623613fbcbc6fa96d28c319582034e3 gcc/testsuite/gcc.target/powerpc/vadsdu-1.c ++9ee678d38841407e553ad5d916841cbd gcc/testsuite/gcc.target/powerpc/vadsdu-2.c ++cd4f138fd346361e2e3103806fd8e4c8 gcc/testsuite/gcc.target/powerpc/vadsdu-3.c ++d80a979aa0ab824dbdb31e5e8db1d686 gcc/testsuite/gcc.target/powerpc/vadsdu-4.c ++3e300989c07659ab970072f3d95fde1f gcc/testsuite/gcc.target/powerpc/vadsdu-5.c ++dd9d9603bf7f30ea24dc69a515e1018f gcc/testsuite/gcc.target/powerpc/vadsdub-1.c ++d899788117c4e5a72b4b1f588fe2d14e gcc/testsuite/gcc.target/powerpc/vadsdub-2.c ++99d98db6a63856f69d9535bde676d0dc gcc/testsuite/gcc.target/powerpc/vadsduh-1.c ++b4f95876fdcc9d9ee6da80cca9fda9c6 gcc/testsuite/gcc.target/powerpc/vadsduh-2.c ++8ea44287fbf60977cedb44fec5928530 gcc/testsuite/gcc.target/powerpc/vadsduw-1.c ++f89bc692aa33f0a854308215a8c5a45c gcc/testsuite/gcc.target/powerpc/vadsduw-2.c + 6359ddccab89d64974aacae92509fc9e gcc/testsuite/gcc.target/powerpc/vec-cg.c + 4137a1d7e936bac5292a51f907266de1 gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c + 2d193a6a4c276dd8b48c488c547c2063 gcc/testsuite/gcc.target/powerpc/vec-cmp.c +@@ -45332,6 +45572,10 @@ + fa102cb45e48c286b356759209443dea gcc/testsuite/gcc.target/powerpc/vec-mult-char-2.c + bbd74596ca12fe9aac0347c6253db300 gcc/testsuite/gcc.target/powerpc/vec-shift.c + 8ee50015e788404267646adf1ac95972 gcc/testsuite/gcc.target/powerpc/vec-shr.c ++2c89883d083bc93d292eb8be25a26a55 gcc/testsuite/gcc.target/powerpc/vslv-0.c ++3032ccdc175db10c55ecb393e9757ea8 gcc/testsuite/gcc.target/powerpc/vslv-1.c ++249c2e1b9f88f56726ab8ecfe5c4e957 gcc/testsuite/gcc.target/powerpc/vsrv-0.c ++b5ff35f6c27a48ed531cd0cb2035da0b gcc/testsuite/gcc.target/powerpc/vsrv-1.c + 4ceb6855c2485b8644bf41d0692dce88 gcc/testsuite/gcc.target/powerpc/vsx-builtin-1.c + 9e3c77c5253ece30391881a511c37067 gcc/testsuite/gcc.target/powerpc/vsx-builtin-2.c + 2cbc6ebb458b1e9d41b7cd611b4dbd55 gcc/testsuite/gcc.target/powerpc/vsx-builtin-3.c +@@ -45340,6 +45584,10 @@ + 0b61a376e7164778a523a0766df4ce6e gcc/testsuite/gcc.target/powerpc/vsx-builtin-6.c + aec0aad4ad9d1a50c30d68081c0f2184 gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c + 88cd9f4d3675a8897d01117429ae8094 gcc/testsuite/gcc.target/powerpc/vsx-builtin-8.c ++60164d527bd21ab51c50c80abf146df1 gcc/testsuite/gcc.target/powerpc/vsx-elemrev-1.c ++3af84d85921a35dbef53567c5ede1159 gcc/testsuite/gcc.target/powerpc/vsx-elemrev-2.c ++5b80f1ec62fecc5421d5ce52af4b330c gcc/testsuite/gcc.target/powerpc/vsx-elemrev-3.c ++6b19bf3ff62b230d7085a802e8199e3f gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c + 29415c0ab3cf79b03ca4a55fa764901b gcc/testsuite/gcc.target/powerpc/vsx-extract-1.c + ad77cf7854ac810c73e5ad0184232f20 gcc/testsuite/gcc.target/powerpc/vsx-extract-2.c + e4ac7f141f61cf4cf8934fe3ee7cf407 gcc/testsuite/gcc.target/powerpc/vsx-extract-3.c +@@ -45466,6 +45714,7 @@ + c06cf2adc5393d32c0b9a8d805d6afb4 gcc/testsuite/gcc.target/s390/md/setmem_long-1.c + a105158cf4633c30f58d84f95c33ee67 gcc/testsuite/gcc.target/s390/morestack.c + ee3f00537b1c391d545c37c6ea4a145c gcc/testsuite/gcc.target/s390/nearestint-1.c ++20772d696b36be5fe8027a9f6a1a5faa gcc/testsuite/gcc.target/s390/nolrl-1.c + 25c3bd00fd3d097e42ac8cfc215fd0c4 gcc/testsuite/gcc.target/s390/pfpo.c + 765307a040de72f2f4376b7068d68018 gcc/testsuite/gcc.target/s390/pr20927.c + 85f31fb9b4b15529205376d3f6fa385c gcc/testsuite/gcc.target/s390/pr24624.c +@@ -45882,6 +46131,8 @@ + 7efe7d6dfe46005ac34237aa9e3e023c gcc/testsuite/gcc.target/sparc/fpadd32s.c + e7a16562b49f44afb077d0a7befb1888 gcc/testsuite/gcc.target/sparc/fpadds.c + e291921904c28ad0957b701bb53b0dda gcc/testsuite/gcc.target/sparc/fpaddsubi.c ++ac111f461cdeae36912fd3f8404ed990 gcc/testsuite/gcc.target/sparc/fpcmp.c ++2744da28c2a65f937a5d696009a68964 gcc/testsuite/gcc.target/sparc/fpcmpu.c + d5c0d8820b76e85d8f0cf1c69966a388 gcc/testsuite/gcc.target/sparc/fpmerge-2.c + a7cc3a1dfad8c1fc65ae115cb1af1560 gcc/testsuite/gcc.target/sparc/fpmerge.c + c589849053db19bd27d64bfbabf5ea20 gcc/testsuite/gcc.target/sparc/fpmul-2.c +@@ -45956,6 +46207,7 @@ + 51fff32a202c8bd3aa39b5f219127064 gcc/testsuite/gcc.target/sparc/vis3move-1.c + b19cd6113dbe3ce177bc3a6f0edd515b gcc/testsuite/gcc.target/sparc/vis3move-2.c + c743e0cdebd780532edc2e21e3de15e4 gcc/testsuite/gcc.target/sparc/vis3move-3.c ++c6e8cea536062af6f23168b438e096e3 gcc/testsuite/gcc.target/sparc/vis4misc.c + 56b799e8f22e02ad94a3b78e432a129c gcc/testsuite/gcc.target/sparc/wrgsr.c + 8ab1e95b1174d62330ff11c4ce7c22d3 gcc/testsuite/gcc.target/sparc/xmul.c + 723fd6618b2db81b9d1ef55c7f12b2d5 gcc/testsuite/gcc.target/spu/Wmain.c +@@ -46653,7 +46905,7 @@ + d5ea8f5a9e2574f03e0f07aefb628587 gcc/testsuite/gfortran.dg/array_constructor_46.f90 + 43de0ab156de7b0350c7425df3859e4a gcc/testsuite/gfortran.dg/array_constructor_47.f90 + 71b1b67746cb3b141002319b6af5c534 gcc/testsuite/gfortran.dg/array_constructor_48.f90 +-962a7a6b6e5f15ede68a20cff87053b5 gcc/testsuite/gfortran.dg/array_constructor_49.f90 ++b3fed1ef4a2d1acbb8f29ba81a3ade35 gcc/testsuite/gfortran.dg/array_constructor_49.f90 + 9918ac77cf760a3800e94da773f0a74b gcc/testsuite/gfortran.dg/array_constructor_5.f90 + 6dc05669b848d267b25c38806e59d51f gcc/testsuite/gfortran.dg/array_constructor_6.f90 + 0965c3437a2116ac32e573441184fdee gcc/testsuite/gfortran.dg/array_constructor_7.f90 +@@ -47361,6 +47613,7 @@ + 50b3c8143d77c8ce5bb9d993685e5e6b gcc/testsuite/gfortran.dg/class_array_2.f03 + 5d685c52e64583cc42131880a4b0d8fc gcc/testsuite/gfortran.dg/class_array_20.f03 + 15af94e79a85d05449886a154d162bff gcc/testsuite/gfortran.dg/class_array_21.f03 ++91de14bd0e1e34515a91a4245b3da873 gcc/testsuite/gfortran.dg/class_array_22.f03 + 3c6c7feaa5267df5f131a4ddb69162d9 gcc/testsuite/gfortran.dg/class_array_3.f03 + cb5261f2acfcf95396bea9e699efcd14 gcc/testsuite/gfortran.dg/class_array_4.f03 + b4dd99bc2d3d2741e6f3769df3b8d9e0 gcc/testsuite/gfortran.dg/class_array_5.f03 +@@ -47534,6 +47787,8 @@ + b2dba23fc22128a647db42769be9f272 gcc/testsuite/gfortran.dg/coindexed_1.f90 + f921a7c5a0e4098dd6b6edf4e317a4e1 gcc/testsuite/gfortran.dg/com_block_driver.f90 + 2595b7b0d8e86ae62cf503bd5080ee45 gcc/testsuite/gfortran.dg/comma.f ++ca9b384b7523fa630f1d4edff3cd4267 gcc/testsuite/gfortran.dg/comma_IO_extension_1.f90 ++7b4fe3be18cf5d3e2bcac0b98a2191d6 gcc/testsuite/gfortran.dg/comma_IO_extension_2.f90 + b68510025102f4e42c5ab3a0ebf1b5aa gcc/testsuite/gfortran.dg/comma_format_extension_1.f + e9f174aaa655ec093b7c3dc075581e89 gcc/testsuite/gfortran.dg/comma_format_extension_2.f + e38edb0e607a003fddf67b7597b40626 gcc/testsuite/gfortran.dg/comma_format_extension_3.f +@@ -47693,6 +47948,24 @@ + 311f4c5de7848479e7c29ad08de71190 gcc/testsuite/gfortran.dg/debug/trivial.f + 431530310efb9ec01e397a4a411f8e67 gcc/testsuite/gfortran.dg/debug_1.f90 + f12fc8f8c675ad90dacda21c47b123cf gcc/testsuite/gfortran.dg/debug_2.f ++299b547bcb6b486a2e1f3e6ff0e387b8 gcc/testsuite/gfortran.dg/dec_structure_1.f90 ++facc0d311d19c38571f70f8db13044bc gcc/testsuite/gfortran.dg/dec_structure_10.f90 ++bebb7b5cba927374343e4d102d6bdef2 gcc/testsuite/gfortran.dg/dec_structure_11.f90 ++c065ec9eab467c19e2503ea2b5ec35f6 gcc/testsuite/gfortran.dg/dec_structure_2.f90 ++17d1e3238da3930c57838b7f1d610c40 gcc/testsuite/gfortran.dg/dec_structure_3.f90 ++17bdec7f0e2ee1d7fce0b23ebd82610a gcc/testsuite/gfortran.dg/dec_structure_4.f90 ++e60b5448cb28834a5043d778f28b0029 gcc/testsuite/gfortran.dg/dec_structure_5.f90 ++5276660c4588b2f9922aacd54e303a2d gcc/testsuite/gfortran.dg/dec_structure_6.f90 ++b7df816a5764cf98d0af9a21fc087015 gcc/testsuite/gfortran.dg/dec_structure_7.f90 ++a3842131746a182a4d0d806a0ead8cf9 gcc/testsuite/gfortran.dg/dec_structure_8.f90 ++ba7bd70d8f9beaa28febfa1d800b3cf7 gcc/testsuite/gfortran.dg/dec_structure_9.f90 ++13560c998f2fbbcc2fd45b4777d0e4c9 gcc/testsuite/gfortran.dg/dec_union_1.f90 ++069da68835dead9331318c2f9a653aec gcc/testsuite/gfortran.dg/dec_union_2.f90 ++83928614f196067ade7992b31468aef9 gcc/testsuite/gfortran.dg/dec_union_3.f90 ++0557177e9e8702f52b8f249aa7941985 gcc/testsuite/gfortran.dg/dec_union_4.f90 ++3f6b8d2969f783d7204a320cf8b95cd2 gcc/testsuite/gfortran.dg/dec_union_5.f90 ++ac7e4f8e406a6c26533909c71fa6b3fd gcc/testsuite/gfortran.dg/dec_union_6.f90 ++3bf903f4b6b040909bf42cbcf85d3330 gcc/testsuite/gfortran.dg/dec_union_7.f90 + 24aa7ef3c5125fd57a6bf5b0d5a11a5f gcc/testsuite/gfortran.dg/default_format_1.f90 + 42dc43ca59716a600a5d47ef02504fc7 gcc/testsuite/gfortran.dg/default_format_1.inc + 6639ce11899c92de50597c547e431fe7 gcc/testsuite/gfortran.dg/default_format_2.f90 +@@ -47715,6 +47988,7 @@ + c26c871bf08605ce024253a49da3b53a gcc/testsuite/gfortran.dg/deferred_character_14.f90 + 1c4f05212f5447da65bd477a1f755ce9 gcc/testsuite/gfortran.dg/deferred_character_15.f90 + bcdb84ffa3c50231ecd967d3114134ae gcc/testsuite/gfortran.dg/deferred_character_16.f90 ++c2d3fe3d7d640f7941cc2bc632a62dae gcc/testsuite/gfortran.dg/deferred_character_17.f90 + 0065ab4e114bfcdbbb2b3374d1ffdc63 gcc/testsuite/gfortran.dg/deferred_character_2.f90 + 496fec17b89042f5546165ec11d36f09 gcc/testsuite/gfortran.dg/deferred_character_3.f90 + 1d0633419cdd140f8ca51872f6219b2d gcc/testsuite/gfortran.dg/deferred_character_4.f90 +@@ -47789,6 +48063,7 @@ + dca63cf93efe22616e44d9f46b5b1933 gcc/testsuite/gfortran.dg/dependency_43.f90 + 52a475961b0e9c97d571fa626e1754b5 gcc/testsuite/gfortran.dg/dependency_44.f90 + 9908775fdc0125fcca5e0250d562cdb1 gcc/testsuite/gfortran.dg/dependency_45.f90 ++18bd6a173b22bb353c669d8ab0cbe6df gcc/testsuite/gfortran.dg/dependency_46.f90 + 590a99c4ec44cc37aa92b225e93d6e87 gcc/testsuite/gfortran.dg/dependency_5.f90 + 03218919538313b26e09fa1b8f0efda0 gcc/testsuite/gfortran.dg/dependency_6.f90 + 699f1378f5c1fcdc54eb21fdb4a59be1 gcc/testsuite/gfortran.dg/dependency_7.f90 +@@ -48477,17 +48752,19 @@ + 6efd4df3178f228cb542d2003c66b882 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gcc/testsuite/gfortran.dg/goacc/cache-1.f95 ++0770d02d65abc7014c30751880ebe628 gcc/testsuite/gfortran.dg/goacc/cache-2.f95 ++83d4a89dbb466047d65da89db7eebee2 gcc/testsuite/gfortran.dg/goacc/coarray.f95 + 802487ba26d5909068b6a8fd851b3b28 gcc/testsuite/gfortran.dg/goacc/coarray_2.f90 +-55f389e7d2475dfd568dc4cfc36ee031 gcc/testsuite/gfortran.dg/goacc/combined-directives.f90 ++a7d31e00fe9a2d414bb73e11030c72bc gcc/testsuite/gfortran.dg/goacc/combined-directives.f90 + d1e02d6d5cf7ba5e1a5efb88f2c97c94 gcc/testsuite/gfortran.dg/goacc/combined_loop.f90 + 9d0226e6bd1816759f20d69d9cfb27cc gcc/testsuite/gfortran.dg/goacc/continuation-free-form.f95 +-95640396b34a8b7bad7efe08268dc32c gcc/testsuite/gfortran.dg/goacc/cray.f95 ++1d2b9f57ee07b286f80f6b187af2ff1b gcc/testsuite/gfortran.dg/goacc/cray-2.f95 ++decf3300196fa1217139ef97f2e0edda gcc/testsuite/gfortran.dg/goacc/cray.f95 + 4bb22bcb9fe8f7604be602bc77be659f gcc/testsuite/gfortran.dg/goacc/critical.f95 + 022517e8228f065e890dddca8b9c62eb gcc/testsuite/gfortran.dg/goacc/data-clauses.f95 + cf1b8cb94fd316d9739bca6a5a62b7c8 gcc/testsuite/gfortran.dg/goacc/data-tree.f95 +@@ -48522,26 +48799,30 @@ + b3ec1dda65c543c847dd7dddd2c4225d gcc/testsuite/gfortran.dg/goacc/kernels-tree.f95 + 69f03def6f88f62ff022aa924b3ef5ec gcc/testsuite/gfortran.dg/goacc/list.f95 + e6dbc70731a1d1ca5862632bc04ef617 gcc/testsuite/gfortran.dg/goacc/literal.f95 +-2b88ae51fe174e583daaf03c09fcec02 gcc/testsuite/gfortran.dg/goacc/loop-1.f95 ++b26795c8c89b35d75e8f259a55524874 gcc/testsuite/gfortran.dg/goacc/loop-1-2.f95 ++687f26e7d2845bfca2374df935de0ad8 gcc/testsuite/gfortran.dg/goacc/loop-1.f95 + f89d863f93581b48d43a32a8190ba33e gcc/testsuite/gfortran.dg/goacc/loop-2.f95 +-c9153e6a6dac5781507ac515cab62dd5 gcc/testsuite/gfortran.dg/goacc/loop-3.f95 ++7a6e1274863fdd10d60c8e28013470ad gcc/testsuite/gfortran.dg/goacc/loop-3-2.f95 ++4ab6f70640fa56a4b2322cbd843dc31e gcc/testsuite/gfortran.dg/goacc/loop-3.f95 + 7650c1b33dcca66bb9a4288605d35e20 gcc/testsuite/gfortran.dg/goacc/loop-4.f95 + 9cd553c36e742f7b04d15d0cb0a6a48e gcc/testsuite/gfortran.dg/goacc/loop-5.f95 + 1d6f955c573654211baccdf5274140f4 gcc/testsuite/gfortran.dg/goacc/loop-6.f95 + 6cf3587f7d4ad23454dd236855ca4765 gcc/testsuite/gfortran.dg/goacc/loop-7.f95 + 6a1610362e13864115701f5d730ee4d1 gcc/testsuite/gfortran.dg/goacc/loop-tree-1.f90 + 677cbf9fd090598ed630bcfe28346d68 gcc/testsuite/gfortran.dg/goacc/multi-clause.f90 ++d8029a1c26556a69cbb64f6e00104fc1 gcc/testsuite/gfortran.dg/goacc/nested-function-1.f90 + 0eceec0214676eaf97b87027864084f8 gcc/testsuite/gfortran.dg/goacc/omp-fixed.f + 7ac95438e9a28b224841f382a0cd1c73 gcc/testsuite/gfortran.dg/goacc/omp.f95 + 858af9153dd1e561ac2db5bbc63970fc gcc/testsuite/gfortran.dg/goacc/parallel-kernels-clauses.f95 + 1ba4b22dac74c58581a0548cc088e27d gcc/testsuite/gfortran.dg/goacc/parallel-kernels-regions.f95 + f111c33f57aecc85e59e669c980e4436 gcc/testsuite/gfortran.dg/goacc/parallel-tree.f95 + 4f9ac2d37e02e4f60dbb47924519e3ad gcc/testsuite/gfortran.dg/goacc/parameter.f95 ++b4f5bf838607d6206aae8d768d23c64e gcc/testsuite/gfortran.dg/goacc/pr71704.f90 + 93028fbaf2e1d8a3907db1cacb627cf7 gcc/testsuite/gfortran.dg/goacc/private-1.f95 + 24e251dd88a9ea6377e535f5ee5f31ed gcc/testsuite/gfortran.dg/goacc/private-2.f95 + a70416eb409bcd3ad178b3d0127d84e8 gcc/testsuite/gfortran.dg/goacc/private-3.f95 + 62b5f5b00b9662a8b75727b0922b367d gcc/testsuite/gfortran.dg/goacc/pure-elemental-procedures.f95 +-d12cf9a036092d8d5b7280b4a40b9ca0 gcc/testsuite/gfortran.dg/goacc/reduction-2.f95 ++9b703807d8c979fc38c25732d2b58ed7 gcc/testsuite/gfortran.dg/goacc/reduction-2.f95 + d3ab76f25073383b9b4da99d0ae1d5da gcc/testsuite/gfortran.dg/goacc/reduction-3.f95 + 05592ff32b84187f44ceb5b9e28798d2 gcc/testsuite/gfortran.dg/goacc/reduction-promotions.f90 + 46fd853a6275991852de09ff935972f6 gcc/testsuite/gfortran.dg/goacc/reduction.f95 +@@ -48555,7 +48836,6 @@ + 1de77dbd04bee79fc48688363255fcd9 gcc/testsuite/gfortran.dg/goacc/several-directives.f95 + f06b08508075bc5860b3aef6a69260fe gcc/testsuite/gfortran.dg/goacc/sie.f95 + cb4390c1c6c7c2a0935783bfe228925e gcc/testsuite/gfortran.dg/goacc/subarrays.f95 +-541c6f516c94b64ec10c75b4beec8152 gcc/testsuite/gfortran.dg/goacc/subroutines.f90 + 2fcae0aca98e7612762a0d64de5d1b4d gcc/testsuite/gfortran.dg/goacc/uninit-copy-clause.f95 + 1b773656b8a7d541df7a20f4cb0b21c5 gcc/testsuite/gfortran.dg/goacc/uninit-dim-clause.f95 + dd2a54a711f3f1fc2d508534164228f9 gcc/testsuite/gfortran.dg/goacc/uninit-firstprivate-clause.f95 +@@ -48649,6 +48929,8 @@ + 31f5c4996a25be6d38e18faf28b150b4 gcc/testsuite/gfortran.dg/gomp/openmp-simd-1.f90 + 2b03c97061d19eddde270a6c9dd3fc38 gcc/testsuite/gfortran.dg/gomp/openmp-simd-2.f90 + 7b53af38ad214d98f0d0550bbb80b654 gcc/testsuite/gfortran.dg/gomp/openmp-simd-3.f90 ++ab6d18741860d8f9094676890b96e068 gcc/testsuite/gfortran.dg/gomp/order-1.f90 ++618c952f5bbb7326c70d6e7a786f679d gcc/testsuite/gfortran.dg/gomp/order-2.f90 + 9a6817790a272cd8153d4303d324c00f gcc/testsuite/gfortran.dg/gomp/pr26224.f + d2c74a71f2bea0005d853821e6f0142c gcc/testsuite/gfortran.dg/gomp/pr27573.f90 + 7905e149c2a2dbed5b9dd43384d712f4 gcc/testsuite/gfortran.dg/gomp/pr29759.f90 +@@ -48688,6 +48970,11 @@ + 624512980f4f3b39deb857cfdd5fdeba gcc/testsuite/gfortran.dg/gomp/pr62131.f90 + 5d7b04ab3b84314d89ea68a7f054ea17 gcc/testsuite/gfortran.dg/gomp/pr66633.f90 + 008d934abb38a4acedd9f90092aa4b6d gcc/testsuite/gfortran.dg/gomp/pr69128.f90 ++94a8931b1a8c928dadf01cdde210bbba gcc/testsuite/gfortran.dg/gomp/pr70855.f90 ++a21e59357a45d319e791dda388391242 gcc/testsuite/gfortran.dg/gomp/pr71687.f90 ++1724cefc87db9a0a62b6387ee74cffc2 gcc/testsuite/gfortran.dg/gomp/pr71704.f90 ++7d3f1abdbdd106580173760b443a9b40 gcc/testsuite/gfortran.dg/gomp/pr71705.f90 ++d07d71ded0663c9dc2e67b06e6231cfc gcc/testsuite/gfortran.dg/gomp/pr71758.f90 + b4be3f9de7631846875a711ae9b67293 gcc/testsuite/gfortran.dg/gomp/proc_ptr_1.f90 + 87885556568e657ef4c936c53e1c7305 gcc/testsuite/gfortran.dg/gomp/proc_ptr_2.f90 + 59e444df8ec8f5ea9859b5aef4d75865 gcc/testsuite/gfortran.dg/gomp/reduction1.f90 +@@ -48770,7 +49057,7 @@ + 5754b3cf46378cb45f6e5a1d41b0cd4a gcc/testsuite/gfortran.dg/graphite/pr37852.f90 + d056a2044b7a3f7f763fe76fad38958d gcc/testsuite/gfortran.dg/graphite/pr37857.f90 + 39980079ddf92937d334ad4fa7d63b74 gcc/testsuite/gfortran.dg/graphite/pr37980.f90 +-9fd92c1b4b047e3ecad9e87cacd557e5 gcc/testsuite/gfortran.dg/graphite/pr38083.f90 ++5d9ba2a3b15bd5a5d3fec321b23e780b gcc/testsuite/gfortran.dg/graphite/pr38083.f90 + 2f361e4dc036f2a777b5340709d7cbad gcc/testsuite/gfortran.dg/graphite/pr38459.f90 + 68989e2f56ab16cebeffc96df65b3c7d gcc/testsuite/gfortran.dg/graphite/pr38953.f90 + c5c4a63aba69d822a86d91f0242eb7c9 gcc/testsuite/gfortran.dg/graphite/pr39516.f +@@ -48811,7 +49098,7 @@ + c6ccb0077483440bf572afc0c07cf295 gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90 + f9932e22f4bc6baa989154035dbac7c1 gcc/testsuite/gfortran.dg/guality/arg1.f90 + 49b421794f66b18bf7f66026f68f035f gcc/testsuite/gfortran.dg/guality/guality.exp +-34aa3a6f198ba5d265275076a07dbf9a gcc/testsuite/gfortran.dg/guality/pr41558.f90 ++d4523e218e3a6d976774e7e026bca339 gcc/testsuite/gfortran.dg/guality/pr41558.f90 + 85b827d8051a3d9581ba2a6e6709d5c9 gcc/testsuite/gfortran.dg/hollerith.f90 + 855af7807ad9d75aef7ff85c2859a0c2 gcc/testsuite/gfortran.dg/hollerith2.f90 + ac7abff09db32e7d44719f0d0472dc64 gcc/testsuite/gfortran.dg/hollerith3.f90 +@@ -49025,7 +49312,7 @@ + fa2faf183145bf87d1497a8e18cf67c2 gcc/testsuite/gfortran.dg/integer_exponentiation_3.F90 + 901fdf8ccfce7240b5e2cfa3f7fcb07c gcc/testsuite/gfortran.dg/integer_exponentiation_4.f90 + ebd2c7181d1d1a74fb8d92fa4d5dcadf gcc/testsuite/gfortran.dg/integer_exponentiation_5.F90 +-fcfb49c9fc1a86ba81cd5f03602cd781 gcc/testsuite/gfortran.dg/integer_exponentiation_6.F90 ++5436c9710c4dbacc08026642a5d88b2d gcc/testsuite/gfortran.dg/integer_exponentiation_6.F90 + 9a94a4b4c3991300273d3eff16279572 gcc/testsuite/gfortran.dg/intent_optimize_1.f90 + 6ad3133cfe62e722e018d386dbfd3404 gcc/testsuite/gfortran.dg/intent_out_1.f90 + 56f012500f1600964f96a00b144bd1bb gcc/testsuite/gfortran.dg/intent_out_2.f90 +@@ -50114,7 +50401,14 @@ + 4dfe5b03dbae8d8845caac4e7f7c0a89 gcc/testsuite/gfortran.dg/pr69155.f90 + f0a6995f73ec38a5c8e24e5d968a365b gcc/testsuite/gfortran.dg/pr69554-1.F90 + fe55b4afdea6006daace9aa79199e551 gcc/testsuite/gfortran.dg/pr69554-2.F90 ++68938073de3c2383615f40d0ec615519 gcc/testsuite/gfortran.dg/pr69603.f90 + c718be52c08cbfe5941dc1bb7a50bcb5 gcc/testsuite/gfortran.dg/pr69987.f90 ++23dc11b0707086a8168e76c17d13d620 gcc/testsuite/gfortran.dg/pr70673.f90 ++0e424f05f2fdeb786b877ace2617112d gcc/testsuite/gfortran.dg/pr70931.f90 ++a16162b0759105febc1efc1311184688 gcc/testsuite/gfortran.dg/pr71047.f08 ++75b8abd1f0f9d2e236605ecc6792b9fb gcc/testsuite/gfortran.dg/pr71204.f90 ++dffe49f90e191f0e0d1a1c6f8d53f854 gcc/testsuite/gfortran.dg/pr71688.f90 ++ea322d8eb84f224e47f5c54a96e8cd2d gcc/testsuite/gfortran.dg/pr71764.f90 + 6ff99f4b0021f30bee039a61db7cba9d gcc/testsuite/gfortran.dg/predcom-1.f + 20a411a7e5a57891297c4c6a96d92009 gcc/testsuite/gfortran.dg/predcom-2.f + 80cf60710448ac2378aecda5fc4a57b6 gcc/testsuite/gfortran.dg/present_1.f90 +@@ -50711,8 +51005,9 @@ + 3318d144c2d4abef44dd2d14c35a6adc gcc/testsuite/gfortran.dg/submodule_11.f08 + 9542945224c8744c6179ede6b10e8b0d gcc/testsuite/gfortran.dg/submodule_12.f08 + f52d9c0fcdf271bd2e5abda2cc3b4855 gcc/testsuite/gfortran.dg/submodule_13.f08 +-afd5cd591a97b8e5a6e049931330c963 gcc/testsuite/gfortran.dg/submodule_14.f08 +-475ea51fbff182674030048c7b52aaec gcc/testsuite/gfortran.dg/submodule_15.f08 ++04974d3f93910435057c4f73f05e14cd gcc/testsuite/gfortran.dg/submodule_14.f08 ++adcecf1db1bbd9194a601cae633dbba7 gcc/testsuite/gfortran.dg/submodule_15.f08 ++76252beb42c84ee49919cc34174e21af gcc/testsuite/gfortran.dg/submodule_16.f08 + 97424405e3e17827757a639a19573fa4 gcc/testsuite/gfortran.dg/submodule_2.f08 + ac42e5598feef42b948692956c7ed537 gcc/testsuite/gfortran.dg/submodule_3.f08 + 68f9f70d888318a31160ba732171726f gcc/testsuite/gfortran.dg/submodule_4.f08 +@@ -50931,6 +51226,7 @@ + 0e692a977ecc4ab86f2eddee444794b4 gcc/testsuite/gfortran.dg/uncommon_block_data_1.f90 + 6f108a647e3b73bca74907355e7a2d85 gcc/testsuite/gfortran.dg/unconstrained_commons.f + 2fb717fe29fa528056cd388b7064ce96 gcc/testsuite/gfortran.dg/underflow.f90 ++39050472f0bc284f515f1898b0c79a2e gcc/testsuite/gfortran.dg/unexpected_eof.f + 7b6179afe920e46575539bf900b34222 gcc/testsuite/gfortran.dg/unexpected_interface.f90 + deb2555ff248a9775b72c008e6de9795 gcc/testsuite/gfortran.dg/unf_io_convert_1.f90 + 52c34a568acefcf68e800ca5c3b7f7e8 gcc/testsuite/gfortran.dg/unf_io_convert_2.f90 +@@ -51812,6 +52108,7 @@ + e2983168c9a3f63dee423c9ab7489d56 gcc/testsuite/gnat.dg/c_words.adb + 818af14f525730860678bca32d713541 gcc/testsuite/gnat.dg/c_words.ads + d52f72e41d04b3c98fb25494f2645bea gcc/testsuite/gnat.dg/capture_value.adb ++9db4166fc85c98e9ec451ab5419d883a gcc/testsuite/gnat.dg/case_character.adb + 4770f7aff2ceceb688301adf7cfb0c13 gcc/testsuite/gnat.dg/case_null.adb + 8847695c0d583376223247da04d2d2e5 gcc/testsuite/gnat.dg/case_null.ads + 1bf3fc0381b629fc3f416a475d1302fb gcc/testsuite/gnat.dg/case_optimization1.adb +@@ -51878,6 +52175,7 @@ + 00416c1ffc3228fc0f9bd2f529abeaeb gcc/testsuite/gnat.dg/debug4.adb + 972c01247ac04a4b8e00f62a95d4f0fc gcc/testsuite/gnat.dg/debug4_pkg.adb + 6ea95671601e0326e72591fbfc5de13a gcc/testsuite/gnat.dg/debug4_pkg.ads ++c1bc8b0ecc894424728b5b4911bf1cc6 gcc/testsuite/gnat.dg/debug5.adb + 11735efa0b9cef4f67d8e3f4899d5dcb gcc/testsuite/gnat.dg/decl_ctx_def.ads + 1e3eab2cf62e279c000f95051138781d gcc/testsuite/gnat.dg/decl_ctx_use.adb + d647ddf65b566e41973afeb047912147 gcc/testsuite/gnat.dg/decl_ctx_use.ads +@@ -52427,6 +52725,8 @@ + a6c7953bc37af2c4687583d602b5357c gcc/testsuite/gnat.dg/opt51.adb + 3036c312a42a98f72343dcfb25c615a2 gcc/testsuite/gnat.dg/opt51_pkg.ads + d715f4258a659b9f52add768ec0176d3 gcc/testsuite/gnat.dg/opt52.adb ++61534b77f2217dab18d66d63b8866b3a gcc/testsuite/gnat.dg/opt56.adb ++589d51425474ad576aae93a10d95f178 gcc/testsuite/gnat.dg/opt56.ads + e5e7ff61479fbeb7973786d07f72ba84 gcc/testsuite/gnat.dg/opt6.adb + 87097de987361854f4c5179a6de42c2c gcc/testsuite/gnat.dg/opt6.ads + a441d166cc0d4b34342468308b350060 gcc/testsuite/gnat.dg/opt7.adb +@@ -52529,6 +52829,8 @@ + a69c0bfa5361221d9a3ccb55aba36f65 gcc/testsuite/gnat.dg/remote_type.ads + 5a11b23912d6e1695fe7b02ca1ab1e79 gcc/testsuite/gnat.dg/renaming1.adb + bd812535e6617c5f4dde6719c8748277 gcc/testsuite/gnat.dg/renaming1.ads ++95d7703afe25fd090863c05ffcded594 gcc/testsuite/gnat.dg/renaming10.adb ++404005db149a5434ece08f5fccea5a18 gcc/testsuite/gnat.dg/renaming10.ads + 3afb13f37cfc3455f0f0be64d053892f gcc/testsuite/gnat.dg/renaming2.adb + 1a954da0b1e7e11673319b058eb82146 gcc/testsuite/gnat.dg/renaming3.adb + 9c415422ce59266c9af89e8d3fd1df74 gcc/testsuite/gnat.dg/renaming4.ads +@@ -54379,7 +54681,7 @@ + bc3c7df09495f62a7ff924aeda27871f gcc/testsuite/lib/scantree.exp + fd4fe0b217182ec61ad209b8b9560725 gcc/testsuite/lib/target-libpath.exp + f475e8e2d4f9bd50e1c4f5ee88955e99 gcc/testsuite/lib/target-supports-dg.exp +-2ca0216d437918962131c6e27c219116 gcc/testsuite/lib/target-supports.exp ++81a83339c4e05edfaa689434dae89de5 gcc/testsuite/lib/target-supports.exp + cfcacc2a887c0ba90640d2646cdb13df gcc/testsuite/lib/target-utils.exp + d0478737f0c5786d095c1ca581b0dafa gcc/testsuite/lib/timeout-dg.exp + ab858bda48392f10cfc775daebf0bbd8 gcc/testsuite/lib/timeout.exp +@@ -55328,9 +55630,11 @@ + 10d4ea2c47febed0bbc5688f380b3439 gcc/testsuite/objc/execute/static-2.m + a57e521085412bbde60e78229ace4fd5 gcc/testsuite/objc/execute/trivial.m + 2d60a6650416d3bcd6a3f5f1fb61dece gcc/testsuite/objc/execute/va_method.m ++03f60b73f1fbd1151f587782de731364 gcc/testsuite/opt55.adb ++2f8548e74c5a464d97ac0283d9d45017 gcc/testsuite/opt55.ads + 8e810400df215d5a3c3a5918414f2567 gcc/timevar.c +-dd062f4defa1af2bf819c4c11f39b79a gcc/timevar.def +-e105ea612b809c4eb10d1f55004990f0 gcc/timevar.h ++270ecff76752a63ed71a9cd892884668 gcc/timevar.def ++5d6d78630ce2cf12488bfb9fba34b7da gcc/timevar.h + 1db6f2e372b1af92e0671da08d9bae7b gcc/tlink.c + 67e5012a5b3f405f6257abc6a945e73e gcc/toplev.c + 4b9e8fd609c1573d9fd5d43bde33866c gcc/toplev.h +@@ -55346,7 +55650,7 @@ + f713f4da05f4d4a13d250939a5eb4703 gcc/tree-cfgcleanup.c + 00f42379eee5485bfc493cb60e0d7d5b gcc/tree-cfgcleanup.h + aca1f99bd5df778be73f5678d6f93360 gcc/tree-chkp-opt.c +-7f29bc54f04d7bdb5d970c8ced9ce727 gcc/tree-chkp.c ++7e6ad67e923cf3b95ff981d14d0c4a1d gcc/tree-chkp.c + 2ff57aba516c82bd2d6d9444d695ca7c gcc/tree-chkp.h + a5085f5177f0f41d2b8a37af4391a3c7 gcc/tree-chrec.c + 43ea0ae76ce17d30b45a0433304ef5b7 gcc/tree-chrec.h +@@ -55366,17 +55670,17 @@ + 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bfdff86bbeca1fa7f1812fcf614346ef gcc/tree-outof-ssa.c + d54568e25cf2ea37efc4fdbdb7cc946a gcc/tree-outof-ssa.h +@@ -55391,13 +55695,13 @@ + 99a21e7e99ce428caf4aff51ca2328a3 gcc/tree-profile.c + c4a672c5b34898471e4c09cd7d897c6f gcc/tree-scalar-evolution.c + ddd74c800272e36b5e04e6b839d5aaf9 gcc/tree-scalar-evolution.h +-b1365506126df71ada53674e6e684695 gcc/tree-sra.c ++fc0f9a64091d8fb69026693b3385fafe gcc/tree-sra.c + 5cbd1c07136c29a87b15ca8006f24649 gcc/tree-ssa-address.c + 1fb91694b7ea342f3f4755974d570401 gcc/tree-ssa-address.h + 630bd55e80d8b02f04bf9979745e5eaa gcc/tree-ssa-alias.c + b2112211d28a5a985396b2b827acfd25 gcc/tree-ssa-alias.h + 9a7c8e81ccb787bb00b0ee8ef2a71586 gcc/tree-ssa-ccp.c +-f14c1971c50057b0efda7772baa2d122 gcc/tree-ssa-coalesce.c ++4e0e13ee3807e5c0daad9489f9fd55d2 gcc/tree-ssa-coalesce.c + 0a798eb3055ef1b38167cee71723befe gcc/tree-ssa-coalesce.h + d655d555dd2ea00da5e0e3cfe76f03a6 gcc/tree-ssa-copy.c + 7430a47cea2356d7083f6b39087b46cc gcc/tree-ssa-dce.c +@@ -55418,27 +55722,27 @@ + 037e46f901b04e1897e0f5338070fceb gcc/tree-ssa-loop-niter.c + e39c11a700556495027cf2594eda607e gcc/tree-ssa-loop-niter.h + 7206349f9866f4040378a141a4a3fc10 gcc/tree-ssa-loop-prefetch.c +-84aa2feb3f8ea51e2cc8fe865216939a gcc/tree-ssa-loop-unswitch.c ++cedc12f866ad14c0ce0ff80357554e21 gcc/tree-ssa-loop-unswitch.c + 7b56fac467e6a65d335907e274999ddb gcc/tree-ssa-loop.c + 4c430ffbb3398e58ddeb42580926a06a gcc/tree-ssa-loop.h + 83739b381655c7ccd1da3706e62f763a gcc/tree-ssa-math-opts.c + 09e6cc3a775fe10a83c1b13a20ff8ad5 gcc/tree-ssa-operands.c + ae2259e78bf92cdab02fb8c53b1f6140 gcc/tree-ssa-operands.h + 169a3b8b19b7f59128b8fe9f320c7fcd gcc/tree-ssa-phionlycprop.c +-49410965fa7b486577975e8debd36e2f gcc/tree-ssa-phiopt.c ++b85be844891ced7fd987529031c3d383 gcc/tree-ssa-phiopt.c + 27c779dd8cb8a44e82d9efddf8d5e8e1 gcc/tree-ssa-phiprop.c + b203f1a7e87223f4283cef39502baa59 gcc/tree-ssa-pre.c + 6eca612875babdeead518212272356c7 gcc/tree-ssa-propagate.c + 2c2fdda0693f653ff6694bec50f9c6be gcc/tree-ssa-propagate.h + 33d8e1cb9a77d4f2092ec76958543645 gcc/tree-ssa-reassoc.c +-c657927d72df8ff9c34292cc1f741095 gcc/tree-ssa-sccvn.c ++db75889847d8554f03c878a71e52ee38 gcc/tree-ssa-sccvn.c + bf9606517975c072a298e6e9648d84fe gcc/tree-ssa-sccvn.h + 27f3203e67b17d43acb249774afcce00 gcc/tree-ssa-scopedtables.c + faf7ec5d35f4c8016f9e652447e47297 gcc/tree-ssa-scopedtables.h + b5d1efde969440d8b72d27d076a0ded2 gcc/tree-ssa-sink.c +-46a7699a73f5e5286886d89d2bd5de52 gcc/tree-ssa-strlen.c +-33dafcfeaf6c84a5506cc3816c86faf8 gcc/tree-ssa-structalias.c +-1d75d06dc18c08ea9eae1d79c319be9b gcc/tree-ssa-tail-merge.c ++5ca1b76e4fefc9dd0b6407eef1209e54 gcc/tree-ssa-strlen.c ++d738280db76fb802d569cd6be9d607d8 gcc/tree-ssa-structalias.c ++1a154f97147787cf927ca27f492d0000 gcc/tree-ssa-tail-merge.c + a31830f7606f1d982bb91bfda1036ca7 gcc/tree-ssa-ter.c + 72d07b4d9955684fab7636c602c4b360 gcc/tree-ssa-ter.h + f01de11598fc3072fc0b64a42e7d2825 gcc/tree-ssa-threadbackward.c +@@ -55448,8 +55752,8 @@ + cdc7062662420b220cbdf71ad079b3da gcc/tree-ssa-threadupdate.c + 268d9ea686863a09a4d82c900aa4c453 gcc/tree-ssa-threadupdate.h + 2aceb281be597588bf8b234371f7f9b0 gcc/tree-ssa-uncprop.c +-8ea45b89bc709fa068dda47244128737 gcc/tree-ssa-uninit.c +-ddc52810a19a908dfb484ac2adcd0a8f gcc/tree-ssa.c ++d5a1e950b0f1aec43c3cdc2e60194636 gcc/tree-ssa-uninit.c ++8144927d9c28207da8408d4fe6f74dd9 gcc/tree-ssa.c + d10beb2794c644e7d51b66973cf5f119 gcc/tree-ssa.h + 462f5e30bf38034f61977d169ac9b1d7 gcc/tree-ssanames.c + db5115461f6035db3ac2359d88de6bb6 gcc/tree-ssanames.h +@@ -55461,26 +55765,26 @@ + d582f891f95af854317037e4020c5f90 gcc/tree-streamer.h + 11bd30d126bfef5e25674bf369287718 gcc/tree-switch-conversion.c + 88fc834970e1ba32e98998d7ce7ecf09 gcc/tree-tailcall.c +-ff2c431cb2ebc6c957f22bf35b8a688f gcc/tree-vect-data-refs.c ++3df1efa82963e06359c8d728ff0de39f gcc/tree-vect-data-refs.c + a78063c6f19eea041e35fe5515a935f2 gcc/tree-vect-generic.c + 318b8e4c49ce9ec44a055d34b947f5c9 gcc/tree-vect-loop-manip.c +-ca460ecf31dfad6c90712eb57309221b gcc/tree-vect-loop.c +-59b33d1d3db9231379ab4bc62f42cdad gcc/tree-vect-patterns.c +-fa66db0d8c17a25f34719a755a575ea6 gcc/tree-vect-slp.c +-05c56dc171e2656047de4e06c36f2cf0 gcc/tree-vect-stmts.c ++295d03e5d7392b0acca8257dea216f96 gcc/tree-vect-loop.c ++799481f961907f33717a68493fea6818 gcc/tree-vect-patterns.c ++c2b28b1f389315c73c5ffce684eb42a1 gcc/tree-vect-slp.c ++6b5219bb5e6297fb4ca0981626118339 gcc/tree-vect-stmts.c + 7729076c55712e0bfb562f337107c400 gcc/tree-vectorizer.c + 99cdf0e00b25ff01da509c7f6bd7f8fd gcc/tree-vectorizer.h +-357a693e48ab9a122428746f6bbda9c9 gcc/tree-vrp.c +-41531148c5417dcde8dba9bf26c66867 gcc/tree.c ++519f725a2fcd44fc90e9a7b380b3f9ba gcc/tree-vrp.c ++f90241266bdebc4600cc5d1f2d672654 gcc/tree.c + 756c1546f4b1318f8d59106e5a786041 gcc/tree.def +-d3ec69521a1c446bbd5dc30b78fbea7c gcc/tree.h ++8f21fb5a83ef2833a239d86c64c6fe49 gcc/tree.h + 59d18b65bc8897bea70f8d136681423f gcc/treestruct.def + 7a21c960d344023b96194e4bc4625c10 gcc/tsan.c + 59b8e58a7954f6d352d923f0bbdd24ba gcc/tsan.h + 4fcf15c72e56a3360214b87bd3df82de gcc/tsystem.h + abc8eba4119c9cb0bc421df5afb01334 gcc/typeclass.h + 572fb9b575cab50b68cebce0e6aaab5b gcc/typed-splay-tree.h +-e32ea98c8ae093ac3b194bfcdff55030 gcc/ubsan.c ++c7235fe9fe050b768fe698d0edf40e4a gcc/ubsan.c + 81e340a3b45094070fa00910435108f6 gcc/ubsan.h + 7435de97b351df3a173bb3259cdfa730 gcc/valtrack.c + fd43fe3f222442739550a35e7bad2e4f gcc/valtrack.h +@@ -55610,7 +55914,7 @@ + 68395a53adb86132c753b865a97f49e5 libada/configure + dc03104644ef27c11606ab0f4f675f06 libada/configure.ac + 46d3fe6da7a771cc2d5420c4137a6861 libatomic/.gitignore +-a748d5a529fba14ffb71ba76af37f394 libatomic/ChangeLog ++c6d6b7a83aac18a7ec19f90d870b4223 libatomic/ChangeLog + f7e487a2a8e032a211ad21a5681e4b55 libatomic/Makefile.am + 685ebec1fe8aa94deb1729b48bb2fc6c libatomic/Makefile.in + f7853b06953072a9987a45a5b00782d6 libatomic/acinclude.m4 +@@ -55630,12 +55934,14 @@ + 3a5510d41511e835335114b73128a52e libatomic/config/posix/host-config.h + 2ef059ec5908eac5b9f19da9e90e4717 libatomic/config/posix/lock.c + d04f86e742ddfedb71fb4a3d0ceede39 libatomic/config/powerpc/host-config.h ++9bf3d2dd5ae558a4d9ab5b393b86c96b libatomic/config/rtems/host-config.h ++472ff64130ea77e3d5e080beacca1fa8 libatomic/config/rtems/lock.c + fc9523d1ea4e96a55adfb15c3031cf12 libatomic/config/x86/fenv.c + e87431bfab4d41697b1e7bfa18624f2f libatomic/config/x86/host-config.h + 5343c7f0d7449e34a4123a65183e280d libatomic/config/x86/init.c + 6c35813a8871f271868fb796ae4b6e4a libatomic/configure + db061ec219987557cec2ae3ea3c97870 libatomic/configure.ac +-05354b654eadd0af2e2aa91621996955 libatomic/configure.tgt ++0b2f1d581b06d5e45b083e9759ffeef0 libatomic/configure.tgt + bea3c296a69d67a89a6da22714ca34d4 libatomic/exch_n.c + b899afba4d403aec004c33141df2324d libatomic/fadd_n.c + ee6f02fad9bd551a906477f16740578f libatomic/fand_n.c +@@ -55692,7 +55998,7 @@ + 8a7308fda7ed1543cb9e3be0f8e47bce libatomic/testsuite/libatomic.c/atomic-store-5.c + 40618200985a15bcba64f871863da498 libatomic/testsuite/libatomic.c/c.exp + 97b0c9cdfcb733664bdf4efe0f5dc449 libatomic/testsuite/libatomic.c/generic-2.c +-5af0cf98353185e14ab202d5134d1a07 libbacktrace/ChangeLog ++6e3d18e0325321481dd8fc6b0c938244 libbacktrace/ChangeLog + eb3a88b53140eb234a99a4b3a55e56bf libbacktrace/ChangeLog.jit + adcff7cabf0971aed26d7fe5e3630a23 libbacktrace/Makefile.am + a4bbeef6b43604c1ca251b56c1bc4888 libbacktrace/Makefile.in +@@ -55708,7 +56014,7 @@ + ba93ae2239d2af1adfed22f2fa91164b libbacktrace/configure + f2bbca83f94ce0b40a14c2014386aa1e libbacktrace/configure.ac + 150cbd2ed23f310bcc41f347e524098e libbacktrace/dwarf.c +-cc7a845678c203d3820e434fd187feaa libbacktrace/elf.c ++210330106bbc3adbabf0934be8ff1b60 libbacktrace/elf.c + ccbfca5254d57415f02229b05852fe4c libbacktrace/fileline.c + 51926f4b28baf759f214371541616bd8 libbacktrace/filetype.awk + 4a1619d74095c0d90ed2047cfe801a8f libbacktrace/internal.h +@@ -55747,9 +56053,9 @@ + 7b5e3c71c404e08cbe1d3ca92449c0eb libcc1/plugin.cc + 595b9a542a8f80367ebbeecbc51b1ac7 libcc1/rpc.hh + 14f215429d450a743fce24b101552f3e libcc1/status.hh +-a90aa9053a5c89426bbbe4367988cf16 libcilkrts/ChangeLog +-4fa054d244a7b7a99d1173bc6c24ff2c libcilkrts/Makefile.am +-f837283c8a4f9034983ce5d009c42546 libcilkrts/Makefile.in ++45b9413325d303caf626b976ded66a4e libcilkrts/ChangeLog ++df0ff198f37089171b490f87912f9602 libcilkrts/Makefile.am ++71d9f8e3f82862af1e8d523b0ae6a587 libcilkrts/Makefile.in + 4a307b1474cad63768b2ae0c183b6259 libcilkrts/README + 6126c8d03f6c3cc1a2f5e502f3196cd7 libcilkrts/aclocal.m4 + 991e7c85d4800532c24900dc8e2f9e11 libcilkrts/configure +@@ -55883,50 +56189,29 @@ + 8b169f1ea64fbdcd4eb3b28cc2a20e5d libcpp/makeucnid.c + 13e85e048fd80372c5ee39c177ccda58 libcpp/mkdeps.c + 2037cc2be924ca9b3d6dcf813bb1f5a5 libcpp/pch.c +-7f8703b9dde7cc96a7b38b846eb0edda libcpp/po/ChangeLog +-16add93743f11e9d1d0205a04e4bda1b libcpp/po/be.gmo +-1559c0a42bd004e676cda54ca272f453 libcpp/po/be.po +-93772efdb39bca70542c9eb4cfd69115 libcpp/po/ca.gmo +-abc67e73d2df075360bb47d03f966a60 libcpp/po/ca.po ++e19317ae35b73c8ec3b221f66011547d libcpp/po/ChangeLog ++2ef89459bd607154106cddd9d5643379 libcpp/po/be.po ++a1a6f36f6fb1c4f5a648dcd391370e6c libcpp/po/ca.po + 2eaff30752e253bbc6a6f3147f29ae27 libcpp/po/cpplib.pot +-f4665bf2cfc8ea52a9c5dcd603b4c87d libcpp/po/da.gmo +-291ea628726a545a31faf6e603d06a2e libcpp/po/da.po +-183186721a93f35ebe5cb5efef452541 libcpp/po/de.gmo +-129478a9526671f9f1aeb11c29ee4417 libcpp/po/de.po +-50dcba779ef25b226362151a23815e88 libcpp/po/el.gmo +-904c98c8ea71a366440f9b040ba6fde8 libcpp/po/el.po +-8ecdc42ad242ed543e6024cc56a48ef5 libcpp/po/eo.gmo +-a7b5efb5f3491c3e787d25790c599713 libcpp/po/eo.po +-603c006aec9cb9504359e7f20c6dab7f libcpp/po/es.gmo +-d1b55d77237726db4bd7a3b1d30a0c6f libcpp/po/es.po +-0f532ddd0b5a92abe2c8620bdcf23d32 libcpp/po/fi.gmo +-fe350d53bed05a2b47fc8fff10fcaaaf libcpp/po/fi.po +-55e47fb744d48b8e20159311c0a4c0cb libcpp/po/fr.gmo +-58c29873a41dfefa30d2aff45818ae54 libcpp/po/fr.po +-39ddd555e334249c8130e512452c8fc3 libcpp/po/id.gmo +-48482d6240ce173ee2d785d5a2eaa743 libcpp/po/id.po +-37ed1f49679dbc578a78dc66a7ea3998 libcpp/po/ja.gmo +-36d7c68b0bd77115142ff130d0b0bfae libcpp/po/ja.po +-fd30c6f79433b2872abe0a2217fbd291 libcpp/po/nl.gmo +-3f6ebd19290c98eea7cef9914f9654d8 libcpp/po/nl.po +-94a998c3581a719af78c5cdf216fad18 libcpp/po/pt_BR.gmo +-0aaf233a0d7f79627ee398ea192bdd74 libcpp/po/pt_BR.po +-79b63b3694b5060a3b38fa8a8573db1f libcpp/po/ru.gmo +-17e810f41cd8152d067ee843834605b9 libcpp/po/ru.po +-0d50dac9aff5591b5c493123801f5915 libcpp/po/sr.gmo +-456bf096ac10652d86537242aeb463c3 libcpp/po/sr.po +-3270d407f458f07423f181ee4a40fb53 libcpp/po/sv.gmo +-6f366f83d29717cdb9e64cbf89997abf libcpp/po/sv.po +-a3a472f46bd1cd7bf3c58618f21cc54e libcpp/po/tr.gmo +-1972ca01f7590354477a7256df8a6db7 libcpp/po/tr.po +-95e35a0dd2e18bc3ef2c510f396b0fcd libcpp/po/uk.gmo +-f4e29e663311363944e207217605faa1 libcpp/po/uk.po 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++474e69915194f83eb88ad85ae241016c libcpp/po/sv.po ++1d16e54e582bc5236bed93a33fb6baa5 libcpp/po/tr.po ++c0676321d8fd8f22839d400145a59e55 libcpp/po/uk.po ++097c8a713da9fbb048eca497169f9e93 libcpp/po/vi.po ++52fade796713669a418cd39a18e2c750 libcpp/po/zh_CN.po ++10138794552573c15bfc3be6c6e35235 libcpp/po/zh_TW.po + f4fb93166f911a7496d4dd7cd1e57f8c libcpp/symtab.c + 1b0ca94d69c0fcdb8b4a544998579e84 libcpp/system.h + 5faa90d66b891533b7d68fa1dcc88bf8 libcpp/traditional.c +@@ -55996,7 +56281,7 @@ + 1b8d5bd512629f5b4d1895fe4dd2c645 libdecnumber/dpd/decimal64.c + 33e09faa8cbe6117509446874a776fc6 libdecnumber/dpd/decimal64.h + 0f6db29710e7075c2fd62bc4478b3b8d libdecnumber/dpd/decimal64Symbols.h +-a3e0d6f60a337a91aecc3dc56e0acda6 libffi/ChangeLog ++bf52041046c368175a62277d781b7dc7 libffi/ChangeLog + ba66fc19311348d373ec271be939a659 libffi/ChangeLog.libffi + fbbc216bc25d759a72ea3e6d734af56b libffi/ChangeLog.libgcj + d946d2b97454ad50a1dbfbf48923c5be libffi/ChangeLog.v1 +@@ -56009,7 +56294,6 @@ + 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+-9e8815d844b257ea8d78b6c8120512b2 libjava/classpath/doc/gserialver.1 +-f2565826380e1f2dffe56404bb279a41 libjava/classpath/doc/gtnameserv.1 + f7edd2bbe78e9a7e7aa706fbfa6f467e libjava/classpath/doc/texi2pod.pl + 01b23c87dcf82048a5958c8224653305 libjava/classpath/doc/texinfo.tex + b1e0c0c30547d57d7a09b04d47c70b06 libjava/classpath/examples/.cvsignore +@@ -85323,7 +85609,7 @@ + 4eaec6ec74d70ecea0976f23533030a8 libjava/testsuite/Makefile.am + fb42187d8e0bcb05191ae145e2ad631c libjava/testsuite/Makefile.in + dce80ba7e038ca18591aabc6d3d2582c libjava/testsuite/config/default.exp +-046515428f7068fa92b4af50db67e94f libjava/testsuite/lib/libjava.exp ++12cddc134208161f95fe25d2b6ce9eed libjava/testsuite/lib/libjava.exp + 5bc5f3c2b92712d89b8fa8d99293ad20 libjava/testsuite/libjava.cni/PR9577.h + 783e9ef77859cbe3613da93348196aa4 libjava/testsuite/libjava.cni/PR9577.jar + 1cb376d608ce588877129087d302ad27 libjava/testsuite/libjava.cni/PR9577.java +@@ -86189,7 +86475,7 @@ + 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bf09ede5c6d78e3d132bde0f933590d8 libquadmath/config.h.in + e2528fdd401f4aa4949acf6b7472c6e5 libquadmath/configure + 29e66c9d2ef7b7621276c63bee20d622 libquadmath/configure.ac +-598ff623da7a336b4221c56150947711 libquadmath/libquadmath.info + c4e13f3169f2de58d737acfdba76647b libquadmath/libquadmath.texi + 77280bb7ee423875e03d9c0d34527df6 libquadmath/libtool-version + f44065462735b4699d44588271a5f09a libquadmath/math/acoshq.c +@@ -86503,7 +86788,7 @@ + a81cc82679e80c86cfbd5575867450d0 libquadmath/strtod/strtod_l.c + da808e110fc09ebd41ebd405790a70df libquadmath/strtod/strtoflt128.c + d15a18f7c46ba2add6148edc5b7563c0 libquadmath/strtod/tens_in_limb.c +-0448d915a72917daa48bf8ca1e9263a8 libsanitizer/ChangeLog ++7fe19e70f12e02776cbac41f1a7ee6d8 libsanitizer/ChangeLog + be9b1514f2ae0907d5459acd6331993d libsanitizer/HOWTO_MERGE + 0249c37748936faf5b1efd5789587909 libsanitizer/LICENSE.TXT + e9eb4a77cb6d1457005493aeef54478e libsanitizer/MERGE +@@ -86534,7 +86819,7 @@ + de5adde40dad853f62e7f6f02fb39c63 libsanitizer/asan/asan_linux.cc + 68b329da9893e34099c7d8ad5cb9c940 libsanitizer/asan/asan_lock.h + 6e3e514ee98224b3d35eedd20f31dc69 libsanitizer/asan/asan_mac.cc +-6fb2bb576d0db871840b266caacf5b4c libsanitizer/asan/asan_malloc_linux.cc ++7f4eda2466f1bea4ffea043b3ad74fb1 libsanitizer/asan/asan_malloc_linux.cc + fe8e70d61f125f2574ee3f7cabb27f2b libsanitizer/asan/asan_malloc_mac.cc + a0ee9f2d00416a8d00d5ac0a4f3758d7 libsanitizer/asan/asan_malloc_win.cc + 0e28518acb95e6eafea10c5aaa44562a libsanitizer/asan/asan_mapping.h +@@ -86822,7 +87107,7 @@ + e9ab923d2562bf5f5be6883dfb9f0184 libssp/strncpy-chk.c + 5e0d8b8a766c31b12354baec1b7a159c libssp/vsnprintf-chk.c + f56ab1f8922a16f7e9e4f5270ae1e34e libssp/vsprintf-chk.c +-f1d092ccae45492fea4540383deb77bc libstdc++-v3/ChangeLog ++71074b77ce0c343a8adaf3aff273b763 libstdc++-v3/ChangeLog + 7aa6c40440a44fcf5ec94c066160c2f8 libstdc++-v3/ChangeLog-1998 + 7aff86600b6a1ed3fa87305075a92db0 libstdc++-v3/ChangeLog-1999 + a6f28e8fc9bb07696a9e068b439a3a87 libstdc++-v3/ChangeLog-2000 +@@ -87499,7 +87784,7 @@ + 4a4591228c96b08e8cfafd659ca4e914 libstdc++-v3/include/bits/boost_concept_check.h + 6c698861fbe30dd645b02cc9332c3cc9 libstdc++-v3/include/bits/c++0x_warning.h + 156583d00adec3e9c84f8cd3ab85473d libstdc++-v3/include/bits/c++14_warning.h +-8ab4f9b79a29c20a2247731d46677e7d libstdc++-v3/include/bits/c++config ++3391eba3a0b35521e3a211d2f69ddc63 libstdc++-v3/include/bits/c++config + 56792010974749b8b8d1f8f4a87bdff7 libstdc++-v3/include/bits/char_traits.h + d4c48cb0855253bba8b25e24a6717ac1 libstdc++-v3/include/bits/codecvt.h + 8c6f43ad3e5d5237110200d354580da1 libstdc++-v3/include/bits/concept_check.h +@@ -87559,8 +87844,8 @@ + 81a9105e594bdd4f31466efb0ea2591c libstdc++-v3/include/bits/specfun.h + a046bed66696adfb2a6c4a593d6a1e3d libstdc++-v3/include/bits/sstream.tcc + dca1017544bda4f3e231a60f4bfb96aa libstdc++-v3/include/bits/std_mutex.h +-ccd3933342ad7b6b8f8eb265794edd01 libstdc++-v3/include/bits/stl_algo.h +-68a5fbc2687db7264a5ec538cab5ef20 libstdc++-v3/include/bits/stl_algobase.h ++11add78efd9f165a0d9767f4ef18f5e4 libstdc++-v3/include/bits/stl_algo.h ++23ea4a3aeea06844a671d0edb8f31227 libstdc++-v3/include/bits/stl_algobase.h + 243fe3e2f3c79e871cf74b93be35026e libstdc++-v3/include/bits/stl_bvector.h + 5ca41a37aa22865a2e5acf8a62c8f437 libstdc++-v3/include/bits/stl_construct.h + 8fd1c24a11e47aa7313171f7d4fe3b0f libstdc++-v3/include/bits/stl_deque.h +@@ -87723,11 +88008,11 @@ + 23e7049f7e8b7983c52206aab9113937 libstdc++-v3/include/decimal/decimal + 71e2a65287f65ee51824acf28e1d9f7a libstdc++-v3/include/decimal/decimal.h + 5ad6f3f20409d7de29835de97387918e libstdc++-v3/include/experimental/algorithm +-e65a44cf13272360ff0478fcc8ee5a57 libstdc++-v3/include/experimental/any ++c64f903aa7f538c08886fe5dc1582f0a libstdc++-v3/include/experimental/any + 89b45a19b6cf153e676d40cf2f37aaf7 libstdc++-v3/include/experimental/array + 29b77f84375c4242993cfe208f650912 libstdc++-v3/include/experimental/bits/erase_if.h +-f9f6312c24ee02dc5cd916d50da8fb83 libstdc++-v3/include/experimental/bits/fs_dir.h +-4c72ea9fbedf180024c0cf4dd5fe4e1b libstdc++-v3/include/experimental/bits/fs_fwd.h ++122d1256bd80e98d1c61240bbfaf59f1 libstdc++-v3/include/experimental/bits/fs_dir.h ++e1c40a546f26acefc0463b336869af95 libstdc++-v3/include/experimental/bits/fs_fwd.h + 158630c37ddb30cc20d99ff56ac65063 libstdc++-v3/include/experimental/bits/fs_ops.h + eed4217b2f9fe20ca72578b391c7a2d2 libstdc++-v3/include/experimental/bits/fs_path.h + 34de3fdf15beca4475dd988e0184df6f libstdc++-v3/include/experimental/bits/shared_ptr.h +@@ -87736,14 +88021,14 @@ + 6826964fdd0c501df4e92c523e2862f1 libstdc++-v3/include/experimental/deque + f88ee31c92f92057c2fd3ac31e24d93e libstdc++-v3/include/experimental/filesystem + 2bff8bbef91fcc1b5d11d98bf5905df8 libstdc++-v3/include/experimental/forward_list +-4264211c5282d287ebadc45d97d4de45 libstdc++-v3/include/experimental/functional ++e59810aa4afce25362a948f28b60b9de libstdc++-v3/include/experimental/functional + 6c5f935e4fff3629ee30c039f4c55bb6 libstdc++-v3/include/experimental/iterator + cfe5bab2e8a6e1cfbfba279ecd095b9b libstdc++-v3/include/experimental/list + 5ea3575f34c060bd14c6163b5c02910d libstdc++-v3/include/experimental/map + 9f2ff72def8b2ccefde5f79da53d689c libstdc++-v3/include/experimental/memory + 0ea55299535b43a37b77451c2a04adb4 libstdc++-v3/include/experimental/memory_resource + b0a72f080296c31dcf5665d20d230540 libstdc++-v3/include/experimental/numeric +-e625ff0e60fda3fc4623907cbba234be libstdc++-v3/include/experimental/optional ++b0e91dbbf7e68aa5f99049900d816b46 libstdc++-v3/include/experimental/optional + 7283a9f678ec265aa97152d6dca56bea libstdc++-v3/include/experimental/propagate_const + dbf6b0596c17e1fe3bb7c3646ab1fbfa libstdc++-v3/include/experimental/random + 1e0349a2dbba50ce5eaf18062017033e libstdc++-v3/include/experimental/ratio +@@ -88047,12 +88332,12 @@ + 08ed130b911c8861f17b625300af7808 libstdc++-v3/include/parallel/algobase.h + c3b97fba09aac2b83819d8dcd1517672 libstdc++-v3/include/parallel/algorithm + 0e840c628f0736ab041408bcada33951 libstdc++-v3/include/parallel/algorithmfwd.h +-59c030b3f0ec2df5766b985d1bd49305 libstdc++-v3/include/parallel/balanced_quicksort.h ++255353a08bb95bf6328d3e2b85d90de0 libstdc++-v3/include/parallel/balanced_quicksort.h + 581bdc62656985390da46c99509e6d12 libstdc++-v3/include/parallel/base.h + 088195ce733ee584f5b8a0b095d0cda8 libstdc++-v3/include/parallel/basic_iterator.h + 233e2ab9c418055cb6565f1be8665f71 libstdc++-v3/include/parallel/checkers.h + fff9a8759ef5329e1b198ecd68df5d87 libstdc++-v3/include/parallel/compatibility.h +-8550b5411dea9e7a7d09dc2e2286c025 libstdc++-v3/include/parallel/compiletime_settings.h ++a429f2c927389fab5d0c8b3c06a21616 libstdc++-v3/include/parallel/compiletime_settings.h + 31cb4710e1cbb06626f80fad6dba2f86 libstdc++-v3/include/parallel/equally_split.h + d790719d808ca3e1f934654ba35f4c23 libstdc++-v3/include/parallel/features.h + 8a450ac00797e5880593bd1798d33c89 libstdc++-v3/include/parallel/find.h +@@ -88162,7 +88447,7 @@ + 4b6625c7cbce87a5b4a6e79c315b0f1d libstdc++-v3/include/std/string + 56ecd8ef9e669ad9046f93b40c6adeb0 libstdc++-v3/include/std/system_error + 3c38cff34b5471d6ef6b8f5ebd334363 libstdc++-v3/include/std/thread +-a20360f1d00c525b1c3a82a850399bbb libstdc++-v3/include/std/tuple ++69c9fe68e28b9c6a300b100398e4eff3 libstdc++-v3/include/std/tuple + 8dfc4dc705dbfdceed5a96a1d17dcb31 libstdc++-v3/include/std/type_traits + 66c41d38d5277a5c6662a5c974f65fc4 libstdc++-v3/include/std/typeindex + b23b42f90aab11eae50546959be31645 libstdc++-v3/include/std/unordered_map +@@ -88339,7 +88624,7 @@ + 30665c8b6d46064d472972b057ac96cb libstdc++-v3/src/c++11/Makefile.am + a71513788b148a7ade2ec04c6070aa8e libstdc++-v3/src/c++11/Makefile.in + 4fdcbea8f299a029c4f5ea8d59f630c6 libstdc++-v3/src/c++11/chrono.cc +-e577d458447700de0808ac76b14c07ec libstdc++-v3/src/c++11/codecvt.cc ++28ba9ca2926c19035cb646b2329710f4 libstdc++-v3/src/c++11/codecvt.cc + 8bfae905b9eab9ab26ee92eb3978ab4a libstdc++-v3/src/c++11/compatibility-atomic-c++0x.cc + 5d0b8ad9f6d2ee8e8040a8b666bf9e40 libstdc++-v3/src/c++11/compatibility-c++0x.cc + 4c716fd1981b6de7c33c9ee168aaa28d libstdc++-v3/src/c++11/compatibility-chrono.cc +@@ -88350,7 +88635,7 @@ + 98214d46bbe793351796b07e0a42a42d libstdc++-v3/src/c++11/cow-locale_init.cc + 8b1fca2685592e27c6e2512aab409c53 libstdc++-v3/src/c++11/cow-shim_facets.cc + a1e95554d798e75aaf108cf99555acbe libstdc++-v3/src/c++11/cow-sstream-inst.cc +-d24f762e5c1518d3d881dec110cd3015 libstdc++-v3/src/c++11/cow-stdexcept.cc ++11f38398949bd792c8cf299bb71de812 libstdc++-v3/src/c++11/cow-stdexcept.cc + f24a3851a742dd9c9e641146183b51a8 libstdc++-v3/src/c++11/cow-string-inst.cc + 2fc29df6c120b834cdf25d9a94bb04be libstdc++-v3/src/c++11/cow-wstring-inst.cc + a85f17026568d8b29a5918c5fdb0de37 libstdc++-v3/src/c++11/ctype.cc +@@ -88437,7 +88722,7 @@ + a55f615eaeda6a459dd7afb072d7b189 libstdc++-v3/src/filesystem/cow-ops.cc + 69cc034ef75e4e41c856abb14ff6a9c6 libstdc++-v3/src/filesystem/cow-path.cc + d65d2e058df05915cedab245e7b83ebb libstdc++-v3/src/filesystem/dir.cc +-4bd5a2c20b1ea1acbeadb448465d6e91 libstdc++-v3/src/filesystem/ops.cc ++ae63ac87d47a4928b951406c3e823ce4 libstdc++-v3/src/filesystem/ops.cc + 565e7324068b67ac6d423123a8796c82 libstdc++-v3/src/filesystem/path.cc + 588e1f8e679966c86b3269c806c1baaa libstdc++-v3/src/shared/hashtable-aux.cc + fd840c906f4a0cf5df5cd7bc96c757e5 libstdc++-v3/testsuite/17_intro/freestanding.cc +@@ -89315,6 +89600,7 @@ + f2c34e193c19314affc8a00a6a445a92 libstdc++-v3/testsuite/20_util/tuple/cons/constexpr-3.cc + a9cd6398ea857a03537f88c7e23f4b60 libstdc++-v3/testsuite/20_util/tuple/cons/constructor.cc + 0aabd51cea226df6c82b765ef09c9441 libstdc++-v3/testsuite/20_util/tuple/cons/converting.cc ++26bb13fcf5c5e3ab980dfe85b16b7496 libstdc++-v3/testsuite/20_util/tuple/cons/element_accepts_anything_byval.cc + 7e5c8d7e9d12164bb1347a124ace6a37 libstdc++-v3/testsuite/20_util/tuple/cons/explicit_construct.cc + 080671dc61cd5a1adb690c82272a7aa5 libstdc++-v3/testsuite/20_util/tuple/cons/nested_tuple_construct.cc + 441b45a224b065aa135d3ec04bd9a4b2 libstdc++-v3/testsuite/20_util/tuple/cons/noexcept_move_construct.cc +@@ -89660,8 +89946,9 @@ + c97f26a8973c209ae0f7d360ad9f2fcc libstdc++-v3/testsuite/22_locale/codecvt/char32_t.cc + c5071e3bdcb84c6edc7d311f74de1d4a libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf16/66417.cc + a9d0a70ac98a0b17d2d1cc8c848a8efc libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf16/requirements/1.cc ++d1ed67ee033e3f14a4e84f4874b7f324 libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf8/69703.cc + ff59d91f6f27e3904a6f0c4e0fc63592 libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf8/requirements/1.cc +-69fc313af596ee07d279da2f57847abc libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf8_utf16/66855.cc ++a6f9396f0c42a4c6d1d6de7ae30882e3 libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf8_utf16/66855.cc + 50aec117b3903134dc297553a6e7d171 libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf8_utf16/requirements/1.cc + fb446a5424dced8689e50d049d902d15 libstdc++-v3/testsuite/22_locale/codecvt/encoding/char/1.cc + fb4c80aa2f3965e8a807cf632dd40511 libstdc++-v3/testsuite/22_locale/codecvt/encoding/char/wrapped_env.cc +@@ -91461,6 +91748,7 @@ + 7a12e960fa6c1e202b05b2045bf30243 libstdc++-v3/testsuite/25_algorithms/binary_search/1.cc + fa283b2c4d3165d0550387d9bea029e9 libstdc++-v3/testsuite/25_algorithms/binary_search/2.cc + 39f41d4b1f8549c8788b2a85a1c1a063 libstdc++-v3/testsuite/25_algorithms/binary_search/check_type.cc ++dbcdd5ed11c3e7f7c6993f08d03a384a libstdc++-v3/testsuite/25_algorithms/binary_search/partitioned.cc + b9a614d8754b69aacd56a041d87d4f4c libstdc++-v3/testsuite/25_algorithms/binary_search/requirements/explicit_instantiation/2.cc + 00923b3f1fe62755ccaea3e61a14e149 libstdc++-v3/testsuite/25_algorithms/binary_search/requirements/explicit_instantiation/pod.cc + ee54ed262f118b0a86e1ba3198a8bbbb libstdc++-v3/testsuite/25_algorithms/copy/1.cc +@@ -91517,6 +91805,7 @@ + 471256a571753ee1e1eee18449dc96b8 libstdc++-v3/testsuite/25_algorithms/equal_range/1.cc + 911a0936f661b747ba8f0a5329a6dadd libstdc++-v3/testsuite/25_algorithms/equal_range/2.cc + 111dc42bd57e81f298f0d17a0f4e7c91 libstdc++-v3/testsuite/25_algorithms/equal_range/check_type.cc ++e5252e8afeb3f5de27ed99de48b74b8b libstdc++-v3/testsuite/25_algorithms/equal_range/partitioned.cc + fe50e7ee7caeb1e75440d7f7b268af24 libstdc++-v3/testsuite/25_algorithms/equal_range/requirements/explicit_instantiation/2.cc + 5e6967d287d4c6526375184ee5831157 libstdc++-v3/testsuite/25_algorithms/equal_range/requirements/explicit_instantiation/pod.cc + 1ff6701c1f7885f5cf7ae178fa6e3a30 libstdc++-v3/testsuite/25_algorithms/fill/1.cc +@@ -91620,6 +91909,7 @@ + 3fce4489cef94bc78fa0b2cfe622659f libstdc++-v3/testsuite/25_algorithms/iter_swap/requirements/explicit_instantiation/2.cc + 563704df11793a2cb3925520a0584712 libstdc++-v3/testsuite/25_algorithms/iter_swap/requirements/explicit_instantiation/pod.cc + 4c615f82254ba19627efd93190dc8741 libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/1.cc ++981466c0627cc5b1a3a290dde5c624ea libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/71545.cc + 6b2d034347a8395f85b112da5151e1eb libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/check_type.cc + ebb6313449d28677e1a105baa61eb93f libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/debug/irreflexive_neg.cc + 3468195c2351971106ecfec5637ae780 libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/requirements/explicit_instantiation/2.cc +@@ -91630,6 +91920,7 @@ + f3bcfbb7cff9aba454e55e19bcf2baf8 libstdc++-v3/testsuite/25_algorithms/lower_bound/check_type.cc + 20a0ac6a9a8d6fefcde91c6b9e41e0c6 libstdc++-v3/testsuite/25_algorithms/lower_bound/debug/irreflexive.cc + 63320e25fd7aa7498b9e83cc5cd18506 libstdc++-v3/testsuite/25_algorithms/lower_bound/no_operator_ne.cc ++7539641d39861d52133a38d930f614e5 libstdc++-v3/testsuite/25_algorithms/lower_bound/partitioned.cc + b081808f9153f80a70b6a6a0bcb10b0a libstdc++-v3/testsuite/25_algorithms/lower_bound/requirements/explicit_instantiation/2.cc + 324cb134faf27bc3b70cead47184663a libstdc++-v3/testsuite/25_algorithms/lower_bound/requirements/explicit_instantiation/pod.cc + 4152775a73ca52f1f39a0843d3711e9c libstdc++-v3/testsuite/25_algorithms/make_heap/complexity.cc +@@ -91897,6 +92188,7 @@ + fcff315b520a5c220c95b06bf0afc3d7 libstdc++-v3/testsuite/25_algorithms/upper_bound/2.cc + 5799c9c188ff54c06a37c2b1684c3829 libstdc++-v3/testsuite/25_algorithms/upper_bound/33613.cc + 2367e61d5039679b915978b0831e9557 libstdc++-v3/testsuite/25_algorithms/upper_bound/check_type.cc ++a2a39374248d3f8330f33262bf983424 libstdc++-v3/testsuite/25_algorithms/upper_bound/partitioned.cc + 1bde07efc71b4272f874aa9b60b1c41a libstdc++-v3/testsuite/25_algorithms/upper_bound/requirements/explicit_instantiation/2.cc + 831507ab22c2dd811af9549c9b05042a libstdc++-v3/testsuite/25_algorithms/upper_bound/requirements/explicit_instantiation/pod.cc + 2ccc854d45ba39bdccef1dd6b95a2767 libstdc++-v3/testsuite/26_numerics/accumulate/1.cc +@@ -93837,8 +94129,8 @@ + 4d143ca68b2fc8e2f44162f96937b954 libstdc++-v3/testsuite/experimental/any/cons/2.cc + bcb1af3db3b58578f36d9fc7692922cf libstdc++-v3/testsuite/experimental/any/cons/aligned.cc + 48399811d2d329c756e82d87ef698e93 libstdc++-v3/testsuite/experimental/any/cons/nontrivial.cc +-88fff9f76f2cb12f04ec3c220bd1bdf6 libstdc++-v3/testsuite/experimental/any/misc/any_cast.cc +-b4f7ba6bd9238f17d0e8c4fd7018dbeb libstdc++-v3/testsuite/experimental/any/misc/any_cast_neg.cc ++f202bdedc914a2ba5e8700ca4b541d88 libstdc++-v3/testsuite/experimental/any/misc/any_cast.cc ++d6699928a0c4ff31a16b82901e0135d9 libstdc++-v3/testsuite/experimental/any/misc/any_cast_neg.cc + ede8bc6c2abc8e8e88dd015c19f35bc9 libstdc++-v3/testsuite/experimental/any/misc/any_cast_no_rtti.cc + 4c83567229f17dfc9aeee2ceada69bc7 libstdc++-v3/testsuite/experimental/any/misc/swap.cc + 89d8fbc9a4c2072fb0d49f46675f92e7 libstdc++-v3/testsuite/experimental/any/modifiers/1.cc +@@ -93850,15 +94142,18 @@ + a6bed3df705f73fb6770e7e17600b531 libstdc++-v3/testsuite/experimental/deque/erasure.cc + 1c10a535f04c73dcb2dcf34a55e5f892 libstdc++-v3/testsuite/experimental/feat-cxx14.cc + f1868e7d6427fc60964c1a38200d329f libstdc++-v3/testsuite/experimental/feat-lib-fund.cc +-90f90e5d1004c083226bf7207a8b18f1 libstdc++-v3/testsuite/experimental/filesystem/iterators/directory_iterator.cc +-a7fea621d015988d3fa1fc76e86eedd9 libstdc++-v3/testsuite/experimental/filesystem/iterators/recursive_directory_iterator.cc ++e9dc54abe60b8b705c14ac3d74636838 libstdc++-v3/testsuite/experimental/filesystem/iterators/directory_iterator.cc ++af9d47d33b74004315b691b6346b9d86 libstdc++-v3/testsuite/experimental/filesystem/iterators/recursive_directory_iterator.cc + 6659047a437b84cfb9f2391f87429043 libstdc++-v3/testsuite/experimental/filesystem/operations/absolute.cc +-e9ab5236864aff79b6568b648c388648 libstdc++-v3/testsuite/experimental/filesystem/operations/canonical.cc +-3ba41914e00797409515d4219a56de5a libstdc++-v3/testsuite/experimental/filesystem/operations/copy.cc +-17841b5e8220264cf46deb635f6e3d3b libstdc++-v3/testsuite/experimental/filesystem/operations/create_directories.cc ++cb96d4f460d63079de67211a5fa98add libstdc++-v3/testsuite/experimental/filesystem/operations/canonical.cc ++0cf2c31ebc01188c0a36787d294b6c6b libstdc++-v3/testsuite/experimental/filesystem/operations/copy.cc ++43478894c9ffeeff98b3c58779cdd278 libstdc++-v3/testsuite/experimental/filesystem/operations/copy_file.cc ++5b67c7238f734df125c006ea8e224a86 libstdc++-v3/testsuite/experimental/filesystem/operations/create_directories.cc ++25adc7117e80c1cd1e18b1cde11f4c1e libstdc++-v3/testsuite/experimental/filesystem/operations/create_directory.cc + c5446130c200098a30ef1dc1a283b2b9 libstdc++-v3/testsuite/experimental/filesystem/operations/current_path.cc + 7340da71f52f79524efcb005b8a0dfbf libstdc++-v3/testsuite/experimental/filesystem/operations/exists.cc + 543f1f3a74e4731a28b2350f36b57987 libstdc++-v3/testsuite/experimental/filesystem/operations/file_size.cc ++a5fe820ebc0fc04c2078c67418d5e236 libstdc++-v3/testsuite/experimental/filesystem/operations/permissions.cc + 6c082c2b9134f256176dbd1ced18ec29 libstdc++-v3/testsuite/experimental/filesystem/operations/status.cc + 1d8c4e2df6535130a0759320e07efee6 libstdc++-v3/testsuite/experimental/filesystem/operations/temp_directory_path.cc + 6572ad4bfd145d4c0c079938a286897c libstdc++-v3/testsuite/experimental/filesystem/path/append/path.cc +@@ -93889,6 +94184,7 @@ + 5df8e09e624d87e17a044d9858058c9e libstdc++-v3/testsuite/experimental/filesystem/path/modifiers/replace_extension.cc + e2817cfd26742b69b8b7b73f942ccde9 libstdc++-v3/testsuite/experimental/filesystem/path/modifiers/replace_filename.cc + d4e9d71c8fd2b42db51b8797aebca13f libstdc++-v3/testsuite/experimental/filesystem/path/modifiers/swap.cc ++2321736afe6f050de2a69492d9bd096c libstdc++-v3/testsuite/experimental/filesystem/path/native/string.cc + 45a57bfce67b5460ea4ad3626a5133b5 libstdc++-v3/testsuite/experimental/filesystem/path/nonmember/hash_value.cc + 3e4cb85aec4dd2457d9b4efcbb7e8c0a libstdc++-v3/testsuite/experimental/filesystem/path/query/empty.cc + 71662b7f8ba3c6eb3dd94d008fe8ce02 libstdc++-v3/testsuite/experimental/filesystem/path/query/has_extension.cc +@@ -93902,7 +94198,7 @@ + b427c42986c003d6253ad475d252580b libstdc++-v3/testsuite/experimental/filesystem/path/query/is_relative.cc + f670b614d1cc3d7d0ad24712e408b00d libstdc++-v3/testsuite/experimental/forward_list/erasure.cc + bbbce96b885b0a3e2fff3467f74603b3 libstdc++-v3/testsuite/experimental/functional/not_fn.cc +-8b60f23ac93b783a0235699abcca08e4 libstdc++-v3/testsuite/experimental/functional/searchers.cc ++854913f12196247a55853dd04d8eee4d libstdc++-v3/testsuite/experimental/functional/searchers.cc + 043c6e8e4f78804111ba475b4b36f43a libstdc++-v3/testsuite/experimental/functional/value.cc + b8a37dc3290caea1a96660d87ea5a9a3 libstdc++-v3/testsuite/experimental/iterator/make_ostream_joiner.cc + 1c550ab3838807146948e05c220dd3c2 libstdc++-v3/testsuite/experimental/iterator/ostream_joiner.cc +@@ -93947,7 +94243,8 @@ + 5cafc7a64c3fd8161ec5647978b89f4a libstdc++-v3/testsuite/experimental/optional/cons/copy.cc + ad6988975eb0537cef61d8ca1a71f663 libstdc++-v3/testsuite/experimental/optional/cons/default.cc + f4226d3e8ed1ba519c69491709698d38 libstdc++-v3/testsuite/experimental/optional/cons/move.cc +-66f5ea892439f3d2ff2ef9f386ac41cd libstdc++-v3/testsuite/experimental/optional/cons/value.cc ++cd8840b7866b44b7ceed99d196c79446 libstdc++-v3/testsuite/experimental/optional/cons/value.cc ++bfdb103f8e1eff6b08a67e1e20910b8a libstdc++-v3/testsuite/experimental/optional/cons/value_neg.cc + 8ff6b45a9b1050aed7e2229378bea517 libstdc++-v3/testsuite/experimental/optional/constexpr/cons/default.cc + 64cafc604813d41180b02bbdb5175243 libstdc++-v3/testsuite/experimental/optional/constexpr/cons/value.cc + 87ed87ffad80d6207261ad9e9ccd90ec libstdc++-v3/testsuite/experimental/optional/constexpr/in_place.cc +@@ -95306,12 +95603,12 @@ + 23fd997da513a65fe1471c19a226fc52 libstdc++-v3/testsuite/util/testsuite_containers.h + 04a32a019d1586ab2217d06583f33404 libstdc++-v3/testsuite/util/testsuite_counter_type.h + 0dc60b6ac596bc87a4e7a40aa06f58e9 libstdc++-v3/testsuite/util/testsuite_error.h +-e09bbb8df91a8ee7256775a6d4d4d163 libstdc++-v3/testsuite/util/testsuite_fs.h ++8e55222cc23d00baba3a214230f59761 libstdc++-v3/testsuite/util/testsuite_fs.h + ff826c1dd2ee6a0fe894da2321232547 libstdc++-v3/testsuite/util/testsuite_greedy_ops.h + c2aa93a55fce4b410f3963907115507e libstdc++-v3/testsuite/util/testsuite_hooks.cc + a837c7d31a1866b0a6125d854aeeb3ba libstdc++-v3/testsuite/util/testsuite_hooks.h + 03ef0d72a4d44308b72f20d48a98490f libstdc++-v3/testsuite/util/testsuite_io.h +-426181cd245715e20a7e2d0a664f1875 libstdc++-v3/testsuite/util/testsuite_iterators.h ++014a5d7501d7109088bf371b70c55f19 libstdc++-v3/testsuite/util/testsuite_iterators.h + 915de1d2f670ce7f4b76542e99a70c50 libstdc++-v3/testsuite/util/testsuite_new_operators.h + d8cb74dfe347cc7d377fbd19b3efb585 libstdc++-v3/testsuite/util/testsuite_performance.h + 78117be975dcbe3823aa930cfbce08c0 libstdc++-v3/testsuite/util/testsuite_random.h +@@ -95323,9 +95620,9 @@ + 204ec69a032d5a889dacc11cf18fa4ed libstdc++-v3/testsuite/util/thread/all.h + b950d655469c477755252b1e18009596 libtool-ldflags + 7a2b83d2d625a4022b9213ceb75f5897 libtool.m4 +-d2a523d344604dd6a3e8e1f7bfb1c2b4 libvtv/ChangeLog +-8cf2d09520df1da87dce0b192c1af79a libvtv/Makefile.am +-31c82474804ec75aab274ed98b4e6b51 libvtv/Makefile.in ++780474b8d3fa8c8117ccfd8281527085 libvtv/ChangeLog ++580d40bdd6efd6663aa0d78101a2ef1a libvtv/Makefile.am ++c9973f89d6d559403509edf0c5aa127f libvtv/Makefile.in + 4ce86f8604e6c86211a4cb2025ffc53e libvtv/acinclude.m4 + 1fadd2a7f8c12da8f434cd33e68d271e libvtv/aclocal.m4 + 754a4cbfde648aca416470cd6c95e4d8 libvtv/configure +@@ -95419,11 +95716,11 @@ + bc2f6032c98896249eadb56177c7d357 ltsugar.m4 + c30cd33c496505f13d9fbdb6970c7c33 ltversion.m4 + 293853a13b7e218e3a4342cf85fbbf25 lt~obsolete.m4 +-b53da0da0c103a537dcf0ca69e0f0ef3 maintainer-scripts/ChangeLog ++b2ed68474b6ccc5f6ea1349c114e9064 maintainer-scripts/ChangeLog + 33c7bc2d2c55956dfac85a05d8a80eff maintainer-scripts/README + d0d4b92a5ba9606c481075c7bf65469a maintainer-scripts/crontab + 91544f3a251dde1c76b2b9a58aee73a9 maintainer-scripts/gcc_release +-d87b258ea691681aca69f5c94d2f7cca maintainer-scripts/generate_libstdcxx_web_docs ++4b1217d62242596f1d1b439c25dce68f maintainer-scripts/generate_libstdcxx_web_docs + 33d97164a8610c7abf67eff7d28f47ff maintainer-scripts/maintainer-addresses + fd2c02d88bca262690f0cbbfaeab16e1 maintainer-scripts/update_version_svn + c8dfca01bf19508e40afff1dcd255211 maintainer-scripts/update_web_docs_libstdcxx_svn +Only in gcc-6.1.0: NEWS +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/fixincludes/ChangeLog gcc-6-20160721/fixincludes/ChangeLog +--- gcc-6.1.0/fixincludes/ChangeLog 2016-04-27 08:20:21.000000000 +0000 ++++ gcc-6-20160721/fixincludes/ChangeLog 2016-06-15 14:32:35.000000000 +0000 +@@ -1,3 +1,18 @@ ++2016-06-15 David Edelsohn ++ ++ Backport from mainline ++ 2016-06-13 David Edelsohn ++ ++ * inclhack.def (aix_stdlib_malloc): New fix. ++ (aix_stdlib_realloc): New fix. ++ (aix_stdlib_calloc): New fix. ++ (aix_stdlib_valloc): New fix. ++ * fixincl.x: Regenerate. ++ * tests/base/stdlib.h [AIX_STDLIB_MALLOC]: New test. ++ [AIX_STDLIB_REALLOC]: New test. ++ [AIX_STDLIB_CALLOC]: New test. ++ [AIX_STDLIB_VALLOC]: New test. ++ + 2016-04-27 Release Manager + + * GCC 6.1.0 released. +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/fixincludes/fixincl.x gcc-6-20160721/fixincludes/fixincl.x +--- gcc-6.1.0/fixincludes/fixincl.x 2016-02-01 00:54:22.000000000 +0000 ++++ gcc-6-20160721/fixincludes/fixincl.x 2016-06-15 14:32:35.000000000 +0000 +@@ -2,11 +2,11 @@ + * + * DO NOT EDIT THIS FILE (fixincl.x) + * +- * It has been AutoGen-ed Sunday January 31, 2016 at 07:52:05 PM EST ++ * It has been AutoGen-ed June 10, 2016 at 12:56:52 PM by AutoGen 5.18.3 + * From the definitions inclhack.def + * and the template file fixincl + */ +-/* DO NOT SVN-MERGE THIS FILE, EITHER Sun 31 Jan 2016 19:52:05 EST ++/* DO NOT SVN-MERGE THIS FILE, EITHER Fri Jun 10 12:56:52 UTC 2016 + * + * You must regenerate it. Use the ./genfixes script. + * +@@ -15,7 +15,7 @@ + * certain ANSI-incompatible system header files which are fixed to work + * correctly with ANSI C and placed in a directory that GNU C will search. + * +- * This file contains 231 fixup descriptions. ++ * This file contains 235 fixup descriptions. + * + * See README for more information. + * +@@ -1547,6 +1547,154 @@ + + /* * * * * * * * * * * * * * * * * * * * * * * * * * + * ++ * Description of Aix_Stdlib_Malloc fix ++ */ ++tSCC zAix_Stdlib_MallocName[] = ++ "aix_stdlib_malloc"; ++ ++/* ++ * File name selection pattern ++ */ ++tSCC zAix_Stdlib_MallocList[] = ++ "stdlib.h\0"; ++/* ++ * Machine/OS name selection pattern ++ */ ++tSCC* apzAix_Stdlib_MallocMachs[] = { ++ "*-*-aix*", ++ (const char*)NULL }; ++ ++/* ++ * content selection pattern - do fix if pattern found ++ */ ++tSCC zAix_Stdlib_MallocSelect0[] = ++ "#define[ \t]+malloc[ \t]+__linux_malloc"; ++ ++#define AIX_STDLIB_MALLOC_TEST_CT 1 ++static tTestDesc aAix_Stdlib_MallocTests[] = { ++ { TT_EGREP, zAix_Stdlib_MallocSelect0, (regex_t*)NULL }, }; ++ ++/* ++ * Fix Command Arguments for Aix_Stdlib_Malloc ++ */ ++static const char* apzAix_Stdlib_MallocPatch[] = { ++ "format", ++ "extern void *malloc(size_t) __asm__(\"__linux_malloc\");", ++ (char*)NULL }; ++ ++/* * * * * * * * * * * * * * * * * * * * * * * * * * ++ * ++ * Description of Aix_Stdlib_Realloc fix ++ */ ++tSCC zAix_Stdlib_ReallocName[] = ++ "aix_stdlib_realloc"; ++ ++/* ++ * File name selection pattern ++ */ ++tSCC zAix_Stdlib_ReallocList[] = ++ "stdlib.h\0"; ++/* ++ * Machine/OS name selection pattern ++ */ ++tSCC* apzAix_Stdlib_ReallocMachs[] = { ++ "*-*-aix*", ++ (const char*)NULL }; ++ ++/* ++ * content selection pattern - do fix if pattern found ++ */ ++tSCC zAix_Stdlib_ReallocSelect0[] = ++ "#define[ \t]+realloc[ \t]+__linux_realloc"; ++ ++#define AIX_STDLIB_REALLOC_TEST_CT 1 ++static tTestDesc aAix_Stdlib_ReallocTests[] = { ++ { TT_EGREP, zAix_Stdlib_ReallocSelect0, (regex_t*)NULL }, }; ++ ++/* ++ * Fix Command Arguments for Aix_Stdlib_Realloc ++ */ ++static const char* apzAix_Stdlib_ReallocPatch[] = { ++ "format", ++ "extern void *realloc(void *, size_t) __asm__(\"__linux_realloc\");", ++ (char*)NULL }; ++ ++/* * * * * * * * * * * * * * * * * * * * * * * * * * ++ * ++ * Description of Aix_Stdlib_Calloc fix ++ */ ++tSCC zAix_Stdlib_CallocName[] = ++ "aix_stdlib_calloc"; ++ ++/* ++ * File name selection pattern ++ */ ++tSCC zAix_Stdlib_CallocList[] = ++ "stdlib.h\0"; ++/* ++ * Machine/OS name selection pattern ++ */ ++tSCC* apzAix_Stdlib_CallocMachs[] = { ++ "*-*-aix*", ++ (const char*)NULL }; ++ ++/* ++ * content selection pattern - do fix if pattern found ++ */ ++tSCC zAix_Stdlib_CallocSelect0[] = ++ "#define[ \t]+calloc[ \t]+__linux_calloc"; ++ ++#define AIX_STDLIB_CALLOC_TEST_CT 1 ++static tTestDesc aAix_Stdlib_CallocTests[] = { ++ { TT_EGREP, zAix_Stdlib_CallocSelect0, (regex_t*)NULL }, }; ++ ++/* ++ * Fix Command Arguments for Aix_Stdlib_Calloc ++ */ ++static const char* apzAix_Stdlib_CallocPatch[] = { ++ "format", ++ "extern void *calloc(size_t, size_t) __asm__(\"__linux_calloc\");", ++ (char*)NULL }; ++ ++/* * * * * * * * * * * * * * * * * * * * * * * * * * ++ * ++ * Description of Aix_Stdlib_Valloc fix ++ */ ++tSCC zAix_Stdlib_VallocName[] = ++ "aix_stdlib_valloc"; ++ ++/* ++ * File name selection pattern ++ */ ++tSCC zAix_Stdlib_VallocList[] = ++ "stdlib.h\0"; ++/* ++ * Machine/OS name selection pattern ++ */ ++tSCC* apzAix_Stdlib_VallocMachs[] = { ++ "*-*-aix*", ++ (const char*)NULL }; ++ ++/* ++ * content selection pattern - do fix if pattern found ++ */ ++tSCC zAix_Stdlib_VallocSelect0[] = ++ "#define[ \t]+valloc[ \t]+__linux_valloc"; ++ ++#define AIX_STDLIB_VALLOC_TEST_CT 1 ++static tTestDesc aAix_Stdlib_VallocTests[] = { ++ { TT_EGREP, zAix_Stdlib_VallocSelect0, (regex_t*)NULL }, }; ++ ++/* ++ * Fix Command Arguments for Aix_Stdlib_Valloc ++ */ ++static const char* apzAix_Stdlib_VallocPatch[] = { ++ "format", ++ "extern void *valloc(size_t) __asm__(\"__linux_valloc\");", ++ (char*)NULL }; ++ ++/* * * * * * * * * * * * * * * * * * * * * * * * * * ++ * + * Description of Aix_Strtof_Const fix + */ + tSCC zAix_Strtof_ConstName[] = +@@ -9485,9 +9633,9 @@ + * + * List of all fixes + */ +-#define REGEX_COUNT 268 ++#define REGEX_COUNT 272 + #define MACH_LIST_SIZE_LIMIT 187 +-#define FIX_COUNT 231 ++#define FIX_COUNT 235 + + /* + * Enumerate the fixes +@@ -9525,6 +9673,10 @@ + AIX_STDINT_4_FIXIDX, + AIX_STDINT_5_FIXIDX, + AIX_STDIO_INLINE_FIXIDX, ++ AIX_STDLIB_MALLOC_FIXIDX, ++ AIX_STDLIB_REALLOC_FIXIDX, ++ AIX_STDLIB_CALLOC_FIXIDX, ++ AIX_STDLIB_VALLOC_FIXIDX, + AIX_STRTOF_CONST_FIXIDX, + AIX_SYSMACHINE_FIXIDX, + AIX_SYSWAIT_2_FIXIDX, +@@ -9887,6 +10039,26 @@ + AIX_STDIO_INLINE_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE, + aAix_Stdio_InlineTests, apzAix_Stdio_InlinePatch, 0 }, + ++ { zAix_Stdlib_MallocName, zAix_Stdlib_MallocList, ++ apzAix_Stdlib_MallocMachs, ++ AIX_STDLIB_MALLOC_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE, ++ aAix_Stdlib_MallocTests, apzAix_Stdlib_MallocPatch, 0 }, ++ ++ { zAix_Stdlib_ReallocName, zAix_Stdlib_ReallocList, ++ apzAix_Stdlib_ReallocMachs, ++ AIX_STDLIB_REALLOC_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE, ++ aAix_Stdlib_ReallocTests, apzAix_Stdlib_ReallocPatch, 0 }, ++ ++ { zAix_Stdlib_CallocName, zAix_Stdlib_CallocList, ++ apzAix_Stdlib_CallocMachs, ++ AIX_STDLIB_CALLOC_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE, ++ aAix_Stdlib_CallocTests, apzAix_Stdlib_CallocPatch, 0 }, ++ ++ { zAix_Stdlib_VallocName, zAix_Stdlib_VallocList, ++ apzAix_Stdlib_VallocMachs, ++ AIX_STDLIB_VALLOC_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE, ++ aAix_Stdlib_VallocTests, apzAix_Stdlib_VallocPatch, 0 }, ++ + { zAix_Strtof_ConstName, zAix_Strtof_ConstList, + apzAix_Strtof_ConstMachs, + AIX_STRTOF_CONST_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE, +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/fixincludes/inclhack.def gcc-6-20160721/fixincludes/inclhack.def +--- gcc-6.1.0/fixincludes/inclhack.def 2016-02-01 00:54:22.000000000 +0000 ++++ gcc-6-20160721/fixincludes/inclhack.def 2016-06-15 14:32:35.000000000 +0000 +@@ -911,6 +911,48 @@ + test_text = "#ifdef __cplusplus\n}\n\n#ifdef ferror"; + }; + ++/* ++ * stdlib.h on AIX uses #define on malloc and friends. ++ */ ++fix = { ++ hackname = aix_stdlib_malloc; ++ mach = "*-*-aix*"; ++ files = stdlib.h; ++ select = "#define[ \t]+malloc[ \t]+__linux_malloc"; ++ c_fix = format; ++ c_fix_arg = "extern void *malloc(size_t) __asm__(\"__linux_malloc\");"; ++ test_text = "#define malloc __linux_malloc"; ++}; ++ ++fix = { ++ hackname = aix_stdlib_realloc; ++ mach = "*-*-aix*"; ++ files = stdlib.h; ++ select = "#define[ \t]+realloc[ \t]+__linux_realloc"; ++ c_fix = format; ++ c_fix_arg = "extern void *realloc(void *, size_t) __asm__(\"__linux_realloc\");"; ++ test_text = "#define realloc __linux_realloc"; ++}; ++ ++fix = { ++ hackname = aix_stdlib_calloc; ++ mach = "*-*-aix*"; ++ files = stdlib.h; ++ select = "#define[ \t]+calloc[ \t]+__linux_calloc"; ++ c_fix = format; ++ c_fix_arg = "extern void *calloc(size_t, size_t) __asm__(\"__linux_calloc\");"; ++ test_text = "#define calloc __linux_calloc"; ++}; ++ ++fix = { ++ hackname = aix_stdlib_valloc; ++ mach = "*-*-aix*"; ++ files = stdlib.h; ++ select = "#define[ \t]+valloc[ \t]+__linux_valloc"; ++ c_fix = format; ++ c_fix_arg = "extern void *valloc(size_t) __asm__(\"__linux_valloc\");"; ++ test_text = "#define valloc __linux_valloc"; ++}; + + /* + * stdlib.h on AIX 4.3 declares strtof() with a non-const first argument. +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/fixincludes/tests/base/stdlib.h gcc-6-20160721/fixincludes/tests/base/stdlib.h +--- gcc-6.1.0/fixincludes/tests/base/stdlib.h 2015-02-17 14:45:48.000000000 +0000 ++++ gcc-6-20160721/fixincludes/tests/base/stdlib.h 2016-06-15 14:32:35.000000000 +0000 +@@ -9,6 +9,26 @@ + + + ++#if defined( AIX_STDLIB_MALLOC_CHECK ) ++extern void *malloc(size_t) __asm__("__linux_malloc"); ++#endif /* AIX_STDLIB_MALLOC_CHECK */ ++ ++ ++#if defined( AIX_STDLIB_REALLOC_CHECK ) ++extern void *realloc(void *, size_t) __asm__("__linux_realloc"); ++#endif /* AIX_STDLIB_REALLOC_CHECK */ ++ ++ ++#if defined( AIX_STDLIB_CALLOC_CHECK ) ++extern void *calloc(size_t, size_t) __asm__("__linux_calloc"); ++#endif /* AIX_STDLIB_CALLOC_CHECK */ ++ ++ ++#if defined( AIX_STDLIB_VALLOC_CHECK ) ++extern void *valloc(size_t) __asm__("__linux_valloc"); ++#endif /* AIX_STDLIB_VALLOC_CHECK */ ++ ++ + #if defined( AIX_STRTOF_CONST_CHECK ) + extern float strtof(const char *, char **); + #endif /* AIX_STRTOF_CONST_CHECK */ +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/BASE-VER gcc-6-20160721/gcc/BASE-VER +--- gcc-6.1.0/gcc/BASE-VER 2016-04-27 08:20:21.000000000 +0000 ++++ gcc-6-20160721/gcc/BASE-VER 2016-04-27 10:38:16.000000000 +0000 +@@ -1 +1 @@ +-6.1.0 ++6.1.1 +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ChangeLog gcc-6-20160721/gcc/ChangeLog +--- gcc-6.1.0/gcc/ChangeLog 2016-04-27 08:20:21.000000000 +0000 ++++ gcc-6-20160721/gcc/ChangeLog 2016-07-21 16:18:46.000000000 +0000 +@@ -1,3 +1,2020 @@ ++2016-07-21 Jakub Jelinek ++ ++ PR sanitizer/71953 ++ * asan.c (asan_dynamic_init_call): Call asan_init_shadow_ptr_types ++ before builtin_decl_implicit. ++ ++ * tree-object-size.c (unknown): Use HOST_WIDE_INT_M1U instead of -1. ++ ++2016-07-21 Andrew Sutton ++ ++ Improving concepts performance and diagnostics. ++ * timevar.def (TV_CONSTRAINT_SAT, TV_CONSTRAINT_SUB): New time vars ++ for constraint satisfaction and subsumption. ++ * timevar.h (auto_timevar): New constructor that matches the push/pop ++ pattern of usage in pt.c. ++ ++2016-07-20 John David Anglin ++ ++ Backport from mainline ++ 2016-07-16 John David Anglin ++ ++ * config/pa/pa.c (hppa_profile_hook): Allocate stack space for ++ register parameters. Remove code to initialize argument pointer ++ on TARGET_64BIT. Optimize call to _mcount when it can be reached ++ using a pc-relative branch. Cleanup conditional code. ++ * config/pa/pa.md (call_mcount): New expander. ++ (call_mcount_nonpic): New insn. ++ (call_mcount_pic): New insn and split. ++ (call_mcount_pic_post_reload): New insn. ++ (call_mcount_64bit): New insn and split. ++ (call_mcount_64bit_post_reload): New insn. ++ ++2016-07-20 Andreas Krebbel ++ ++ Backport from mainline ++ 2016-07-20 Andreas Krebbel ++ ++ * config/s390/s390.c (s390_encode_section_info): Remove mode size ++ check. ++ ++2016-07-20 Martin Jambor ++ ++ PR fortran/71688 ++ * trans-decl.c (gfc_generate_function_code): Use get_create rather ++ than create to get a call graph node. ++ ++2016-07-19 Jakub Jelinek ++ ++ PR rtl-optimization/71916 ++ * cfgrtl.c (contains_no_active_insn_p): Return false also for ++ bb which have a single succ fake edge. ++ ++2016-07-19 Aldy Hernandez ++ ++ PR debug/71855 ++ * dwarf2out.c (gen_subprogram_die): Only call ++ gen_unspecified_parameters_die while dumping early dwarf. ++ ++2016-07-19 Jakub Jelinek ++ ++ PR middle-end/71874 ++ * gimple-fold.c (fold_builtin_memory_op): Use ++ get_addr_base_and_unit_offset instead of get_ref_base_and_extent. ++ ++2016-07-18 Michael Meissner ++ ++ Back port from mainline ++ 2016-07-18 Michael Meissner ++ ++ PR target/71493 ++ * config/rs6000/rs6000.c (rs6000_function_value): Fix ++ unintentional System V.4 structure return breakage for structures ++ with a single floating point element. ++ ++2016-07-18 Martin Liska ++ ++ Backported from mainline ++ 2016-07-12 Martin Liska ++ ++ PR rtl-optimization/71634 ++ * ira-build.c (mark_loops_for_removal): Properly iterate ++ loops. ++ ++2016-07-18 Andreas Krebbel ++ ++ Backport from mainline ++ 2016-07-18 Andreas Krebbel ++ ++ * config/s390/s390.c (s390_encode_section_info): Always set ++ notaligned marker if mode size is 0 or no MEM_ALIGN info could be ++ found. ++ ++2016-07-15 Alan Modra ++ ++ Apply from mainline ++ 2016-07-11 Alan Modra ++ * config/rs6000/rs6000.md (UNSPEC_DOLOOP): New unspec. ++ (ctr): Add unspec. ++ (ctr_internal*): Likewise. ++ ++2016-07-14 Alan Modra ++ ++ PR target/71733 ++ * config/rs6000/rs6000.c (rs6000_option_override_internal): Deal ++ with p9_vector override before power9-dform override. ++ ++2016-07-13 Ilya Enkovich ++ ++ Backport from mainline r238086. ++ 2016-07-07 Ilya Enkovich ++ ++ PR ipa/71624 ++ * ipa-inline-analysis.c (compute_inline_parameters): Set ++ local.can_change_signature to false for intrumentation ++ thunk callees. ++ ++2016-07-12 Michael Meissner ++ Bill Schmidt ++ ++ Backport from mainline ++ 2016-07-05 Michael Meissner ++ Bill Schmidt ++ ++ * config/rs6000/rs6000-protos.h (rs6000_split_signbit): New ++ prototype. ++ * config/rs6000/rs6000.c (rs6000_split_signbit): New function. ++ * config/rs6000/rs6000.md (UNSPEC_SIGNBIT): New constant. ++ (SIGNBIT): New mode iterator. ++ (Fsignbit): New mode attribute. ++ (signbit2): Change operand1 to match FLOAT128 instead of ++ IBM128; dispatch to gen_signbit{kf,tf}2_dm for __float128 ++ when direct moves are available. ++ (signbit2_dm): New define_insn_and_split). ++ (signbit2_dm2): New define_insn. ++ ++2016-07-12 Michael Meissner ++ ++ Backport from mainline ++ 2016-07-12 Michael Meissner ++ ++ PR target/71805 ++ * config/rs6000/altivec.md (altivec_vperm__internal): ++ The xxperm and xxpermr instructions require that the 2nd input ++ operand overlap with the output operand, and not the 1st. ++ (altivec_vperm_v8hiv16qi): Likewise. ++ (altivec_vperm__uns_internal): Likewise. ++ (altivec_vpermr__internal): Likewise. ++ (vperm_v8hiv4si): Likewise. ++ (vperm_v16qiv8hi): Likewise. ++ ++2016-07-12 Segher Boessenkool ++ ++ Backport from mainline ++ 2016-07-06 Segher Boessenkool ++ ++ PR target/70098 ++ PR target/71763 ++ * config/rs6000/rs6000.md (*ctr_internal1, *ctr_internal2, ++ *ctr_internal5, *ctr_internal6): Add *wi to the output ++ constraint. ++ ++2016-07-11 Jakub Jelinek ++ ++ PR middle-end/71758 ++ * omp-low.c (expand_omp_target): Gimplify device. ++ ++ PR tree-optimization/71823 ++ * tree-vect-stmts.c (vectorizable_operation): Use vect_get_vec_defs ++ to get vec_oprnds2 from op2. ++ ++2016-07-11 Yuri Rumyantsev ++ ++ Backport from mainline r238055. ++ 2016-07-06 Yuri Rumyantsev ++ ++ PR tree-optimization/71518 ++ * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Adjust ++ misalign also for outer loops with negative step. ++ ++2016-07-08 Martin Liska ++ ++ Backported from mainline ++ 2016-07-08 Martin Liska ++ ++ PR middle-end/71606 ++ * fold-const.c (fold_convertible_p): As COMPLEX_TYPE ++ folding produces SAVE_EXPRs, thus return false for the type. ++ ++2016-07-08 Kelvin Nilsen ++ ++ * config/rs6000/rs6000-builtin.def (BU_P9_MISC_1): Remove ++ redundant and erroneous definition of this macro accidentally ++ inserted during backporting. ++ (BU_P9_64BIT_MISC_0): Likewise. ++ (BU_P9_MISC_0): Likewise. ++ ++2016-07-08 Jiong Wang ++ ++ Back port from the trunk ++ 2016-07-08 Jiong Wang ++ ++ * config/aarch64/aarch64-simd-builtins.def (smax): Remove float ++ variants. ++ (smin): Likewise. ++ (fmax): New entry. ++ (fmin): Likewise. ++ * config/aarch64/arm_neon.h (vmaxnm_f32): Use ++ __builtin_aarch64_fmaxv2sf. ++ (vmaxnmq_f32): Likewise. ++ (vmaxnmq_f64): Likewise. ++ (vminnm_f32): Likewise. ++ (vminnmq_f32): Likewise. ++ (vminnmq_f64): Likewise. ++ ++2016-07-08 Michael Meissner ++ ++ Back port from trunk ++ 2016-07-08 Michael Meissner ++ ++ PR target/71806 ++ * config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Do not ++ enable -mfloat128-hardware by default. ++ (ISA_3_0_MASKS_IEEE): New macro to give all of the VSX options ++ that IEEE 128-bit hardware support needs. ++ * config/rs6000/rs6000.c (rs6000_option_override_internal): If ++ -mcpu=power9 -mfloat128, enable -mfloat128-hardware by default. ++ Use ISA_3_0_MASKS_IEEE as the set of options that IEEE 128-bit ++ floating point requires. ++ * doc/invoke.texi (RS/6000 and PowerPC Options): Document ++ -mfloat128 and -mfloat128-hardware changes. ++ ++2016-07-08 Kelvin Nilsen ++ ++ Backport from mainline r237912 ++ 2016-07-01 Kelvin Nilsen ++ ++ * config/rs6000/altivec.md (*altivec_vpermr__internal): ++ Exchange the order of the second and third operands in the vpermr ++ instruction tmeplate. ++ ++2016-07-07 Michael Meissner ++ ++ Back port from the trunk ++ 2016-07-01 Michael Meissner ++ ++ PR target/71720 ++ * config/rs6000/vsx.md (vsx_splat_v4sf_internal): When splitting ++ the insns, use an insn form that does not adjust the offset on ++ little endian systems. ++ ++2016-07-07 Kelvin Nilsen ++ ++ Backport from mainline r237885 ++ 2016-06-30 Kelvin Nilsen ++ ++ * config/rs6000/altivec.md (darn_32): Change the condition to ++ TARGET_P9_MISC instead of TARGET_MODULO. ++ (darn_raw): Replace TARGET_MODULO with TARGET_P9_MISC in the ++ condition expression. ++ (darn): Replace TARGET_MODULO with TARGET_P9_MISC in the ++ condition expression. ++ * config/rs6000/dfp.md (UNSPEC_DTSTSFI): New unspec constant. ++ (DFP_TEST): New code iterator. ++ (dfptstsfi__mode>): New define_expand. ++ (*dfp_sgnfcnc_): New define_insn. ++ * config/rs6000/rs6000-builtin.def (BU_P9_MISC_0): Move this macro ++ definition next to BU_P9_MISC_1 definition and change the MASK ++ value to RS6000_BTM_P9_MISC. ++ (BU_P9_MISC_1): Change the MASK value to RS6000_BTM_P9_MISC. ++ (BU_P9_64BIT_MISC_0): Likewise. ++ (BU_P9_DFP_MISC_0): New macro definition. ++ (BU_P9_DFP_MISC_1): New macro definition. ++ (BU_P9_DFP_MISC_2): New macro definition. ++ (BU_P9_DFP_OVERLOAD_1): New macro definition. ++ (BU_P9_DFP_OVERLOAD_2): New macro definition. ++ (BU_P9_DFP_OVERLOAD_3): New macro definition. ++ (TSTSFI_LT_DD): New BU_P9_DFP_MISC_2. ++ (TSTSFI_LT_TD): Likewise. ++ (TSTSFI_EQ_DD): Likewise. ++ (TSTSFI_EQ_TD): Likewise. ++ (TSTSFI_GT_DD): Likewise. ++ (TSTSFI_GT_TD): Likewise. ++ (TSTSFI_OV_DD): Likewise. ++ (TSTSFI_OV_TD): Likewise. ++ (TSTSFI_LT): New BU_P9_DFP_OVERLOAD_2. ++ (TSTSFI_LT_DD): Likewise. ++ (TSTSFI_LT_TD): Likewise. ++ (TSTSFI_EQ): Likewise. ++ (TSTSFI_EQ_DD): Likewise. ++ (TSTSFI_EQ_TD): Likewise. ++ (TSTSFI_GT): Likewise. ++ (TSTSFI_GT_DD): Likewise. ++ (TSTSFI_GT_TD): Likewise. ++ (TSTSFI_OV): Likewise. ++ (TSTSFI_OV_DD): Likewise. ++ (TSTSFI_OV_TD): Likewise. ++ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add ++ overloaded test significance functions. ++ * config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add ++ OPTION_MASK_P9_MISC into the representation of this mask. ++ (POWERPC_MASKS): Add OPTION_MASK_P9_MISC into the representation ++ of this mask. ++ * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Set the ++ RS6000_BTM_P9_MISC flag in the return value if TARGET_P9_MISC is ++ non-zero. ++ (rs6000_expand_binop_builtin): Enforce that argument 0 of the exp ++ argument is a 6-bit unsigned literal value if the icode argument ++ represents a DFP test significance built-in call. ++ (rs6000_invalid_builtin): Add support for the RS6000_BTM_P9_MISC ++ flag used independently and in combination with the ++ RS6000_BTM_64BIT flag. ++ (rs6000_opt_masks): Add entry for power9-misc command-line option. ++ (rs6000_builtin_mask_names): Add entry for power9-misc ++ command-line option. ++ * config/rs6000/rs6000.h: Redefine TARGET_P9_MISC as 0 if ++ HAVE_AS_POWER9 is not a defined macro. Define MASK_P9_MISC and ++ RS6000_BTM_P9_MISC macros. ++ * config/rs6000/rs6000.opt: Add support for the -mpower9-misc ++ option and change the description of the -mpower9-vector option to ++ enable only vector instructions, removing its erroneously claimed ++ support for scalar instructions. ++ * doc/extend.texi (PowerPC AltiVec Built-in Functions): Document ++ the ISA 3.0 digital floating point test significance built-in ++ functions. ++ ++2016-07-07 Richard Biener ++ ++ Backport from mainline ++ 2016-06-13 Richard Biener ++ ++ PR middle-end/64516 ++ * fold-const.c (fold_unary_loc): Preserve alignment when ++ folding a VIEW_CONVERT_EXPR into a MEM_REF. ++ ++2016-07-07 Richard Biener ++ ++ Backport from mainline ++ 2016-05-25 Richard Biener ++ ++ PR tree-optimization/71264 ++ * tree-vect-stmts.c (vect_init_vector): Properly deal with ++ vector type val. ++ ++ 2016-06-07 Richard Biener ++ ++ PR middle-end/71423 ++ * match.pd ((X | ~Y) -> Y <= X): Properly invert the comparison ++ for signed ops. ++ ++ 2016-06-14 Richard Biener ++ ++ PR tree-optimization/71521 ++ * tree-vrp.c (extract_range_from_binary_expr_1): Guard ++ division int_const_binop against zero divisor. ++ ++ 2016-06-08 Richard Biener ++ ++ PR tree-optimization/71452 ++ * tree-ssa.c (non_rewritable_lvalue_p): Make sure that the ++ type used for the SSA rewrite has enough precision to cover ++ the dynamic type of the location. ++ ++ 2016-06-14 Richard Biener ++ ++ PR tree-optimization/71522 ++ * tree-ssa.c (non_rewritable_lvalue_p): Do not rewrite non-float ++ copying into float copying. ++ ++2016-07-06 Senthil Kumar Selvaraj ++ ++ Backport from mainline ++ 2016-07-06 Senthil Kumar Selvaraj ++ ++ PR target/50739 ++ * config/avr/avr.c (avr_asm_select_section): Strip off ++ SECTION_DECLARED from flags when calling get_section. ++ ++2016-07-05 Pat Haugen ++ ++ Backport from mainline ++ 2016-06-28 Pat Haugen ++ ++ * config/rs6000/rs6000.md ('type' attribute): Add htmsimple/dfp types. ++ ('size' attribute): Add '128'. ++ Include power9.md. ++ (*mov_hardfloat32, *mov_hardfloat64, *movdi_internal32, ++ *movdi_internal64, *movdf_update1): Set size attribute to '64'. ++ (add3, sub3, mul3, div3, sqrt2, ++ copysign3, neg2_hw, abs2_hw, *nabs2_hw, ++ *fma4_hw, *fms4_hw, *nfma4_hw, *nfms4_hw, ++ extend2_hw, truncdf2_hw, ++ *xscvqpwz_, *xscvqpdz_, *xscvdqp_, ++ *truncdf2_odd): Set size attribute to '128'. ++ (*cmp_hw): Change type to veccmp and set size attribute to '128'. ++ * config/rs6000/power6.md (power6-fp): Include dfp type. ++ * config/rs6000/power7.md (power7-fp): Likewise. ++ * config/rs6000/power8.md (power8-fp): Likewise. ++ * config/rs6000/power9.md: New file. ++ * config/rs6000/t-rs6000 (MD_INCLUDES): Add power9.md. ++ * config/rs6000/htm.md (*tabort, *tabortc, *tabortci, ++ *trechkpt, *treclaim, *tsr, *ttest): Change type attribute to ++ htmsimple. ++ * config/rs6000/dfp.md (extendsddd2, truncddsd2, extendddtd2, ++ trunctddd2, adddd3, addtd3, subdd3, subtd3, muldd3, multd3, divdd3, ++ divtd3, *cmpdd_internal1, *cmptd_internal1, floatdidd2, floatditd2, ++ ftruncdd2, fixdddi2, ftrunctd2, fixtddi2, dfp_ddedpd_, ++ dfp_denbcd_, dfp_dxex_, dfp_diex_, dfp_dscli_, ++ dfp_dscri_): Change type attribute to dfp. ++ * config/rs6000/crypto.md (crypto_vshasigma): Change type ++ attribute to vecsimple. ++ * config/rs6000/rs6000.c (power9_cost): Update costs, cache size ++ and prefetch streams. ++ (rs6000_option_override_internal): Remove temporary code setting ++ tuning to power8. Don't set rs6000_sched_groups for power9. ++ (last_scheduled_insn): Change to rtx_insn *. ++ (divide_cnt, vec_load_pendulum): New variables. ++ (rs6000_adjust_cost): Add Power9 to test for store->load separation. ++ (rs6000_issue_rate): Set issue rate for Power9. ++ (is_power9_pairable_vec_type): New. ++ (power9_sched_reorder2): New. ++ (rs6000_sched_reorder2): Call new function for Power9 specific ++ reordering. ++ (insn_must_be_first_in_group): Remove Power9. ++ (insn_must_be_last_in_group): Likewise. ++ (force_new_group): Likewise. ++ (rs6000_sched_init): Fix initialization of last_scheduled_insn. ++ Initialize divide_cnt/vec_load_pendulum. ++ (_rs6000_sched_context, rs6000_init_sched_context, ++ rs6000_set_sched_context): Handle context save/restore of new ++ variables. ++ ++2016-07-05 Pat Haugen ++ ++ Backport from mainline ++ 2016-06-27 Pat Haugen ++ ++ * config/rs6000/rs6000.md ('type' attribute): Add ++ veclogical,veccmpfx,vecexts,vecmove insn types. ++ (*abs2_fpr, *nabs2_fpr, *neg2_fpr, *extendsfdf2_fpr, ++ copysign3_fcpsgn, truncdf2_internal1, neg2_internal, ++ p8_fmrgow_, pack): Change type to fpsimple. ++ (*xxsel, copysign3_hard, neg2_hw, abs2_hw, ++ *nabs2_hw): Change type to vecmove. ++ (*and3_internal, *bool3_internal, *boolc3_internal, ++ *boolcc3_internal, *eqv3_internal, ++ *one_cmpl3_internal, *ieee_128bit_vsx_neg2_internal, ++ *ieee_128bit_vsx_abs2_internal, ++ *ieee_128bit_vsx_nabs2_internal, extendkftf2, trunctfkf2, ++ *ieee128_mfvsrd_64bit, *ieee128_mfvsrd_32bit, *ieee128_mtvsrd_64bit, ++ *ieee128_mtvsrd_32bit): Change type to veclogical. ++ (mov_hardfloat, *mov_hardfloat32, *mov_hardfloat64, ++ *movdi_internal32, *movdi_internal64): Update insn types. ++ * config/rs6000/vsx.md (*vsx_le_undo_permute_, ++ vsx_extract_): Change type to veclogical. ++ (*vsx_xxsel, *vsx_xxsel_uns): Change type to vecmove. ++ (vsx_sign_extend_qi_, *vsx_sign_extend_hi_, ++ *vsx_sign_extend_si_v2di): Change type to vecexts. ++ * config/rs6000/altivec.md (*altivec_mov, *altivec_movti): Change ++ type to veclogical. ++ (*altivec_eq, *altivec_gt, *altivec_gtu, ++ *altivec_vcmpequ_p, *altivec_vcmpgts_p, ++ *altivec_vcmpgtu_p): Change type to veccmpfx. ++ (*altivec_vsel, *altivec_vsel_uns): Change type to vecmove. ++ * config/rs6000/dfp.md (*negdd2_fpr, *absdd2_fpr, *nabsdd2_fpr, ++ negtd2, *abstd2_fpr, *nabstd2_fpr): Change type to fpsimple. ++ * config/rs6000/40x.md (ppc405-float): Add fpsimple. ++ * config/rs6000/440.md (ppc440-fp): Add fpsimple. ++ * config/rs6000/476.md (ppc476-fp): Add fpsimple. ++ * config/rs6000/601.md (ppc601-fp): Add fpsimple. ++ * config/rs6000/603.md (ppc603-fp): Add fpsimple. ++ * config/rs6000/6xx.md (ppc604-fp): Add fpsimple. ++ * config/rs6000/7xx.md (ppc750-fp): Add fpsimple. ++ (ppc7400-vecsimple): Add veclogical, vecmove, veccmpfx. ++ * config/rs6000/7450.md (ppc7450-fp): Add fpsimple. ++ (ppc7450-vecsimple): Add veclogical, vecmove. ++ (ppc7450-veccmp): Add veccmpfx. ++ * config/rs6000/8540.md (ppc8540_simple_vector): Add veclogical, ++ vecmove. ++ (ppc8540_vector_compare): Add veccmpfx. ++ * config/rs6000/a2.md (ppca2-fp): Add fpsimple. ++ * config/rs6000/cell.md (cell-fp): Add fpsimple. ++ (cell-vecsimple): Add veclogical, vecmove. ++ (cell-veccmp): Add veccmpfx. ++ * config/rs6000/e300c2c3.md (ppce300c3_fp): Add fpsimple. ++ * config/rs6000/e6500.md (e6500_vecsimple): Add veclogical, vecmove, ++ veccmpfx. ++ * config/rs6000/mpc.md (mpccore-fp): Add fpsimple. ++ * config/rs6000/power4.md (power4-fp): Add fpsimple. ++ (power4-vecsimple): Add veclogical, vecmove. ++ (power4-veccmp): Add veccmpfx. ++ * config/rs6000/power5.md (power5-fp): Add fpsimple. ++ * config/rs6000/power6.md (power6-fp): Add fpsimple. ++ (power6-vecsimple): Add veclogical, vecmove. ++ (power6-veccmp): Add veccmpfx. ++ * config/rs6000/power7.md (power7-fp): Add fpsimple. ++ (power7-vecsimple): Add veclogical, vecmove, veccmpfx. ++ * config/rs6000/power8.md (power8-fp): Add fpsimple. ++ (power8-vecsimple): Add veclogical, vecmove, veccmpfx. ++ * config/rs6000/rs64.md (rs64a-fp): Add fpsimple. ++ * config/rs6000/titan.md (titan_fp): Add fpsimple. ++ * config/rs6000/xfpu.md (fp-default, fp-addsub-s, fp-addsub-d): Add ++ fpsimple. ++ * config/rs6000/rs6000.c (rs6000_adjust_cost): Add TYPE_FPSIMPLE. ++ ++2016-07-05 Kelvin Nilsen ++ ++ Backport from mainline r237391 ++ 2016-06-13 Kelvin Nilsen ++ ++ * config/rs6000/rs6000.h (RS6000_BTM_COMMON): Add the ++ RS6000_BTM_MODULO flag into the set of flags that are considered ++ to be part of the common configuration. ++ ++2016-07-04 Jakub Jelinek ++ ++ PR c++/71739 ++ * tree.c (attribute_value_equal): Use get_attribute_name instead of ++ directly using TREE_PURPOSE. ++ ++2016-07-04 Segher Boessenkool ++ ++ Backport from mainline ++ 2016-06-27 Segher Boessenkool ++ ++ PR target/71670 ++ * config/rs6000/rs6000.md (ashdi3_extswsli_dot): Use ++ gen_ashdi3_extswsli_dot2 instead of gen_ashdi3_extswsli_dot. ++ ++2016-07-02 Jakub Jelinek ++ ++ Backported from mainline ++ 2016-06-28 Jakub Jelinek ++ ++ PR middle-end/71626 ++ * config/i386/i386.c (ix86_expand_vector_move): For SUBREG of ++ a constant, force its SUBREG_REG into memory or register instead ++ of whole op1. ++ ++ 2016-06-20 Jakub Jelinek ++ ++ PR target/71559 ++ * config/i386/i386.c (ix86_fp_cmp_code_to_pcmp_immediate): Fix up ++ returned values and add UN*/LTGT/*ORDERED cases with values matching ++ D operand modifier on vcmp for AVX. ++ ++2016-07-01 Kelvin Nilsen ++ ++ Backport from trunk r237659 ++ 2016-06-21 Kelvin Nilsen ++ ++ * config/rs6000/rs6000.h: Add conditional preprocessing directives ++ to disable Power9-specific compiler features if HAVE_AS_POWER9 is ++ not defined. ++ ++2016-07-01 Peter Bergner ++ ++ Backport from trunk ++ 2016-06-27 Peter Bergner ++ ++ PR target/71656 ++ * config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add ++ OPTION_MASK_P9_DFORM_VECTOR. ++ * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not ++ disable -mpower9-dform-vector when using reload. ++ (quad_address_p): Remove 'gpr_p' argument and all associated code. ++ New 'strict' argument. Update all callers. Add strict addressing ++ support. ++ (rs6000_legitimate_offset_address_p): Remove call to ++ virtual_stack_registers_memory_p. ++ (rs6000_legitimize_reload_address): Add quad address support. ++ (rs6000_legitimate_address_p): Move call to quad_address_p above ++ call to virtual_stack_registers_memory_p. Adjust quad_address_p args ++ to account for new strict usage. ++ (rs6000_output_move_128bit): Adjust quad_address_p args to account ++ for new strict usage. ++ * config/rs6000/predicates.md (quad_memory_operand): Likewise. ++ ++2016-07-01 Bill Schmidt ++ ++ Backport from mainline ++ 2016-06-24 Bill Schmidt ++ ++ * config/rs6000/rs6000-builtin.def (BU_FLOAT128_2): New #define. ++ (BU_FLOAT128_1): Likewise. ++ (FABSQ): Likewise. ++ (COPYSIGNQ): Likewise. ++ (RS6000_BUILTIN_NANQ): Likewise. ++ (RS6000_BUILTIN_NANSQ): Likewise. ++ (RS6000_BUILTIN_INFQ): Likewise. ++ (RS6000_BUILTIN_HUGE_VALQ): Likewise. ++ * config/rs6000/rs6000.c (rs6000_fold_builtin): New prototype. ++ (TARGET_FOLD_BUILTIN): New #define. ++ (rs6000_builtin_mask_calculate): Add TARGET_FLOAT128 entry. ++ (rs6000_invalid_builtin): Add handling for RS6000_BTM_FLOAT128. ++ (rs6000_fold_builtin): New target hook implementation, handling ++ folding of 128-bit NaNs and infinities. ++ (rs6000_init_builtins): Initialize const_str_type_node; ensure all ++ entries are filled in to avoid problems during bootstrap ++ self-test; define builtins for 128-bit NaNs and infinities. ++ (rs6000_opt_mask): Add entry for float128. ++ * config/rs6000/rs6000.h (RS6000_BTM_FLOAT128): New #define. ++ (RS6000_BTM_COMMON): Include RS6000_BTM_FLOAT128. ++ (rs6000_builtin_type_index): Add RS6000_BTI_const_str. ++ (const_str_type_node): New #define. ++ * config/rs6000/rs6000.md (copysign3 for IEEE128): Convert ++ to a define_expand that dispatches to either copysign3_soft ++ or copysign3_hard. ++ (copysign3_hard): Rename from copysign3. ++ (copysign3_soft): New define_insn. ++ * doc/extend.texi: Document new builtins. ++ ++2016-07-01 Peter Bergner ++ ++ Backport from trunk ++ 2016-07-01 Peter Bergner ++ ++ PR target/71698 ++ * config/rs6000/rs6000.c (rs6000_secondary_reload_simple_move): Disallow ++ TDmode values. ++ ++2016-07-01 Kelvin Nilsen ++ ++ Backport from trunk r236992 ++ 2016-06-01 Kelvin Nilsen ++ ++ * config/rs6000/altivec.h (vec_slv): New macro. ++ (vec_srv): New macro. ++ * config/rs6000/altivec.md (UNSPEC_VSLV): New value. ++ (UNSPEC_VSRV): New value. ++ (vslv): New insn. ++ (vsrv): New insn. ++ * config/rs6000/rs6000-builtin.def (vslv): New builtin definition. ++ (vsrv): New builtin definition. ++ * config/rs6000/rs6000-c.c (P9V_BUILTIN_VSLV): Macro expansion to ++ define argument types for new builtin. ++ (P9V_BUILTIN_VSRV): Macro expansion to define argument types for ++ new builtin. ++ * doc/extend.texi: Document the new vec_vslv and vec_srv built-in ++ functions. ++ ++2016-07-01 Eric Botcazou ++ ++ * config/arm/arm.c (arm_function_ok_for_sibcall): Add another check ++ for NULL decl. ++ ++2016-06-30 Kelvin Nilsen ++ ++ Backport from trunk r237390 ++ 2016-06-13 Kelvin Nilsen ++ ++ * config/rs6000/altivec.h (vec_absd): New macro for vector absolute ++ difference unsigned. ++ (vec_absdb): New macro for vector absolute difference unsigned ++ byte. ++ (vec_absdh): New macro for vector absolute difference unsigned ++ half-word. ++ (vec_absdw): New macro for vector absolute difference unsigned word. ++ * config/rs6000/altivec.md (UNSPEC_VADU): New value. ++ (vadu3): New insn. ++ (*p9_vadu3): New insn. ++ * config/rs6000/rs6000-builtin.def (vadub): New built-in ++ definition. ++ (vaduh): New built-in definition. ++ (vaduw): New built-in definition. ++ (vadu): New overloaded built-in definition. ++ (vadub): New overloaded built-in definition. ++ (vaduh): New overloaded built-in definition. ++ (vaduw): New overloaded built-in definition. ++ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add ++ overloaded vector absolute difference unsigned functions. ++ * doc/extend.texi (PowerPC AltiVec Built-in Functions): Document ++ the ISA 3.0 vector absolute difference unsigned built-in functions. ++ ++2016-06-30 David Malcolm ++ ++ Backport from trunk r237880. ++ 2016-06-30 David Malcolm ++ ++ PR driver/71651 ++ * gcc.c (driver::build_option_suggestions): Pass "option" to ++ add_misspelling_candidates. ++ * opts-common.c (add_misspelling_candidates): Add "option" param; ++ use it to avoid adding negated forms for options marked with ++ RejectNegative. ++ * opts.h (add_misspelling_candidates): Add "option" param. ++ ++2016-06-30 Jakub Jelinek ++ ++ PR middle-end/71693 ++ * fold-const.c (fold_binary_loc) : Cast ++ TREE_OPERAND (arg0, 0) and TREE_OPERAND (arg0, 1) to type ++ first when permuting bitwise operation with rotate. Cast ++ TREE_OPERAND (arg0, 0) to type when cancelling two rotations. ++ ++2016-06-30 Martin Liska ++ ++ Parting backport from mainline ++ 2016-06-29 Martin Liska ++ ++ * ipa-inline-transform.c (inline_call): Remove unnecessary call ++ of build_optimization_node. ++ ++2016-06-29 Eric Botcazou ++ ++ Backport from mainline ++ 2016-06-09 Eric Botcazou ++ ++ * df-problems.c (df_note_bb_compute): Guard use of DF_INSN_INFO_GET. ++ ++2016-06-27 Michael Meissner ++ ++ Back port from trunk ++ 2016-06-21 Michael Meissner ++ ++ * stor-layout.c (layout_type): Move setting complex MODE to ++ layout_type, instead of setting it ahead of time by the caller. ++ ++ Back port from trunk ++ 2016-05-11 Alan Modra ++ ++ * config/rs6000/rs6000.c (is_complex_IBM_long_double, ++ abi_v4_pass_in_fpr): New functions. ++ (rs6000_function_arg_boundary): Exclude complex IBM long double ++ from 64-bit alignment when ABI_V4. ++ (rs6000_function_arg, rs6000_function_arg_advance_1, ++ rs6000_gimplify_va_arg): Use abi_v4_pass_in_fpr. ++ ++ Back port from trunk ++ 2016-05-02 Michael Meissner ++ ++ * machmode.h (mode_complex): Add support to give the complex mode ++ for a given mode. ++ (GET_MODE_COMPLEX_MODE): Likewise. ++ * stor-layout.c (layout_type): For COMPLEX_TYPE, use the mode ++ stored by build_complex_type and gfc_build_complex_type instead of ++ trying to figure out the appropriate mode based on the size. Raise ++ an assertion error, if the type was not set. ++ * genmodes.c (struct mode_data): Add field for the complex type of ++ the given type. ++ (blank_mode): Likewise. ++ (make_complex_modes): Remember the complex mode created in the ++ base type. ++ (emit_mode_complex): Write out the mode_complex array to map a ++ type mode to the complex version. ++ (emit_insn_modes_c): Likewise. ++ * tree.c (build_complex_type): Set the complex type to use before ++ calling layout_type. ++ * config/rs6000/rs6000.c (rs6000_hard_regno_nregs_internal): Add ++ support for __float128 complex datatypes. ++ (rs6000_hard_regno_mode_ok): Likewise. ++ (rs6000_setup_reg_addr_masks): Likewise. ++ (rs6000_complex_function_value): Likewise. ++ * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Likewise. ++ __float128 and __ibm128 complex. ++ (FLOAT128_IBM_P): Likewise. ++ (ALTIVEC_ARG_MAX_RETURN): Likewise. ++ * doc/extend.texi (Additional Floating Types): Document that ++ -mfloat128 must be used to enable __float128. Document complex ++ __float128 and __ibm128 support. ++ ++2016-06-24 Jakub Jelinek ++ ++ PR tree-optimization/71647 ++ * omp-low.c (lower_rec_input_clauses): Convert ++ omp_clause_aligned_alignment (c) to size_type_node for the ++ last argument of __builtin_assume_aligned. ++ ++2016-06-22 Eric Botcazou ++ ++ * function.c (assign_parm_setup_reg): Prevent sharing in another case. ++ ++2016-06-21 Georg-Johann Lay ++ ++ Backport from 2016-06-21 trunk r237639. ++ ++ PR target/30417 ++ * config/avr/gen-avr-mmcu-specs.c (print_mcu): ++ [*link_data_start]: Wrap -Tdata into %{!Tdata:...}. ++ [*link_text_start]: Wrap -Ttext into %{!Ttext:...}. ++ ++2016-06-21 Georg-Johann Lay ++ ++ PR target/71103 ++ * config/avr/avr.md (movqi): Only handle loading subreg:qi of ++ constant addresses if can_create_pseudo_p. ++ ++2016-06-21 Jakub Jelinek ++ ++ PR tree-optimization/71588 ++ * tree-ssa-strlen.c (valid_builtin_call): New function. ++ (adjust_last_stmt, handle_builtin_memset, strlen_optimize_stmt): Use ++ it. ++ ++ Backported from mainline ++ 2016-06-20 Jakub Jelinek ++ ++ PR middle-end/71581 ++ * tree-ssa-uninit.c (warn_uninit): If EXPR and VAR are NULL, ++ see if T isn't anonymous SSA_NAME with COMPLEX_EXPR created ++ for conversion of scalar user var to complex type and use the ++ underlying SSA_NAME_VAR in that case. If EXPR is still NULL, ++ punt. ++ ++ 2016-06-16 Jakub Jelinek ++ ++ * gimplify.c (gimplify_scan_omp_clauses): Handle COMPONENT_REFs ++ with base of reference to struct. ++ ++2016-06-20 Ilya Enkovich ++ ++ Backport from mainline r237484. ++ 2016-06-15 Ilya Enkovich ++ ++ PR middle-end/71529 ++ * ipa-chkp.c (chkp_build_instrumented_fndecl): Fix ++ DECL_CONTEXT for copied arguments. ++ ++2016-06-20 Georg-Johann Lay ++ Pitchumani Sivanupandi ++ ++ Backport from 2016-06-20 trunk r237589, r236558. ++ ++ PR target/71103 ++ * config/avr/avr.md (movqi): Handle loading subreg:qi (const, ++ symbol_ref,label_ref). ++ ++2016-06-16 Jakub Jelinek ++ ++ PR target/71554 ++ * config/i386/i386.md (setcc + movzbl peephole2): Use reg_set_p. ++ (setcc + and peephole2): Likewise. ++ ++2016-06-15 Andreas Tobler ++ ++ Backported from mainline ++ 2016-06-14 Andreas Tobler ++ ++ * config/arm/freebsd.h: Only enable unaligned access for armv6 on ++ FreeBSD 11 and above. ++ ++2016-06-15 Ilya Verbin ++ ++ Backport from mainline ++ 2016-04-30 Rainer Orth ++ ++ * config/darwin.h (LINK_COMMAND_SPEC_A): Handle -fcilkplus. ++ ++2016-06-14 Jakub Jelinek ++ ++ Backported from mainline ++ 2016-06-10 Jakub Jelinek ++ ++ PR middle-end/71494 ++ * tree-nested.c (convert_nonlocal_reference_stmt): For GIMPLE_GOTO ++ without LABEL_DECL, set *handled_ops_p to false instead of true. ++ ++ 2016-06-08 Jakub Jelinek ++ Richard Biener ++ ++ PR c++/71448 ++ * fold-const.c (fold_comparison): Handle CONSTANT_CLASS_P (base0) ++ the same as DECL_P (base0) for indirect_base0. Use equality_code ++ in one further place. ++ ++ 2016-06-04 Jakub Jelinek ++ ++ PR tree-optimization/71405 ++ * tree-ssa.c (execute_update_addresses_taken): For clobber with ++ incompatible type, build a new clobber with the right type instead ++ of building a VIEW_CONVERT_EXPR around it. ++ ++2016-06-13 Eric Botcazou ++ ++ * tree-ssa-sccvn.c (vn_reference_lookup_3): Use a uniform test and ++ update shared_lookup_references only once after changing operands. ++ ++2016-06-13 Richard Biener ++ ++ PR tree-optimization/71505 ++ * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Make ++ assert match comment. ++ ++2016-06-13 Andreas Krebbel ++ ++ Backport from mainline ++ 2016-06-13 Andreas Krebbel ++ ++ PR target/71379 ++ * config/s390/s390.c (s390_expand_builtin): Increase MAX_ARGS by ++ one. ++ ++2016-06-10 Thomas Schwinge ++ ++ PR middle-end/71373 ++ Backport from trunk r237291: ++ * tree-nested.c (convert_nonlocal_omp_clauses) ++ (convert_local_omp_clauses): Handle OMP_CLAUSE_ASYNC, ++ OMP_CLAUSE_WAIT, OMP_CLAUSE_INDEPENDENT, OMP_CLAUSE_AUTO, ++ OMP_CLAUSE__CACHE_, OMP_CLAUSE_TILE. ++ ++ Backport from trunk r237291: ++ * gimplify.c (gimplify_adjust_omp_clauses): Discard ++ OMP_CLAUSE_TILE. ++ * omp-low.c (scan_sharing_clauses): Don't expect OMP_CLAUSE_TILE. ++ ++ Backport from trunk r237290: ++ * omp-low.c (scan_sharing_clauses): Don't expect ++ OMP_CLAUSE__CACHE_. ++ ++ Backport trunk r235964: ++ 2016-05-06 Nathan Sidwell ++ ++ * gimple.c (gimple_call_same_target_p): Unique functions are eq. ++ * tree-ssa-tail-merge.c (same_succ::equal): Check pointer eq ++ equality first. ++ ++2016-06-09 Michael Meissner ++ ++ Back port from trunk ++ 2016-05-31 Michael Meissner ++ ++ * config/rs6000/vsx.md (vsx_splat_, V2DI/V2DF): Simplify ++ alternatives, eliminating preferred register class. Add support ++ for the MTVSRDD instruction in ISA 3.0. ++ (vsx_splat_v4si_internal): Use splat_input_operand instead of ++ reg_or_indexed_operand. ++ (vsx_splat_v4sf_internal): Likewise. ++ ++ Back port from trunk ++ 2016-05-31 Michael Meissner ++ ++ PR target/71186 ++ * config/rs6000/vsx.md (xxspltib__nosplit): Add alternatives ++ for loading up all 0's or all 1's. ++ ++ Back port from trunk ++ 2016-05-18 Michael Meissner ++ ++ PR target/70915 ++ * config/rs6000/constraints.md (wE constraint): New constraint ++ for a vector constant that can be loaded with XXSPLTIB. ++ (wM constraint): New constraint for a vector constant of a 1's. ++ (wS constraint): New constraint for a vector constant that can be ++ loaded with XXSPLTIB and a vector sign extend instruction. ++ * config/rs6000/predicates.md (xxspltib_constant_split): New ++ predicates for wE/wS constraints. ++ (xxspltib_constant_nosplit): Likewise. ++ (easy_vector_constant): Add support for constants that can be ++ loaded via XXSPLTIB. ++ (splat_input_operand): Add support for ISA 3.0 word splat operations. ++ * config/rs6000/rs6000.c (xxspltib_constant_p): New function to ++ return if a constant can be loaded with the ISA 3.0 XXSPLTIB ++ instruction and possibly with a sign extension. ++ (output_vec_const_move): Add support for XXSPLTIB. If we are ++ loading up 0/-1 into Altivec registers, prefer using VSPLTISW ++ instead of XXLXOR/XXLORC. ++ (rs6000_expand_vector_init): Add support for ISA 3.0 word splat ++ operations. ++ (rs6000_legitimize_reload_address): Likewise. ++ (rs6000_output_move_128bit): Use output_vec_const_move to emit ++ constants. ++ * config/rs6000/vsx.md (VSX_M): Add TImode (if -mvsx-timode) and ++ combine VSX_M and VSX_M2 into one iterator. ++ (VSX_M2): Likewise. ++ (VSINT_84): New iterators for loading constants with XXSPLTIB. ++ (VSINT_842): Likewise. ++ (UNSPEC_VSX_SIGN_EXTEND): New UNSPEC. ++ (xxspltib_v16qi): New insns to load up constants with the ISA 3.0 ++ XXSPLTIB instruction. ++ (xxspltib__nosplit): Likewise. ++ (xxspltib__split): New insn to load up constants with ++ XXSPLTIB and a sign extend instruction. ++ (vsx_mov): Replace single move that handled all vector types ++ with separate 32-bit and 64-bit moves. Combine the movti_ ++ moves (when -mvsx-timode is in effect) into the main vector ++ moves. Eliminate separate moves for , where the ++ preferred register class () is listed first, and the ++ secondary register class () is listed second with a '?' to ++ discourage use. Prefer loading 0/-1 in any VSX register for ISA ++ 3.0, and Altivec registers for ISA 2.06/2.07 (PR target/70915) so ++ that if the register was involved in a slow operation, the ++ clear/set operation does not wait for the slow operation to ++ finish. Adjust the length attributes for 32-bit mode. Use ++ rs6000_output_move_128bit and drop the use of the string ++ instructions for 32-bit movti when -mvsx-timode is in effect. Use ++ spacing so that the alternatives and attributes don't generate ++ long lines, and put things in columns, so that it is easier to ++ match up the operands and attributes with the insn alternatives. ++ (vsx_mov_64bit): Likewise. ++ (vsx_mov_32bit): Likewise. ++ (vsx_movti_64bit): Fold movti into normal vector moves. ++ (vsx_movti_32bit): Likewise. ++ (vsx_splat_, V4SI/V4SF modes): Add support for ISA 3.0 word ++ splat instructions. ++ (vsx_splat_v4si_internal): Likewise. ++ (vsx_splat_v4sf_internal): Likewise. ++ (vector fusion peepholes): Use VSX_M instead of VSX_M2. ++ (vsx_sign_extend_qi_): New ISA 3.0 instructions to sign ++ extend vector elements. ++ (vsx_sign_extend_hi_): Likewise. ++ (vsx_sign_extend_si_v2di): Likewise. ++ * config/rs6000/rs6000-protos.h (xxspltib_constant_p): Add ++ declaration. ++ * doc/md.texi (PowerPC constraints): Document the wE, wM, and wS ++ constraints. Add trailing period to wL documentation. ++ ++2016-06-08 Jose E. Marchesi ++ ++ Backport from mainline ++ 2016-06-08 Jose E. Marchesi ++ ++ * config/sparc/driver-sparc.c (cpu_names): Fix the entry for the ++ SPARC-M7 and add an entry for SPARC-S7 cpus (Sonoma). ++ ++2016-06-08 Eric Botcazou ++ ++ Backport from mainline ++ 2016-06-06 Jose E. Marchesi ++ ++ * config/sparc/sparc.md (cpu): Add niagara7 cpu type. ++ Include the M7 SPARC DFA scheduler. ++ New attribute v3pipe. ++ Annotate insns with v3pipe where appropriate. ++ Define cpu_feature vis4. ++ Add lzd instruction type and set it on clzdi_sp64 and clzsi_sp64. ++ Add (V8QI "8") to vbits. ++ Add insns {add,sub}v8qi3 ++ Add insns ss{add,sub}v8qi3 ++ Add insns us{add,sub}{v8qi,v4hi}3 ++ Add insns {min,max}{v8qi,v4hi,v2si}3 ++ Add insns {minu,maxu}{v8qi,v4hi,v2si}3 ++ Add insns fpcmp{le,gt,ule,ug,ule,ugt}{8,16,32}_vis. ++ * config/sparc/niagara4.md: Add a comment explaining the ++ discrepancy between the documented latenty numbers and the ++ implemented ones. ++ * config/sparc/niagara7.md: New file. ++ * configure.ac (HAVE_AS_SPARC5_VIS4): Define if the assembler ++ supports SPARC5 and VIS 4.0 instructions. ++ * configure: Regenerate. ++ * config.in: Likewise. ++ * config.gcc: niagara7 is a supported cpu in sparc*-*-* targets. ++ * config/sparc/sol2.h (ASM_CPU32_DEFAUILT_SPEC): Set for ++ TARGET_CPU_niagara7. ++ (ASM_CPU64_DEFAULT_SPEC): Likewise. ++ (CPP_CPU_SPEC): Handle niagara7. ++ (ASM_CPU_SPEC): Likewise. ++ * config/sparc/sparc-opts.h (processor_type): Add ++ PROCESSOR_NIAGARA7. ++ (mvis4): New option. ++ * config/sparc/sparc.h (TARGET_CPU_niagara7): Define. ++ (AS_NIAGARA7_FLAG): Define. ++ (ASM_CPU64_DEFAULT_SPEC): Set for niagara7. ++ (CPP_CPU64_DEFAULT_SPEC): Likewise. ++ (CPP_CPU_SPEC): Handle niagara7. ++ (ASM_CPU_SPEC): Likewise. ++ * config/sparc/sparc.c (niagara7_costs): Define. ++ (sparc_option_override): Handle niagara7 and adjust cache-related ++ parameters with better values for niagara cpus. Also support VIS4. ++ (sparc32_initialize_trampoline): Likewise. ++ (sparc_use_sched_lookahead): Likewise. ++ (sparc_issue_rate): Likewise. ++ (sparc_register_move_cost): Likewise. ++ (dump_target_flag_bits): Support VIS4. ++ (sparc_vis_init_builtins): Likewise. ++ (sparc_builtins): Likewise. ++ * config/sparc/sparc-c.c (sparc_target_macros): Define __VIS__ for ++ VIS4 4.0. ++ * config/sparc/driver-sparc.c (cpu_names): Add SPARC-M7 and ++ UltraSparc M7. ++ * config/sparc/sparc.opt (sparc_processor_type): New value ++ niagara7. ++ * config/sparc/visintrin.h (__attribute__): Prototypes for the ++ VIS4 builtins. ++ * doc/invoke.texi (SPARC Options): Document -mcpu=niagara7 and ++ -mvis4. ++ * doc/extend.texi (SPARC VIS Built-in Functions): Document the ++ VIS4 builtins. ++ ++ 2016-05-30 Jose E. Marchesi ++ ++ * config.gcc (sparc*-*-*): Support cpu_32, cpu_64, tune_32 and ++ tune_64. ++ * doc/install.texi (--with-cpu-32, --with-cpu-64): Document ++ support on SPARC. ++ * config/sparc/linux64.h (OPTION_DEFAULT_SPECS): Add entries for ++ cpu_32, cpu_64, tune_32 and tune_64. ++ * config/sparc/sol2.h (OPTION_DEFAULT_SPECS): Likewise. ++ ++2016-06-08 Ilya Verbin ++ ++ Backport from mainline ++ 2016-05-25 Ilya Verbin ++ ++ * config/i386/i386-builtin-types.def: Add V16SI_FTYPE_V16SF, ++ V8DF_FTYPE_V8DF_ROUND, V16SF_FTYPE_V16SF_ROUND, V16SI_FTYPE_V16SF_ROUND. ++ * config/i386/i386.c (enum ix86_builtins): Add ++ IX86_BUILTIN_CVTPS2DQ512_MASK, IX86_BUILTIN_FLOORPS512, ++ IX86_BUILTIN_FLOORPD512, IX86_BUILTIN_CEILPS512, IX86_BUILTIN_CEILPD512, ++ IX86_BUILTIN_TRUNCPS512, IX86_BUILTIN_TRUNCPD512, ++ IX86_BUILTIN_CVTPS2DQ512, IX86_BUILTIN_VEC_PACK_SFIX512, ++ IX86_BUILTIN_FLOORPS_SFIX512, IX86_BUILTIN_CEILPS_SFIX512, ++ IX86_BUILTIN_ROUNDPS_AZ_SFIX512. ++ (builtin_description bdesc_args): Add __builtin_ia32_floorps512, ++ __builtin_ia32_ceilps512, __builtin_ia32_truncps512, ++ __builtin_ia32_floorpd512, __builtin_ia32_ceilpd512, ++ __builtin_ia32_truncpd512, __builtin_ia32_cvtps2dq512, ++ __builtin_ia32_vec_pack_sfix512, __builtin_ia32_roundps_az_sfix512, ++ __builtin_ia32_floorps_sfix512, __builtin_ia32_ceilps_sfix512. ++ Change IX86_BUILTIN_CVTPS2DQ512 to IX86_BUILTIN_CVTPS2DQ512_MASK for ++ __builtin_ia32_cvtps2dq512_mask. ++ (ix86_expand_args_builtin): Handle V8DF_FTYPE_V8DF_ROUND, ++ V16SF_FTYPE_V16SF_ROUND, V16SI_FTYPE_V16SF_ROUND, V16SI_FTYPE_V16SF. ++ (ix86_builtin_vectorized_function): Handle builtins mentioned above. ++ * config/i386/sse.md ++ (avx512f_fix_notruncv16sfv16si): ++ Rename to ... ++ (avx512f_fix_notruncv16sfv16si): ... this. ++ (avx512f_cvtpd2dq512): Rename ++ to ... ++ (avx512f_cvtpd2dq512): ... this. ++ (avx512f_vec_pack_sfix_v8df): New define_expand. ++ (avx512f_roundpd512): Rename to ... ++ (avx512f_round512): ... this. Change iterator. ++ (avx512f_roundps512_sfix): New define_expand. ++ (round2_sfix): Change iterator. ++ ++2016-06-07 Peter Bergner ++ ++ Backport from mainline ++ 2016-06-07 Peter Bergner ++ ++ * doc/invoke.texi (RS/6000 and PowerPC Options): Document -mhtm and ++ -mno-htm. ++ ++2016-06-07 Uros Bizjak ++ ++ PR target/71389 ++ * config/i386/i386.c (ix86_avx256_split_vector_move_misalign): ++ Copy op1 RTX to avoid invalid sharing. ++ (ix86_expand_vector_move_misalign): Ditto. ++ ++2016-06-06 Jakub Jelinek ++ ++ PR tree-optimization/71259 ++ * tree-vect-slp.c (vect_get_constant_vectors): For ++ VECTOR_BOOLEAN_TYPE_P, return all ones constant instead of ++ one for constant op, and use COND_EXPR for non-constant. ++ ++2016-06-06 Kyrylo Tkachov ++ ++ Backport from trunk ++ 2016-06-02 Kyrylo Tkachov ++ ++ PR target/70830 ++ * config/arm/arm.c (arm_output_multireg_pop): Guard "pop" on update. ++ ++2016-06-05 Uros Bizjak ++ ++ Backport from mainline ++ 2016-06-01 Uros Bizjak ++ Jocelyn Mayer ++ ++ PR target/67310 ++ * config/i386/driver-i386.c (host_detect_local_cpu): Correctly ++ detect processor family for signature_CENTAUR_ebx. ++ : Pass c3, winchip2 or winchip-c6 for ++ signature_CENTAUR_ebx. ++ : Pass c3-2 for signature_CENTAUR_ebx. ++ : Pass x86-64 for has_longmode. ++ ++2016-06-03 Jakub Jelinek ++ ++ PR middle-end/71387 ++ * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): If redirecting ++ to noreturn e->callee->decl that has void return type and void ++ arguments, adjust gimple_call_fntype and remove lhs even if it had ++ previously addressable type. ++ ++2016-06-02 Michael Meissner ++ ++ Back port from trunk ++ 2016-05-26 Michael Meissner ++ ++ * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): New function ++ for ISA 3.0 min/max support. ++ (rs6000_emit_p9_fp_cmove): New function for ISA 3.0 floating point ++ conditional move support. ++ (rs6000_emit_cmove): Call rs6000_emit_p9_fp_minmax and ++ rs6000_emit_p9_fp_cmove if the ISA 3.0 instructions are ++ available. ++ * config/rs6000/rs6000.md (SFDF2): New iterator to allow doing ++ conditional moves where the comparison type is different from move ++ type. ++ (fp_minmax): New code iterator for smin/smax. ++ (minmax): New code attributes for min/max. ++ (SMINMAX): Likewise. ++ (smax3): Combine min, max insns into one insn using the ++ fp_minmax code iterator. Add support for ISA 3.0 min/max ++ instructions that don't need -ffast-math. ++ (s3): Likewise. ++ (smax3_vsx): Likewise. ++ (smin3): Likewise. ++ (s3_vsx): Likewise. ++ (smin3_vsx): Likewise. ++ (pre-VSX min/max splitters): Likewise. ++ (s3_fpr): Likewise. ++ (movsfcc): Rewrite floating point conditional moves to combine ++ SFmode/DFmode into a single insn. ++ (movcc): Likewise. ++ (movdfcc): Likewise. ++ (fselsfsf4): Combine FSEL cases into a single insn, using SFDF and ++ SFDF2 iterators to handle all combinations. ++ (fseldfsf4): Likewise. ++ (fsel4): Likewise. ++ (fseldfdf4): Likewise. ++ (fselsfdf4): Likewise. ++ (movcc_p9): Add support for the ISA 3.0 ++ comparison instructions that set a 0/-1 mask, and use it for ++ floating point conditional move via XXSEL. ++ (fpmask): Likewise. ++ (xxsel): Likewise. ++ * config/rs6000/predicates.md (min_max_operator): Delete, no ++ longer used. ++ (fpmask_comparison_operaton): New insn for ISA 3.0 comparison ++ instructions that generate a 0/-1 mask for use with XXSEL. ++ * config/rs6000/rs6000.h (TARGET_MINMAX_SF): New helper macros to ++ say whether floating point min/max is available, either through ++ FSEL, ISA 2.06 min/max, and ISA 3.0 min/max instrucitons. ++ (TARGET_MINMAX_DF): Likewise. ++ ++ Back port from trunk ++ 2016-05-18 Michael Meissner ++ ++ * config/rs6000/predicate.md (all_ones_constant): New predicate ++ for vector constant with all 1's set. ++ ++2016-06-02 Kelvin Nilsen ++ ++ Back port from trunk ++ 2016-05-19 Kelvin Nilsen ++ ++ * config/rs6000/altivec.md (UNSPEC_DARN): New unspec constant. ++ (UNSPEC_DARN_32): New unspec constant. ++ (UNSPEC_DARN_RAW): New unspec constant. ++ (darn_32): New instruction. ++ (darn_raw): New instruction. ++ (darn): New instruction. ++ * config/rs6000/rs6000-builtin.def (RS6000_BUILTIN_0): Add ++ support and documentation for this macro. ++ (BU_P9_MISC_1): New macro definition. ++ (BU_P9_64BIT_MISC_0): New macro definition. ++ (BU_P9_MISC_0): New macro definition. ++ (darn_32): New builtin definition. ++ (darn_raw): New builtin definition. ++ (darn): New builtin definition. ++ * config/rs6000/rs6000.c: Add #define RS6000_BUILTIN_0 and #undef ++ RS6000_BUILTIN_0 directives to surround each occurrence of ++ #include "rs6000-builtin.def". ++ (rs6000_builtin_mask_calculate): Add in the RS6000_BTM_MODULO and ++ RS6000_BTM_64BIT flags to the returned mask, depending on ++ configuration. ++ (def_builtin): Correct an error in the assignments made to the ++ debugging variable attr_string. ++ (rs6000_expand_builtin): Add support for no-operand built-in ++ functions. ++ (builtin_function_type): Remove fatal_error assertion that is no ++ longer valid. ++ (rs6000_common_init_builtins): Add support for no-operand built-in ++ functions. ++ * config/rs6000/rs6000.h (RS6000_BTM_MODULO): New macro ++ definition. ++ (RS6000_BTM_PURE): Enhance comment to clarify intent of this flag ++ definition. ++ (RS6000_BTM_64BIT): New macro definition. ++ * doc/extend.texi: Document __builtin_darn (void), ++ __builtin_darn_raw (void), and __builtin_darn_32 (void) built-in ++ functions. ++ ++2016-06-01 Michael Meissner ++ ++ Back port from trunk ++ 2016-05-23 Michael Meissner ++ ++ PR target/71201 ++ * config/rs6000/altivec.md (altivec_vperm__internal): Drop ++ ISA 3.0 xxperm fusion alternative. ++ (altivec_vperm_v8hiv16qi): Likewise. ++ (altivec_vperm__uns_internal): Likewise. ++ (vperm_v8hiv4si): Likewise. ++ (vperm_v16qiv8hi): Likewise. ++ ++ Back port from trunk ++ 2016-05-23 Michael Meissner ++ Kelvin Nilsen ++ ++ * config/rs6000/rs6000.c (rs6000_expand_vector_set): Generate ++ vpermr/xxpermr on ISA 3.0. ++ (altivec_expand_vec_perm_le): Likewise. ++ * config/rs6000/altivec.md (UNSPEC_VPERMR): New unspec. ++ (altivec_vpermr__internal): Add VPERMR/XXPERMR support for ++ ISA 3.0. ++ ++ Back port from trunk ++ 2016-05-24 Michael Meissner ++ ++ * config/rs6000/altivec.md (VParity): New mode iterator for vector ++ parity built-in functions. ++ (p9v_ctz2): Add support for ISA 3.0 vector count trailing ++ zeros. ++ (p9v_parity2): Likewise. ++ * config/rs6000/vector.md (VEC_IP): New mode iterator for vector ++ parity. ++ (ctz2): ISA 3.0 expander for vector count trailing zeros. ++ (parity2): ISA 3.0 expander for vector parity. ++ * config/rs6000/rs6000-builtin.def (BU_P9_MISC_1): New macros for ++ power9 built-ins. ++ (BU_P9_64BIT_MISC_0): Likewise. ++ (BU_P9_MISC_0): Likewise. ++ (BU_P9V_AV_1): Likewise. ++ (BU_P9V_AV_2): Likewise. ++ (BU_P9V_AV_3): Likewise. ++ (BU_P9V_AV_P): Likewise. ++ (BU_P9V_VSX_1): Likewise. ++ (BU_P9V_OVERLOAD_1): Likewise. ++ (BU_P9V_OVERLOAD_2): Likewise. ++ (BU_P9V_OVERLOAD_3): Likewise. ++ (VCTZB): Add vector count trailing zeros support. ++ (VCTZH): Likewise. ++ (VCTZW): Likewise. ++ (VCTZD): Likewise. ++ (VPRTYBD): Add vector parity support. ++ (VPRTYBQ): Likewise. ++ (VPRTYBW): Likewise. ++ (VCTZ): Add overloaded vector count trailing zeros support. ++ (VPRTYB): Add overloaded vector parity support. ++ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add ++ overloaded vector count trailing zeros and parity instructions. ++ * config/rs6000/rs6000.md (wd mode attribute): Add V1TI and TI for ++ vector parity support. ++ * config/rs6000/altivec.h (vec_vctz): Add ISA 3.0 vector count ++ trailing zeros support. ++ (vec_cntlz): Likewise. ++ (vec_vctzb): Likewise. ++ (vec_vctzd): Likewise. ++ (vec_vctzh): Likewise. ++ (vec_vctzw): Likewise. ++ (vec_vprtyb): Add ISA 3.0 vector parity support. ++ (vec_vprtybd): Likewise. ++ (vec_vprtybw): Likewise. ++ (vec_vprtybq): Likewise. ++ * doc/extend.texi (PowerPC AltiVec Built-in Functions): Document ++ the ISA 3.0 vector count trailing zeros and vector parity built-in ++ functions. ++ ++ Back port from trunk ++ 2016-05-24 Michael Meissner ++ ++ * config/rs6000/altivec.md (VNEG iterator): New iterator for ++ VNEGW/VNEGD instructions. ++ (p9_neg2): New insns for ISA 3.0 VNEGW/VNEGD. ++ (neg2): Add expander for V2DImode added in ISA 2.07, and ++ support for ISA 3.0 VNEGW/VNEGD instructions. ++ ++ Back port from trunk ++ 2016-05-11 Michael Meissner ++ ++ * config/rs6000/predicates.md (quad_memory_operand): Move most of ++ the code into quad_address_p and call it to share code with ++ vsx_quad_dform_memory_operand. ++ (vsx_quad_dform_memory_operand): New predicate for ISA 3.0 vector ++ d-form support. ++ * config/rs6000/rs6000.opt (-mlra): Switch to being an option mask ++ bit instead of being a separate word. Split -mpower9-dform into ++ two switches, -mpower9-dform-scalar and -mpower9-dform-vector. ++ * config/rs6000/rs6000.c (RELOAD_REG_QUAD_OFFSET): New addr_mask ++ for the register class supporting 128-bit quad word memory offsets. ++ (mode_supports_vsx_dform_quad): Helper function to return if the ++ register class uses quad word memory offsets. ++ (rs6000_debug_addr_mask): Add support for quad word memory offsets. ++ (rs6000_debug_reg_global): Always print if we are using LRA or not. ++ (rs6000_setup_reg_addr_masks): If ISA 3.0 vector d-form ++ instructions are enabled, set up the appropriate addr_masks for ++ 128-bit types. ++ (rs6000_init_hard_regno_mode_ok): wb constraint is now based on ++ -mpower9-dform-scalar, instead of -mpower9-dform. ++ (rs6000_option_override_internal): Split -mpower9-dform into two ++ switches, -mpower9-dform-scalar and -mpower9-dform-vector. The ++ -mpower9-dform switch sets or clears both. If we are not using ++ the LRA register allocator, do not enable -mpower9-dform-vector by ++ default. If we are using LRA, enable -mpower9-dform-vector and ++ -mvsx-timode if it is appropriate. Issue a warning if either ++ -mpower9-dform-vector or -mvsx-timode are explicitly used without ++ enabling LRA. ++ (quad_address_offset_p): New helper function to return if the ++ offset is legal for quad word memory instructions. ++ (quad_address_p): New function to determin if GPR or vector ++ register quad word memory addresses are legal. ++ (mem_operand_gpr): Validate quad word address offsets. ++ (reg_offset_addressing_ok_p): Add support for ISA 3.0 vector ++ d-form (register + offset) instructions. ++ (offsettable_ok_by_alignment): Likewise. ++ (rs6000_legitimate_offset_address_p): Likewise. ++ (legitimate_lo_sum_address_p): Likewise. ++ (rs6000_legitimize_address): Likewise. ++ (rs6000_legitimize_reload_address): Add more debug statements for ++ -mdebug=addr. ++ (rs6000_legitimate_address_p): Add support for ISA 3.0 vector ++ d-form instructions. ++ (rs6000_secondary_reload_memory): Add support for ISA 3.0 vector ++ d-form instructions. Distinguish different cases in debug ++ output. (rs6000_secondary_reload_inner): Add support for ISA 3.0 vector ++ d-form instructions. ++ (rs6000_preferred_reload_class): Likewise. ++ (rs6000_output_move_128bit): Add support for ISA 3.0 d-form ++ instructions. If ISA 3.0 is available, generate lxvx/stxvx instead ++ of the ISA 2.06 indexed memory instructions. ++ (rs6000_emit_prologue): If we have ISA 3.0 d-form instructions, ++ use them to save/restore the saved vector registers instead of ++ using Altivec instructions. ++ (rs6000_emit_epilogue): Likewise. ++ (rs6000_lra_p): Use TARGET_LRA instead of the old option word. ++ (rs6000_opt_masks): Split -mpower9-dform into ++ -mpower9-dform-scalar and -mpower9-dform-vector. ++ (rs6000_print_options_internal): Print -mno- if ++ was not selected. ++ * config/rs6000/vsx.md (p9_vecload_): Delete hack to emit ++ ISA 3.0 vector indexed memory instructions, and fold the code into ++ the normal mov patterns. ++ (p9_vecstore_): Likewise. ++ (vsx_mov): Add support for ISA 3.0 vector d-form ++ instructions. ++ (vsx_movti_64bit): Likewise. ++ (vsx_movti_32bit): Likewise. ++ * config/rs6000/constraints.md (wO constraint): New constraint for ++ ISA 3.0 vector d-form support. ++ * config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Use ++ -mpower9-dform-scalar instead of -mpower9-dform. Add note not to ++ include -mpower9-dform-vector until we switch over to LRA. ++ (POWERPC_MASKS): Add -mlra. Split -mpower9-dform into two. ++ switches, -mpower9-dform-scalar and -mpower9-dform-vector. ++ * config/rs6000/rs6000-protos.h (quad_address_p): Add declaration. ++ * doc/invoke.texi (RS/6000 and PowerPC Options): Add documentation ++ for -mpower9-dform and -mlra. ++ * doc/md.texi (wO constraint): Document wO constraint. ++ ++2016-06-01 Eric Botcazou ++ ++ * tree-vect-loop.c (vect_determine_vectorization_factor): Also compute ++ the factor for live Phi nodes. ++ ++2016-06-01 Jakub Jelinek ++ ++ PR middle-end/71371 ++ * gimplify.c (gimplify_omp_for): Temporarily clear gimplify_omp_ctxp ++ around creation of the temporary. ++ ++2016-06-01 Eric Botcazou ++ ++ * tree-vect-loop.c (vect_determine_vectorization_factor): Also take ++ into account live statements for mask producers. ++ ++2016-05-31 Richard Biener ++ ++ Backport from mainline ++ 2016-05-11 Richard Biener ++ ++ PR debug/71057 ++ * dwarf2out.c (retry_incomplete_types): Set early_dwarf. ++ (dwarf2out_finish): Move retry_incomplete_types call ... ++ (dwarf2out_early_finish): ... here. ++ ++2016-05-31 Kyrylo Tkachov ++ ++ PR target/71056 ++ * config/arm/arm-builtins.c (arm_builtin_vectorized_function): Return ++ NULL_TREE early if NEON is not available. Remove now redundant check ++ in ARM_CHECK_BUILTIN_MODE. ++ ++2016-05-31 Tom de Vries ++ ++ backport: ++ 2016-05-31 Tom de Vries ++ ++ PR tree-optimization/69068 ++ * graphite-isl-ast-to-gimple.c (copy_bb_and_scalar_dependences): Handle ++ phis with more than two args. ++ ++2016-05-30 Andreas Tobler ++ ++ Backport from mainline ++ 2016-05-30 Andreas Tobler ++ ++ * config.gcc: Move hard float support for arm*hf*-*-freebsd* into ++ armv6*-*-freebsd* for FreeBSD 11. Eliminate the arm*hf*-*-freebsd* ++ target. ++ ++2016-05-30 Bill Schmidt ++ ++ Backport from mainline ++ 2016-04-29 Bill Schmidt ++ ++ * config/rs6000/altivec.h: Change definitions of vec_xl and ++ vec_xst. ++ * config/rs6000/rs6000-builtin.def (LD_ELEMREV_V2DF): New. ++ (LD_ELEMREV_V2DI): New. ++ (LD_ELEMREV_V4SF): New. ++ (LD_ELEMREV_V4SI): New. ++ (LD_ELEMREV_V8HI): New. ++ (LD_ELEMREV_V16QI): New. ++ (ST_ELEMREV_V2DF): New. ++ (ST_ELEMREV_V2DI): New. ++ (ST_ELEMREV_V4SF): New. ++ (ST_ELEMREV_V4SI): New. ++ (ST_ELEMREV_V8HI): New. ++ (ST_ELEMREV_V16QI): New. ++ (XL): New. ++ (XST): New. ++ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add ++ descriptions for VSX_BUILTIN_VEC_XL and VSX_BUILTIN_VEC_XST. ++ * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Map from ++ TARGET_P9_VECTOR to RS6000_BTM_P9_VECTOR. ++ (altivec_expand_builtin): Add handling for ++ VSX_BUILTIN_ST_ELEMREV_ and VSX_BUILTIN_LD_ELEMREV_. ++ (rs6000_invalid_builtin): Add error-checking for ++ RS6000_BTM_P9_VECTOR. ++ (altivec_init_builtins): Define builtins used to implement vec_xl ++ and vec_xst. ++ (rs6000_builtin_mask_names): Define power9-vector. ++ * config/rs6000/rs6000.h (MASK_P9_VECTOR): Define. ++ (RS6000_BTM_P9_VECTOR): Define. ++ (RS6000_BTM_COMMON): Include RS6000_BTM_P9_VECTOR. ++ * config/rs6000/vsx.md (vsx_ld_elemrev_v2di): New define_insn. ++ (vsx_ld_elemrev_v2df): Likewise. ++ (vsx_ld_elemrev_v4sf): Likewise. ++ (vsx_ld_elemrev_v4si): Likewise. ++ (vsx_ld_elemrev_v8hi): Likewise. ++ (vsx_ld_elemrev_v16qi): Likewise. ++ (vsx_st_elemrev_v2df): Likewise. ++ (vsx_st_elemrev_v2di): Likewise. ++ (vsx_st_elemrev_v4sf): Likewise. ++ (vsx_st_elemrev_v4si): Likewise. ++ (vsx_st_elemrev_v8hi): Likewise. ++ (vsx_st_elemrev_v16qi): Likewise. ++ * doc/extend.texi: Add prototypes for vec_xl and vec_xst. Correct ++ grammar. ++ ++2016-05-30 Richard Biener ++ ++ Backport from mainline ++ 2016-05-11 Richard Biener ++ ++ PR middle-end/71002 ++ * alias.c (reference_alias_ptr_type): Preserve alias-set zero ++ if the langhook insists on it. ++ * fold-const.c (make_bit_field_ref): Add arg for the original ++ reference and preserve its alias-set. ++ (decode_field_reference): Take exp by reference and adjust it ++ to the original memory reference. ++ (optimize_bit_field_compare): Adjust callers. ++ (fold_truth_andor_1): Likewise. ++ ++ 2016-05-13 Jakub Jelinek ++ ++ PR bootstrap/71071 ++ * fold-const.c (fold_checksum_tree): Allow modification ++ of TYPE_ALIAS_SET during folding. ++ ++2016-05-30 Eric Botcazou ++ ++ * config/visium/visium.c (visium_split_double_add): Minor tweaks. ++ (visium_expand_copysign): Use gen_int_mode directly. ++ (visium_compute_frame_size): Minor tweaks. ++ ++2016-05-30 Tom de Vries ++ ++ backport: ++ 2016-05-30 Tom de Vries ++ ++ PR tree-optimization/69067 ++ * graphite-isl-ast-to-gimple.c (get_def_bb_for_const): Remove assert. ++ ++2016-05-27 Eric Botcazou ++ ++ * config/visium/visium-protos.h (split_double_move): Rename into... ++ (visium_split_double_move): ...this. ++ (visium_split_double_add): Declare. ++ * config/visium/visium.c (split_double_move): Rename into... ++ (visium_split_double_move): ...this. ++ (visium_split_double_add): New function. ++ (visium_expand_copysign): Renumber operands for consistency. ++ * config/visium/visium.md (DImode move splitter): Adjust to renaming. ++ (DFmode move splitter): Likewise. ++ (*addi3_insn): Split by means of visium_split_double_add. ++ (*adddi3_insn_flags): Delete. ++ (*plus_plus_sltu): New insn. ++ (*subdi3_insn): Split by means of visium_split_double_add. ++ (subdi3_insn_flags): Delete. ++ (*minus_minus_sltu): New insn. ++ (*negdi2_insn): Split by means of visium_split_double_add. ++ (*negdi2_insn_flags): Delete. ++ ++2016-05-27 Ilya Enkovich ++ ++ Backport from mainline r236810. ++ 2016-05-27 Ilya Enkovich ++ ++ PR middle-end/71279 ++ * fold-const.c (fold_ternary_loc): Don't fold VEC_COND_EXPR ++ into comparison. ++ ++2016-05-25 Eric Botcazou ++ ++ * tree-ssa-phiopt.c (factor_out_conditional_conversion): Remove ++ redundant test and bail out if the type of the new operand is not ++ a GIMPLE register type after stripping a VIEW_CONVERT_EXPR. ++ ++2016-05-24 Martin Sebor ++ ++ PR c++/71147 ++ * tree.h (complete_or_array_type_p): New inline function. ++ ++2016-05-24 Jakub Jelinek ++ ++ * config/i386/i386.h (TARGET_AVOID_4BYTE_PREFIXES): Define. ++ * config/i386/constraints.md (Yr): Test TARGET_AVOID_4BYTE_PREFIXES ++ rather than X86_TUNE_AVOID_4BYTE_PREFIXES. Use SSE_REGS instead ++ of ALL_SSE_REGS. Return SSE_REGS also when TARGET_AVX. ++ ++2016-05-24 Jakub Jelinek ++ ++ PR c++/71257 ++ * tree-vect-stmts.c (vectorizable_simd_clone_call): Handle ++ SIMD_CLONE_ARG_TYPE_LINEAR_REF_CONSTANT_STEP like ++ SIMD_CLONE_ARG_TYPE_LINEAR_CONSTANT_STEP. Add ++ SIMD_CLONE_ARG_TYPE_LINEAR_VAL_CONSTANT_STEP and ++ SIMD_CLONE_ARG_TYPE_LINEAR_UVAL_CONSTANT_STEP cases explicitly. ++ ++2016-05-23 Martin Jambor ++ ++ * hsa-gen.c (gen_hsa_insns_for_switch_stmt): Create an empty ++ default block if a PHI node in the original one would be resized. ++ ++2016-05-23 Martin Jambor ++ ++ PR tree-optimization/70884 ++ * tree-sra.c (initialize_constant_pool_replacements): Do not check ++ should_scalarize_away_bitmap and cannot_scalarize_away_bitmap bits. ++ (sort_and_splice_var_accesses): Do not consider multiple scalar reads ++ of constant pool data as a reason for scalarization. ++ ++2016-05-20 Eric Botcazou ++ ++ * config/arm/arm.c (arm_expand_prologue): Set the stack usage to 0 ++ for naked functions. ++ (thumb1_expand_prologue): Likewise. ++ ++2016-05-20 Jakub Jelinek ++ ++ PR c++/71210 ++ * gimple-fold.c (gimple_fold_call): Do not remove lhs of noreturn ++ calls if the LHS is variable length or has addressable type. ++ If targets[0]->decl is a noreturn call with void return type and ++ zero arguments, adjust fntype and remove lhs in that case. ++ ++2016-05-20 Uros Bizjak ++ ++ * sched-deps.c (sched_analyze_2) : Also ++ force pending loads from memory. ++ ++2016-05-19 Marek Polacek ++ ++ Backport from mainline ++ 2016-05-19 Marek Polacek ++ ++ PR tree-optimization/71031 ++ * tree-vrp.c (extract_range_from_binary_expr_1): Turn assert into a ++ condition and adjust the code a bit. ++ ++2016-05-19 Martin Jambor ++ ++ PR ipa/70646 ++ * ipa-prop.c (determine_locally_known_aggregate_parts): Bail out early ++ if parameter PARAM_IPA_MAX_AGG_ITEMS is zero. ++ ++2016-05-19 Martin Jambor ++ ++ PR ipa/70646 ++ * ipa-inline.h (condition): New field size. ++ * ipa-inline-analysis.c (add_condition): New parameter SIZE, use it ++ for comaprison and store it into the new condition. ++ (evaluate_conditions_for_known_args): Use condition size to check ++ access sizes for all but CHANGED conditions. ++ (unmodified_parm_1): New parameter size_p, store access size into it. ++ (unmodified_parm): Likewise. ++ (unmodified_parm_or_parm_agg_item): Likewise. ++ (eliminated_by_inlining_prob): Pass NULL to unmodified_parm as size_p. ++ (set_cond_stmt_execution_predicate): Extract access sizes and store ++ them to conditions. ++ (set_switch_stmt_execution_predicate): Likewise. ++ (will_be_nonconstant_expr_predicate): Likewise. ++ (will_be_nonconstant_predicate): Likewise. ++ (inline_read_section): Stream condition size. ++ (inline_write_summary): Likewise. ++ * lto-streamer.h (LTO_minor_version): Bump. ++ ++2016-05-18 Martin Liska ++ ++ Backport from mainline ++ 2016-05-18 Martin Liska ++ ++ PR fortran/70856 ++ * ipa-icf.c (sem_variable::merge): Set DECL_PT_UID for ++ merged variables. ++ ++2016-05-18 Jakub Jelinek ++ ++ PR c++/71100 ++ * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Don't drop ++ lhs if it has TREE_ADDRESSABLE type. ++ ++2016-05-18 Uros Bizjak ++ ++ PR target/71145 ++ * config/alpha/alpha.md (trap): Add (use (reg:DI 29)). ++ (*exception_receiver_1): Return "#" for TARGET_EXPLICIT_RELOCS. ++ ++2016-05-17 Thomas Schwinge ++ ++ Backport trunk r235748: ++ PR target/70860 ++ * config/nvptx/nvptx.c (nvptx_libcall_value): Handle NULL cfun. ++ (nvptx_function_value): Assert non-NULL cfun. ++ ++2016-05-17 Kyrylo Tkachov ++ ++ Backport from mainline ++ 2016-05-17 Kyrylo Tkachov ++ ++ PR target/70809 ++ * config/aarch64/aarch64-simd.md (aarch64_vmls): Delete. ++ ++2016-05-16 Martin Jambor ++ ++ * hsa-gen.c (fillup_for_decl): Increase alignment to natural one. ++ (get_symbol_for_decl): Sorry if a global symbol in under-aligned. ++ ++2016-05-16 Martin Jambor ++ ++ PR hsa/70857 ++ * omp-low.c (grid_expand_target_grid_body): Copy RESULT_DECL of ++ the outlined kernel function. ++ ++2016-05-16 James Norris ++ ++ Backport from mainline r236098. ++ 2016-05-10 James Norris ++ ++ PR driver/68463 ++ * config/rs6000/sysv4.h (CRTOFFLOADBEGIN): Define. Add crtoffloadbegin.o ++ if offloading is enabled and -fopenacc or -fopenmp is specified. ++ (CRTOFFLOADEND): Likewise. ++ (STARTFILE_LINUX_SPEC): Add CRTOFFLOADBEGIN. ++ (ENDFILE_LINUX_SPEC): Add CRTOFFLOADEND. ++ ++2016-05-16 Alan Modra ++ ++ Apply from mainline ++ 2016-05-10 Alan Modra ++ PR target/70947 ++ * config/rs6000/rs6000.c (rs6000_expand_split_stack_prologue): Stop ++ regrename modifying insns saving lr before __morestack call. ++ * config/rs6000/rs6000.md (split_stack_return): Similarly for ++ insns restoring lr after __morestack call. ++ ++2016-05-13 Richard Biener ++ ++ Backport from mainline ++ 2016-04-27 Richard Biener ++ ++ PR ipa/70760 ++ * tree-ssa-structalias.c (find_func_aliases_for_call): Use ++ aggregate_value_p to determine if a function result is ++ returned by reference. ++ ++ 2016-05-06 Richard Biener ++ ++ PR middle-end/70931 ++ * dwarf2out.c (native_encode_initializer): Skip zero-sized fields. ++ ++ 2016-05-06 Richard Biener ++ ++ PR middle-end/70941 ++ * fold-const.c (split_tree): Always convert to the original type ++ before negating. ++ ++2016-05-12 Martin Liska ++ ++ Backport from mainline ++ 2016-05-10 Martin Liska ++ ++ * tree-inline.c (remap_dependence_clique): Do not remap ++ debugging statements. ++ ++2016-05-12 Ilya Enkovich ++ ++ Backport from mainline r236171. ++ 2016-05-12 Ilya Enkovich ++ ++ PR tree-optimization/71006 ++ * tree-vect-loop.c (vect_determine_vectorization_factor): Don't ++ consider COND_EXPR as a mask producer. ++ ++2016-05-12 Kyrylo Tkachov ++ ++ Backport from mainline ++ 2016-05-12 Kyrylo Tkachov ++ ++ PR target/70830 ++ * config/arm/arm.c (arm_output_multireg_pop): Avoid POP instruction ++ when popping the PC and within an interrupt handler routine. ++ Add missing tab to output of "ldmfd". ++ (output_return_instruction): Output LDMFD with SP update rather ++ than POP when returning from interrupt handler. ++ ++2016-05-11 Ilya Enkovich ++ ++ Backport from mainline r236088. ++ 2016-05-10 Ilya Enkovich ++ ++ PR middle-end/70877 ++ * tree-chkp.c (chkp_add_bounds_to_call_stmt): Handle ++ calls with type casted fndecl. ++ ++2016-05-11 Ilya Enkovich ++ ++ Backport from mainline r236086. ++ 2016-05-10 Ilya Enkovich ++ ++ PR tree-optimization/70876 ++ * tree-chkp.c (chkp_find_bounds_1): Support WITH_SIZE_EXPR. ++ * gcc/calls.c (initialize_argument_information): Bind bounds ++ with corresponding args passed by reference. ++ ++2016-05-10 Bill Schmidt ++ ++ Backport from mainline ++ 2016-05-10 Bill Schmidt ++ ++ PR target/70963 ++ * config/rs6000/vsx.md (vsx_xvcvdpsxds_scale): Generate correct ++ code for a zero scale factor. ++ (vsx_xvcvdpuxds_scale): Likewise. ++ ++2016-05-10 Jakub Jelinek ++ ++ Backported from mainline ++ 2016-05-03 Jakub Jelinek ++ ++ PR tree-optimization/70916 ++ * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Give up ++ if COND_EXPR rhs1 is neither SSA_NAME nor COMPARISON_CLASS_P. ++ ++2016-05-10 Yuri Rumyantsev ++ ++ Backport from mainline r235962. ++ 2016-05-06 Yuri Rumyantsev ++ ++ PR debug/70935 ++ * tree-ssa-loop-unswitch.c (find_loop_guard): Reject guard edge with ++ loop latch destination. ++ ++2016-05-10 Andreas Krebbel ++ ++ Backport from mainline ++ 2016-05-10 Andreas Krebbel ++ ++ * config/s390/s390.md ("*vec_cmpdf_cconly") ++ ("*fixuns_truncdfdi2_z13") ++ ("*fixuns_trunc2_z196") ++ ("*fix_truncdfdi2_bfp_z13", "*floatunsdidf2_z13") ++ ("*extendsfdf2_z13"): Replace TARGET_Z13 with TARGET_VX. ++ ++2016-05-10 Sebastian Huber ++ ++ Backport from mainline ++ 2016-04-27 Sebastian Huber ++ ++ * config/rtems.h (LIB_SPEC): Add -latomic. ++ ++2016-05-10 Sebastian Huber ++ ++ Backport from mainline ++ 2016-04-27 Joel Sherrill ++ ++ * config/microblaze/rtems.h: Redefine LINK_SPEC to avoid ++ xilink.ld and flags not relevant to RTEMS. ++ ++2016-05-09 Uros Bizjak ++ ++ * config/i386/i386.md (absneg splitters with general regs): Use ++ general_reg_operand predicate. ++ (btsq peephole2): Use x86_64_immediate_operand to check if new ++ value is suitable for immediate operand. Generate emitted insn ++ using RTL expressions. ++ (btcq peephole2): Ditto. ++ (btrq peephole2): Ditto. Generate correct immediate operand ++ for AND masking. ++ ++2016-05-07 Tom de Vries ++ ++ backport: ++ 2016-05-07 Tom de Vries ++ ++ PR tree-optimization/70956 ++ * graphite-scop-detection.c (build_cross_bb_scalars_def): Handle NULL ++ def. ++ ++2016-05-06 Marek Polacek ++ ++ Backported from mainline ++ 2016-05-06 Marek Polacek ++ ++ PR sanitizer/70875 ++ * ubsan.c (get_ubsan_type_info_for_type): Remove assert. ++ ++2016-05-06 Marek Polacek ++ ++ Backported from mainline ++ 2016-04-29 Marek Polacek ++ Jakub Jelinek ++ ++ PR sanitizer/70342 ++ * fold-const.c (tree_single_nonzero_warnv_p): For TARGET_EXPR, use ++ TARGET_EXPR_SLOT as a base. ++ ++2016-05-04 Eric Botcazou ++ ++ * tree-ssa-coalesce.c (gimple_can_coalesce_p): Fix reference in head ++ comment. ++ (compute_samebase_partition_bases): Fix typo. ++ ++2016-05-03 Pierre-Marie de Rodat ++ ++ * dwarf2out.c (resolve_args_picking_1): Replace the frame_offset ++ occurence with frame_offset_ ones. ++ ++2016-04-28 Jakub Jelinek ++ ++ PR target/70858 ++ * config/i386/i386.c (bdesc_special_args): Add | OPTION_MASK_ISA_64BIT ++ to __builtin_ia32_lwpval64 and __builtin_ia32_lwpins64. ++ (bdesc_args): Add | OPTION_MASK_ISA_64BIT to __builtin_ia32_bextr_u64, ++ __builtin_ia32_bextri_u64, __builtin_ia32_bzhi_di, ++ __builtin_ia32_pdep_di and __builtin_ia32_pext_di. ++ ++2016-04-28 Eric Botcazou ++ ++ Backport from mainline ++ 2016-04-27 Eric Botcazou ++ ++ PR ada/70759 ++ * stor-layout.h (internal_reference_types): Delete. ++ * stor-layout.c (reference_types_internal): Likewise. ++ (internal_reference_types): Likewise. ++ (layout_type) : Adjust. ++ ++2016-04-27 Bill Schmidt ++ ++ Backport from mainline ++ 2016-04-25 Bill Schmidt ++ ++ * config/rs6000/rs6000-builtin.def: Correct pasto error for ++ stxvd2x and stxvw4x built-in functions. ++ ++2016-04-27 H.J. Lu ++ ++ Backported from mainline ++ 2016-04-21 H.J. Lu ++ ++ PR target/70750 ++ * config/i386/predicates.md (call_insn_operand): Replace ++ sibcall_memory_operand with memory_operand. ++ ++2016-04-27 Richard Biener ++ ++ PR ipa/70785 ++ * tree-ssa-structalias.c (refered_from_nonlocal_fn): New ++ function cummulating used_from_other_partition, externally_visible ++ and force_output from aliases. ++ (refered_from_nonlocal_var): Likewise. ++ (ipa_pta_execute): Use call_for_symbol_and_aliases to cummulate ++ node flags properly. ++ ++2016-04-27 Jakub Jelinek ++ ++ Backported from mainline ++ 2016-04-23 Jakub Jelinek ++ ++ PR sanitizer/70712 ++ * cfgexpand.c (expand_stack_vars): Fix typo. ++ ++ 2016-04-19 Jakub Jelinek ++ ++ PR middle-end/70680 ++ * gimplify.c (gimplify_omp_for): Call omp_notice_variable for ++ implicitly linear or lastprivate iterator on the outer context. ++ ++2016-04-27 Kirill Yukhin ++ ++ PR target/70728 ++ * gcc/config/i386/sse.md (define_insn "3"): ++ Extract AVX-512BW constraint from AVX. ++ ++2016-04-27 Jakub Jelinek ++ ++ * BASE-VER: Set to 6.1.1. ++ + 2016-04-27 Release Manager + + * GCC 6.1.0 released. +@@ -49,7 +2066,7 @@ + constant boolean. + + 2016-04-20 Andrew Pinski +- Kyrylo Tkachov ++ Kyrylo Tkachov + + PR target/64971 + * config/aarch64/aarch64.md (sibcall): Force call +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/DATESTAMP gcc-6-20160721/gcc/DATESTAMP +--- gcc-6.1.0/gcc/DATESTAMP 2016-04-27 00:16:13.000000000 +0000 ++++ gcc-6-20160721/gcc/DATESTAMP 2016-07-21 00:16:15.000000000 +0000 +@@ -1 +1 @@ +-20160427 ++20160721 +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/ChangeLog gcc-6-20160721/gcc/ada/ChangeLog +--- gcc-6.1.0/gcc/ada/ChangeLog 2016-04-27 08:20:21.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/ChangeLog 2016-06-13 08:02:10.000000000 +0000 +@@ -1,3 +1,96 @@ ++2016-06-13 Eric Botcazou ++ ++ * gcc-interface/decl.c (gnat_to_gnu_entity) : Deal with ++ PLUS_EXPR in the expression of a renaming. ++ ++2016-06-11 Eric Botcazou ++ ++ * gcc-interface/trans.c (Case_Statement_to_gnu): Deal with characters. ++ ++2016-06-11 Pierre-Marie de Rodat ++ ++ * gcc-interface/decl.c (gnat_to_gnu_entity): Do not clobber ++ gnat_entity_name with temporary names for XUP and XUT types. ++ ++2016-06-06 Eric Botcazou ++ ++ * gcc-interface/utils.c (gnat_internal_attribute_table): Add support ++ for noinline and noclone attributes. ++ (handle_noinline_attribute): New handler. ++ (handle_noclone_attribute): Likewise. ++ ++2016-06-06 Eric Botcazou ++ ++ * gcc-interface/utils2.c (build_call_alloc_dealloc): Do not substitute ++ placeholder expressions here but... ++ * gcc-interface/trans.c (gnat_to_gnu) : ...here. ++ Make an exception to the protection of a CALL_EXPR result with an ++ unconstrained type only in the same cases as Call_to_gnu. ++ ++2016-06-01 Simon Wright ++ ++ PR ada/71358 ++ * g-comlin.adb (Display_Section_Help): Do not dereference ++ Config.Switches if it's null. ++ (Getopt): Likewise. ++ ++2016-05-31 Eric Botcazou ++ ++ * s-osinte-kfreebsd-gnu.ads (clock_getres): Define. ++ (Get_Page_Size): Remove duplicate and return int. ++ ++2016-05-31 Jan Sommer ++ ++ PR ada/71317 ++ * s-osinte-rtems.ads (clock_getres): Define. ++ (Get_Page_Size): Remove duplicate and return int. ++ ++2016-05-06 Eric Botcazou ++ ++ PR ada/70969 ++ * system-darwin-ppc64.ads: Add pragma No_Elaboration_Code_All. ++ * system-linux-armeb.ads: Likewise. ++ * system-linux-mips64el.ads: Likewise. ++ * system-linux-mips.ads: Likewise. ++ * system-linux-mipsel.ads: Likewise. ++ * system-linux-ppc64.ads: Likewise. ++ * system-linux-sparcv9.ads: Likewise. ++ * system-rtems.ads: Likewise. ++ ++2016-05-04 Samuel Thibault ++ ++ * s-osinte-gnu.ads (Get_Page_Size): Return int and use getpagesize ++ instead of __getpagesize. ++ ++2016-04-28 Eric Botcazou ++ ++ PR ada/70900 ++ Backport from mainline ++ 2016-04-18 Ed Schonberg ++ ++ * sem_ch6.adb (Process_Formals): Do not set a delay freeze on ++ a subprogram that returns a class-wide type, if the subprogram ++ is a compilation unit, because otherwise gigi will treat the ++ subprogram as external, leading to link errors. ++ ++2016-05-02 Rainer Orth ++ ++ * gcc-interface/Makefile.in (install-gcc-specs): Use foreach. ++ Honor DESTDIR. ++ ++2016-04-28 Eric Botcazou ++ ++ PR ada/70786 ++ * a-textio.adb (Get_Immediate): Add missing 'not' in expression. ++ ++2016-04-28 Eric Botcazou ++ ++ Backport from mainline ++ 2016-04-27 Eric Botcazou ++ ++ * gcc-interface/misc.c (gnat_init): Do not call ++ internal_reference_types. ++ + 2016-04-27 Release Manager + + * GCC 6.1.0 released. +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/a-textio.adb gcc-6-20160721/gcc/ada/a-textio.adb +--- gcc-6.1.0/gcc/ada/a-textio.adb 2015-10-16 12:43:21.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/a-textio.adb 2016-04-28 10:58:54.000000000 +0000 +@@ -668,7 +668,7 @@ + Available := True; + + Item := +- (if Is_Start_Of_Encoding (Character'Val (ch), File.WC_Method) ++ (if not Is_Start_Of_Encoding (Character'Val (ch), File.WC_Method) + then Character'Val (ch) + else Get_Upper_Half_Char_Immed (Character'Val (ch), File)); + end if; +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/g-comlin.adb gcc-6-20160721/gcc/ada/g-comlin.adb +--- gcc-6.1.0/gcc/ada/g-comlin.adb 2015-11-18 10:31:53.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/g-comlin.adb 2016-06-01 07:44:10.000000000 +0000 +@@ -6,7 +6,7 @@ + -- -- + -- B o d y -- + -- -- +--- Copyright (C) 1999-2015, Free Software Foundation, Inc. -- ++-- Copyright (C) 1999-2016, Free Software Foundation, Inc. -- + -- -- + -- GNAT is free software; you can redistribute it and/or modify it under -- + -- terms of the GNU General Public License as published by the Free Soft- -- +@@ -3151,16 +3151,18 @@ + + New_Line; + +- if Section /= "" then ++ if Section /= "" and then Config.Switches /= null then + Put_Line ("Switches after " & Section); + end if; + + -- Compute size of the switches column + +- for S in Config.Switches'Range loop +- Max_Len := Natural'Max +- (Max_Len, Switch_Name (Config.Switches (S), Section)'Length); +- end loop; ++ if Config.Switches /= null then ++ for S in Config.Switches'Range loop ++ Max_Len := Natural'Max ++ (Max_Len, Switch_Name (Config.Switches (S), Section)'Length); ++ end loop; ++ end if; + + if Config.Aliases /= null then + for A in Config.Aliases'Range loop +@@ -3173,25 +3175,27 @@ + + -- Display the switches + +- for S in Config.Switches'Range loop +- declare +- N : constant String := +- Switch_Name (Config.Switches (S), Section); ++ if Config.Switches /= null then ++ for S in Config.Switches'Range loop ++ declare ++ N : constant String := ++ Switch_Name (Config.Switches (S), Section); + +- begin +- if N /= "" then +- Put (" "); +- Put (N); +- Put ((1 .. Max_Len - N'Length + 1 => ' ')); ++ begin ++ if N /= "" then ++ Put (" "); ++ Put (N); ++ Put ((1 .. Max_Len - N'Length + 1 => ' ')); + +- if Config.Switches (S).Help /= null then +- Put (Config.Switches (S).Help.all); +- end if; ++ if Config.Switches (S).Help /= null then ++ Put (Config.Switches (S).Help.all); ++ end if; + +- New_Line; +- end if; +- end; +- end loop; ++ New_Line; ++ end if; ++ end; ++ end loop; ++ end if; + + -- Display the aliases + +@@ -3454,25 +3458,27 @@ + + -- Initialize output values for automatically handled switches + +- for S in Config.Switches'Range loop +- case Config.Switches (S).Typ is +- when Switch_Untyped => +- null; -- Nothing to do +- +- when Switch_Boolean => +- Config.Switches (S).Boolean_Output.all := +- not Config.Switches (S).Boolean_Value; +- +- when Switch_Integer => +- Config.Switches (S).Integer_Output.all := +- Config.Switches (S).Integer_Initial; +- +- when Switch_String => +- if Config.Switches (S).String_Output.all = null then +- Config.Switches (S).String_Output.all := new String'(""); +- end if; +- end case; +- end loop; ++ if Config.Switches /= null then ++ for S in Config.Switches'Range loop ++ case Config.Switches (S).Typ is ++ when Switch_Untyped => ++ null; -- Nothing to do ++ ++ when Switch_Boolean => ++ Config.Switches (S).Boolean_Output.all := ++ not Config.Switches (S).Boolean_Value; ++ ++ when Switch_Integer => ++ Config.Switches (S).Integer_Output.all := ++ Config.Switches (S).Integer_Initial; ++ ++ when Switch_String => ++ if Config.Switches (S).String_Output.all = null then ++ Config.Switches (S).String_Output.all := new String'(""); ++ end if; ++ end case; ++ end loop; ++ end if; + + -- For all sections, and all switches within those sections + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/gcc-interface/Makefile.in gcc-6-20160721/gcc/ada/gcc-interface/Makefile.in +--- gcc-6.1.0/gcc/ada/gcc-interface/Makefile.in 2016-04-27 07:39:18.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/gcc-interface/Makefile.in 2016-05-02 13:16:33.000000000 +0000 +@@ -2670,10 +2670,9 @@ + install-gcc-specs: + # Install all the requested GCC spec files. + +- for f in $(GCC_SPEC_FILES); do \ +- $(INSTALL_DATA_DATE) $(srcdir)/ada/$$f \ +- $(libsubdir)/$$(echo $$f|sed -e 's#_[a-zA-Z0-9]*##g'); \ +- done ++ $(foreach f,$(GCC_SPEC_FILES), \ ++ $(INSTALL_DATA_DATE) $(srcdir)/ada/$(f) \ ++ $(DESTDIR)$(libsubdir)/$$(echo $(f)|sed -e 's#_[a-zA-Z0-9]*##g');) + + install-gnatlib: ../stamp-gnatlib-$(RTSDIR) install-gcc-specs + $(RMDIR) $(DESTDIR)$(ADA_RTL_OBJ_DIR) +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/gcc-interface/decl.c gcc-6-20160721/gcc/ada/gcc-interface/decl.c +--- gcc-6.1.0/gcc/ada/gcc-interface/decl.c 2016-04-02 08:56:19.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/gcc-interface/decl.c 2016-06-13 08:02:10.000000000 +0000 +@@ -966,6 +966,7 @@ + && !call_is_atomic_load (inner)) + || TREE_CODE (inner) == ADDR_EXPR + || TREE_CODE (inner) == NULL_EXPR ++ || TREE_CODE (inner) == PLUS_EXPR + || TREE_CODE (inner) == CONSTRUCTOR + || CONSTANT_CLASS_P (inner) + /* We need to detect the case where a temporary is created to +@@ -2321,10 +2322,12 @@ + gnat_name = Packed_Array_Impl_Type (gnat_entity); + else + gnat_name = gnat_entity; +- if (gnat_encodings != DWARF_GNAT_ENCODINGS_MINIMAL) +- gnu_entity_name = create_concat_name (gnat_name, "XUP"); +- create_type_decl (gnu_entity_name, gnu_fat_type, artificial_p, +- debug_info_p, gnat_entity); ++ tree xup_name ++ = (gnat_encodings == DWARF_GNAT_ENCODINGS_MINIMAL) ++ ? get_entity_name (gnat_name) ++ : create_concat_name (gnat_name, "XUP"); ++ create_type_decl (xup_name, gnu_fat_type, artificial_p, debug_info_p, ++ gnat_entity); + + /* Create the type to be designated by thin pointers: a record type for + the array and its template. We used to shift the fields to have the +@@ -2334,11 +2337,11 @@ + Note that GDB can handle standard DWARF information for them, so we + don't have to name them as a GNAT encoding, except if specifically + asked to. */ +- if (gnat_encodings != DWARF_GNAT_ENCODINGS_MINIMAL) +- gnu_entity_name = create_concat_name (gnat_name, "XUT"); +- else +- gnu_entity_name = get_entity_name (gnat_name); +- tem = build_unc_object_type (gnu_template_type, tem, gnu_entity_name, ++ tree xut_name ++ = (gnat_encodings == DWARF_GNAT_ENCODINGS_MINIMAL) ++ ? get_entity_name (gnat_name) ++ : create_concat_name (gnat_name, "XUT"); ++ tem = build_unc_object_type (gnu_template_type, tem, xut_name, + debug_info_p); + + SET_TYPE_UNCONSTRAINED_ARRAY (tem, gnu_type); +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/gcc-interface/misc.c gcc-6-20160721/gcc/ada/gcc-interface/misc.c +--- gcc-6.1.0/gcc/ada/gcc-interface/misc.c 2016-02-16 18:01:04.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/gcc-interface/misc.c 2016-04-28 10:49:13.000000000 +0000 +@@ -369,9 +369,6 @@ + sbitsize_one_node = sbitsize_int (1); + sbitsize_unit_node = sbitsize_int (BITS_PER_UNIT); + +- /* Show that REFERENCE_TYPEs are internal and should be Pmode. */ +- internal_reference_types (); +- + /* Register our internal error function. */ + global_dc->internal_error = &internal_error_function; + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/gcc-interface/trans.c gcc-6-20160721/gcc/ada/gcc-interface/trans.c +--- gcc-6.1.0/gcc/ada/gcc-interface/trans.c 2016-03-07 08:46:52.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/gcc-interface/trans.c 2016-06-11 11:55:51.000000000 +0000 +@@ -2483,13 +2483,15 @@ + static tree + Case_Statement_to_gnu (Node_Id gnat_node) + { +- tree gnu_result, gnu_expr, gnu_label; ++ tree gnu_result, gnu_expr, gnu_type, gnu_label; + Node_Id gnat_when; + location_t end_locus; + bool may_fallthru = false; + + gnu_expr = gnat_to_gnu (Expression (gnat_node)); + gnu_expr = convert (get_base_type (TREE_TYPE (gnu_expr)), gnu_expr); ++ gnu_expr = maybe_character_value (gnu_expr); ++ gnu_type = TREE_TYPE (gnu_expr); + + /* We build a SWITCH_EXPR that contains the code with interspersed + CASE_LABEL_EXPRs for each label. */ +@@ -2559,6 +2561,11 @@ + gcc_assert (!gnu_low || TREE_CODE (gnu_low) == INTEGER_CST); + gcc_assert (!gnu_high || TREE_CODE (gnu_high) == INTEGER_CST); + ++ if (gnu_low && TREE_TYPE (gnu_low) != gnu_type) ++ gnu_low = convert (gnu_type, gnu_low); ++ if (gnu_high && TREE_TYPE (gnu_high) != gnu_type) ++ gnu_high = convert (gnu_type, gnu_high); ++ + add_stmt_with_node (build_case_label (gnu_low, gnu_high, label), + gnat_choice); + choices_added_p = true; +@@ -2590,8 +2597,8 @@ + /* Now emit a definition of the label the cases branch to, if any. */ + if (may_fallthru) + add_stmt (build1 (LABEL_EXPR, void_type_node, gnu_label)); +- gnu_result = build3 (SWITCH_EXPR, TREE_TYPE (gnu_expr), gnu_expr, +- end_stmt_group (), NULL_TREE); ++ gnu_result ++ = build3 (SWITCH_EXPR, gnu_type, gnu_expr, end_stmt_group (), NULL_TREE); + + return gnu_result; + } +@@ -7635,10 +7642,11 @@ + else + gnu_actual_obj_type = gnu_obj_type; + ++ tree gnu_size = TYPE_SIZE_UNIT (gnu_actual_obj_type); ++ gnu_size = SUBSTITUTE_PLACEHOLDER_IN_EXPR (gnu_size, gnu_ptr); ++ + gnu_result +- = build_call_alloc_dealloc (gnu_ptr, +- TYPE_SIZE_UNIT (gnu_actual_obj_type), +- gnu_obj_type, ++ = build_call_alloc_dealloc (gnu_ptr, gnu_size, gnu_obj_type, + Procedure_To_Call (gnat_node), + Storage_Pool (gnat_node), + gnat_node); +@@ -7719,16 +7727,22 @@ + N_Raise_Constraint_Error)); + } + +- /* If the result has side-effects and is of an unconstrained type, make a +- SAVE_EXPR so that we can be sure it will only be referenced once. But +- this is useless for a call to a function that returns an unconstrained +- type with default discriminant, as we cannot compute the size of the +- actual returned object. We must do this before any conversions. */ ++ /* If the result has side-effects and is of an unconstrained type, protect ++ the expression in case it will be referenced multiple times, i.e. for ++ its value and to compute the size of an object. But do it neither for ++ an object nor a renaming declaration, nor a return statement of a call ++ to a function that returns an unconstrained record type with default ++ discriminant, because there is no size to be computed in these cases ++ and this will create a useless temporary. We must do this before any ++ conversions. */ + if (TREE_SIDE_EFFECTS (gnu_result) +- && !(TREE_CODE (gnu_result) == CALL_EXPR +- && type_is_padding_self_referential (TREE_TYPE (gnu_result))) + && (TREE_CODE (gnu_result_type) == UNCONSTRAINED_ARRAY_TYPE +- || CONTAINS_PLACEHOLDER_P (TYPE_SIZE (gnu_result_type)))) ++ || CONTAINS_PLACEHOLDER_P (TYPE_SIZE (gnu_result_type))) ++ && !(TREE_CODE (gnu_result) == CALL_EXPR ++ && type_is_padding_self_referential (TREE_TYPE (gnu_result)) ++ && (Nkind (Parent (gnat_node)) == N_Object_Declaration ++ || Nkind (Parent (gnat_node)) == N_Object_Renaming_Declaration ++ || Nkind (Parent (gnat_node)) == N_Simple_Return_Statement))) + gnu_result = gnat_protect_expr (gnu_result); + + /* Now convert the result to the result type, unless we are in one of the +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/gcc-interface/utils.c gcc-6-20160721/gcc/ada/gcc-interface/utils.c +--- gcc-6.1.0/gcc/ada/gcc-interface/utils.c 2016-02-29 15:30:08.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/gcc-interface/utils.c 2016-06-06 09:51:43.000000000 +0000 +@@ -90,6 +90,8 @@ + static tree handle_nonnull_attribute (tree *, tree, tree, int, bool *); + static tree handle_sentinel_attribute (tree *, tree, tree, int, bool *); + static tree handle_noreturn_attribute (tree *, tree, tree, int, bool *); ++static tree handle_noinline_attribute (tree *, tree, tree, int, bool *); ++static tree handle_noclone_attribute (tree *, tree, tree, int, bool *); + static tree handle_leaf_attribute (tree *, tree, tree, int, bool *); + static tree handle_always_inline_attribute (tree *, tree, tree, int, bool *); + static tree handle_malloc_attribute (tree *, tree, tree, int, bool *); +@@ -121,6 +123,10 @@ + false }, + { "noreturn", 0, 0, true, false, false, handle_noreturn_attribute, + false }, ++ { "noinline", 0, 0, true, false, false, handle_noinline_attribute, ++ false }, ++ { "noclone", 0, 0, true, false, false, handle_noclone_attribute, ++ false }, + { "leaf", 0, 0, true, false, false, handle_leaf_attribute, + false }, + { "always_inline",0, 0, true, false, false, handle_always_inline_attribute, +@@ -5971,6 +5977,51 @@ + *no_add_attrs = true; + } + ++ return NULL_TREE; ++} ++ ++/* Handle a "noinline" attribute; arguments as in ++ struct attribute_spec.handler. */ ++ ++static tree ++handle_noinline_attribute (tree *node, tree name, ++ tree ARG_UNUSED (args), ++ int ARG_UNUSED (flags), bool *no_add_attrs) ++{ ++ if (TREE_CODE (*node) == FUNCTION_DECL) ++ { ++ if (lookup_attribute ("always_inline", DECL_ATTRIBUTES (*node))) ++ { ++ warning (OPT_Wattributes, "%qE attribute ignored due to conflict " ++ "with attribute %qs", name, "always_inline"); ++ *no_add_attrs = true; ++ } ++ else ++ DECL_UNINLINABLE (*node) = 1; ++ } ++ else ++ { ++ warning (OPT_Wattributes, "%qE attribute ignored", name); ++ *no_add_attrs = true; ++ } ++ ++ return NULL_TREE; ++} ++ ++/* Handle a "noclone" attribute; arguments as in ++ struct attribute_spec.handler. */ ++ ++static tree ++handle_noclone_attribute (tree *node, tree name, ++ tree ARG_UNUSED (args), ++ int ARG_UNUSED (flags), bool *no_add_attrs) ++{ ++ if (TREE_CODE (*node) != FUNCTION_DECL) ++ { ++ warning (OPT_Wattributes, "%qE attribute ignored", name); ++ *no_add_attrs = true; ++ } ++ + return NULL_TREE; + } + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/gcc-interface/utils2.c gcc-6-20160721/gcc/ada/gcc-interface/utils2.c +--- gcc-6.1.0/gcc/ada/gcc-interface/utils2.c 2016-02-29 09:02:46.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/gcc-interface/utils2.c 2016-06-06 09:43:59.000000000 +0000 +@@ -2266,8 +2266,6 @@ + Entity_Id gnat_proc, Entity_Id gnat_pool, + Node_Id gnat_node) + { +- gnu_size = SUBSTITUTE_PLACEHOLDER_IN_EXPR (gnu_size, gnu_obj); +- + /* Explicit proc to call ? This one is assumed to deal with the type + alignment constraints. */ + if (Present (gnat_proc)) +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/s-osinte-gnu.ads gcc-6-20160721/gcc/ada/s-osinte-gnu.ads +--- gcc-6.1.0/gcc/ada/s-osinte-gnu.ads 2016-04-27 07:39:18.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/s-osinte-gnu.ads 2016-05-04 19:14:17.000000000 +0000 +@@ -344,10 +344,9 @@ + -- returns the stack base of the specified thread. Only call this function + -- when Stack_Base_Available is True. + +- -- From: /usr/include/i386-gnu/bits/shm.h __getpagesize or getpagesize?? +- function Get_Page_Size return size_t; +- function Get_Page_Size return Address; +- pragma Import (C, Get_Page_Size, "__getpagesize"); ++ -- From: /usr/include/i386-gnu/bits/shm.h ++ function Get_Page_Size return int; ++ pragma Import (C, Get_Page_Size, "getpagesize"); + -- Returns the size of a page + + -- From /usr/include/i386-gnu/bits/mman.h +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/s-osinte-kfreebsd-gnu.ads gcc-6-20160721/gcc/ada/s-osinte-kfreebsd-gnu.ads +--- gcc-6.1.0/gcc/ada/s-osinte-kfreebsd-gnu.ads 2015-12-06 15:28:16.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/s-osinte-kfreebsd-gnu.ads 2016-05-31 18:59:45.000000000 +0000 +@@ -7,7 +7,7 @@ + -- S p e c -- + -- -- + -- Copyright (C) 1991-1994, Florida State University -- +--- Copyright (C) 1995-2015, Free Software Foundation, Inc. -- ++-- Copyright (C) 1995-2016, Free Software Foundation, Inc. -- + -- -- + -- GNAT is free software; you can redistribute it and/or modify it under -- + -- terms of the GNU General Public License as published by the Free Soft- -- +@@ -216,6 +216,11 @@ + return int; + pragma Import (C, clock_gettime, "clock_gettime"); + ++ function clock_getres ++ (clock_id : clockid_t; ++ res : access timespec) return int; ++ pragma Import (C, clock_getres, "clock_getres"); ++ + function To_Duration (TS : timespec) return Duration; + pragma Inline (To_Duration); + +@@ -330,8 +335,7 @@ + -- returns the stack base of the specified thread. Only call this function + -- when Stack_Base_Available is True. + +- function Get_Page_Size return size_t; +- function Get_Page_Size return Address; ++ function Get_Page_Size return int; + pragma Import (C, Get_Page_Size, "getpagesize"); + -- Returns the size of a page + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/s-osinte-rtems.ads gcc-6-20160721/gcc/ada/s-osinte-rtems.ads +--- gcc-6.1.0/gcc/ada/s-osinte-rtems.ads 2015-12-02 07:09:41.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/s-osinte-rtems.ads 2016-05-31 18:59:45.000000000 +0000 +@@ -6,7 +6,7 @@ + -- -- + -- S p e c -- + -- -- +--- Copyright (C) 1997-2011 Free Software Foundation, Inc. -- ++-- Copyright (C) 1997-2016 Free Software Foundation, Inc. -- + -- -- + -- GNARL is free software; you can redistribute it and/or modify it under -- + -- terms of the GNU General Public License as published by the Free Soft- -- +@@ -188,6 +188,11 @@ + tp : access timespec) return int; + pragma Import (C, clock_gettime, "clock_gettime"); + ++ function clock_getres ++ (clock_id : clockid_t; ++ res : access timespec) return int; ++ pragma Import (C, clock_getres, "clock_getres"); ++ + function To_Duration (TS : timespec) return Duration; + pragma Inline (To_Duration); + +@@ -291,8 +296,7 @@ + -- These two functions are only needed to share s-taprop.adb with + -- FSU threads. + +- function Get_Page_Size return size_t; +- function Get_Page_Size return Address; ++ function Get_Page_Size return int; + pragma Import (C, Get_Page_Size, "getpagesize"); + -- Returns the size of a page + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/sem_ch6.adb gcc-6-20160721/gcc/ada/sem_ch6.adb +--- gcc-6.1.0/gcc/ada/sem_ch6.adb 2015-11-24 09:22:24.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/sem_ch6.adb 2016-05-02 20:33:47.000000000 +0000 +@@ -10415,10 +10415,12 @@ + Analyze_Return_Type (Related_Nod); + + -- If return type is class-wide, subprogram freezing may be +- -- delayed as well. ++ -- delayed as well, unless the declaration is a compilation unit ++ -- in which case the freeze node would appear too late. + + if Is_Class_Wide_Type (Etype (Current_Scope)) + and then not Is_Thunk (Current_Scope) ++ and then not Is_Compilation_Unit (Current_Scope) + and then Nkind (Unit_Declaration_Node (Current_Scope)) = + N_Subprogram_Declaration + then +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/system-darwin-ppc64.ads gcc-6-20160721/gcc/ada/system-darwin-ppc64.ads +--- gcc-6.1.0/gcc/ada/system-darwin-ppc64.ads 2015-11-23 11:31:24.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/system-darwin-ppc64.ads 2016-05-06 09:11:56.000000000 +0000 +@@ -7,7 +7,7 @@ + -- S p e c -- + -- (Darwin/PPC64 Version) -- + -- -- +--- Copyright (C) 2011-2015, Free Software Foundation, Inc. -- ++-- Copyright (C) 2011-2016, Free Software Foundation, Inc. -- + -- -- + -- This specification is derived from the Ada Reference Manual for use with -- + -- GNAT. The copyright notice above, and the license provisions that follow -- +@@ -40,6 +40,9 @@ + -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada + -- 2005, this is Pure in any case (AI-362). + ++ pragma No_Elaboration_Code_All; ++ -- Allow the use of that restriction in units that WITH this unit ++ + type Name is (SYSTEM_NAME_GNAT); + System_Name : constant Name := SYSTEM_NAME_GNAT; + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/system-linux-armeb.ads gcc-6-20160721/gcc/ada/system-linux-armeb.ads +--- gcc-6.1.0/gcc/ada/system-linux-armeb.ads 2015-11-23 11:31:24.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/system-linux-armeb.ads 2016-05-06 09:11:56.000000000 +0000 +@@ -40,6 +40,9 @@ + -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada + -- 2005, this is Pure in any case (AI-362). + ++ pragma No_Elaboration_Code_All; ++ -- Allow the use of that restriction in units that WITH this unit ++ + type Name is (SYSTEM_NAME_GNAT); + System_Name : constant Name := SYSTEM_NAME_GNAT; + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/system-linux-mips.ads gcc-6-20160721/gcc/ada/system-linux-mips.ads +--- gcc-6.1.0/gcc/ada/system-linux-mips.ads 2015-11-23 11:31:24.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/system-linux-mips.ads 2016-05-06 09:11:56.000000000 +0000 +@@ -7,7 +7,7 @@ + -- S p e c -- + -- (GNU-Linux/MIPS Version) -- + -- -- +--- Copyright (C) 1992-2015, Free Software Foundation, Inc. -- ++-- Copyright (C) 1992-2016, Free Software Foundation, Inc. -- + -- -- + -- This specification is derived from the Ada Reference Manual for use with -- + -- GNAT. The copyright notice above, and the license provisions that follow -- +@@ -40,6 +40,9 @@ + -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada + -- 2005, this is Pure in any case (AI-362). + ++ pragma No_Elaboration_Code_All; ++ -- Allow the use of that restriction in units that WITH this unit ++ + type Name is (SYSTEM_NAME_GNAT); + System_Name : constant Name := SYSTEM_NAME_GNAT; + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/system-linux-mips64el.ads gcc-6-20160721/gcc/ada/system-linux-mips64el.ads +--- gcc-6.1.0/gcc/ada/system-linux-mips64el.ads 2015-11-23 11:31:24.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/system-linux-mips64el.ads 2016-05-06 09:11:56.000000000 +0000 +@@ -7,7 +7,7 @@ + -- S p e c -- + -- (GNU-Linux/MIPS64EL Version) -- + -- -- +--- Copyright (C) 1992-2015, Free Software Foundation, Inc. -- ++-- Copyright (C) 1992-2016, Free Software Foundation, Inc. -- + -- -- + -- This specification is derived from the Ada Reference Manual for use with -- + -- GNAT. The copyright notice above, and the license provisions that follow -- +@@ -40,6 +40,9 @@ + -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada + -- 2005, this is Pure in any case (AI-362). + ++ pragma No_Elaboration_Code_All; ++ -- Allow the use of that restriction in units that WITH this unit ++ + type Name is (SYSTEM_NAME_GNAT); + System_Name : constant Name := SYSTEM_NAME_GNAT; + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/system-linux-mipsel.ads gcc-6-20160721/gcc/ada/system-linux-mipsel.ads +--- gcc-6.1.0/gcc/ada/system-linux-mipsel.ads 2015-11-23 11:31:24.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/system-linux-mipsel.ads 2016-05-06 09:11:56.000000000 +0000 +@@ -7,7 +7,7 @@ + -- S p e c -- + -- (GNU-Linux/MIPSEL Version) -- + -- -- +--- Copyright (C) 1992-2015, Free Software Foundation, Inc. -- ++-- Copyright (C) 1992-2016, Free Software Foundation, Inc. -- + -- -- + -- This specification is derived from the Ada Reference Manual for use with -- + -- GNAT. The copyright notice above, and the license provisions that follow -- +@@ -40,6 +40,9 @@ + -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada + -- 2005, this is Pure in any case (AI-362). + ++ pragma No_Elaboration_Code_All; ++ -- Allow the use of that restriction in units that WITH this unit ++ + type Name is (SYSTEM_NAME_GNAT); + System_Name : constant Name := SYSTEM_NAME_GNAT; + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/system-linux-ppc64.ads gcc-6-20160721/gcc/ada/system-linux-ppc64.ads +--- gcc-6.1.0/gcc/ada/system-linux-ppc64.ads 2015-11-23 11:31:24.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/system-linux-ppc64.ads 2016-05-06 09:11:56.000000000 +0000 +@@ -7,7 +7,7 @@ + -- S p e c -- + -- (GNU-Linux/PPC64 Version) -- + -- -- +--- Copyright (C) 1992-2015, Free Software Foundation, Inc. -- ++-- Copyright (C) 1992-2016, Free Software Foundation, Inc. -- + -- -- + -- This specification is derived from the Ada Reference Manual for use with -- + -- GNAT. The copyright notice above, and the license provisions that follow -- +@@ -40,6 +40,9 @@ + -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada + -- 2005, this is Pure in any case (AI-362). + ++ pragma No_Elaboration_Code_All; ++ -- Allow the use of that restriction in units that WITH this unit ++ + type Name is (SYSTEM_NAME_GNAT); + System_Name : constant Name := SYSTEM_NAME_GNAT; + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/system-linux-sparcv9.ads gcc-6-20160721/gcc/ada/system-linux-sparcv9.ads +--- gcc-6.1.0/gcc/ada/system-linux-sparcv9.ads 2015-11-23 11:31:24.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/system-linux-sparcv9.ads 2016-05-06 09:11:56.000000000 +0000 +@@ -7,7 +7,7 @@ + -- S p e c -- + -- (GNU/Linux-SPARCV9 Version) -- + -- -- +--- Copyright (C) 1992-2015, Free Software Foundation, Inc. -- ++-- Copyright (C) 1992-2016, Free Software Foundation, Inc. -- + -- -- + -- This specification is derived from the Ada Reference Manual for use with -- + -- GNAT. The copyright notice above, and the license provisions that follow -- +@@ -40,6 +40,9 @@ + -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada + -- 2005, this is Pure in any case (AI-362). + ++ pragma No_Elaboration_Code_All; ++ -- Allow the use of that restriction in units that WITH this unit ++ + type Name is (SYSTEM_NAME_GNAT); + System_Name : constant Name := SYSTEM_NAME_GNAT; + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/ada/system-rtems.ads gcc-6-20160721/gcc/ada/system-rtems.ads +--- gcc-6.1.0/gcc/ada/system-rtems.ads 2015-11-23 11:31:24.000000000 +0000 ++++ gcc-6-20160721/gcc/ada/system-rtems.ads 2016-05-06 09:11:56.000000000 +0000 +@@ -7,7 +7,7 @@ + -- S p e c -- + -- (Compiler Version) -- + -- -- +--- Copyright (C) 1992-2015 Free Software Foundation, Inc. -- ++-- Copyright (C) 1992-2016 Free Software Foundation, Inc. -- + -- -- + -- This specification is derived from the Ada Reference Manual for use with -- + -- GNAT. The copyright notice above, and the license provisions that follow -- +@@ -44,6 +44,9 @@ + -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada + -- 2005, this is Pure in any case (AI-362). + ++ pragma No_Elaboration_Code_All; ++ -- Allow the use of that restriction in units that WITH this unit ++ + type Name is (SYSTEM_NAME_GNAT); + System_Name : constant Name := SYSTEM_NAME_GNAT; + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/alias.c gcc-6-20160721/gcc/alias.c +--- gcc-6.1.0/gcc/alias.c 2016-04-04 09:30:16.000000000 +0000 ++++ gcc-6-20160721/gcc/alias.c 2016-05-30 14:00:18.000000000 +0000 +@@ -769,6 +769,10 @@ + tree + reference_alias_ptr_type (tree t) + { ++ /* If the frontend assigns this alias-set zero, preserve that. */ ++ if (lang_hooks.get_alias_set (t) == 0) ++ return ptr_type_node; ++ + tree ptype = reference_alias_ptr_type_1 (&t); + /* If there is a given pointer type for aliasing purposes, return it. */ + if (ptype != NULL_TREE) +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/asan.c gcc-6-20160721/gcc/asan.c +--- gcc-6.1.0/gcc/asan.c 2016-04-08 10:46:13.000000000 +0000 ++++ gcc-6-20160721/gcc/asan.c 2016-07-21 16:18:46.000000000 +0000 +@@ -2159,6 +2159,9 @@ + tree + asan_dynamic_init_call (bool after_p) + { ++ if (shadow_ptr_types[0] == NULL_TREE) ++ asan_init_shadow_ptr_types (); ++ + tree fn = builtin_decl_implicit (after_p + ? BUILT_IN_ASAN_AFTER_DYNAMIC_INIT + : BUILT_IN_ASAN_BEFORE_DYNAMIC_INIT); +@@ -2168,8 +2171,6 @@ + pretty_printer module_name_pp; + pp_string (&module_name_pp, main_input_filename); + +- if (shadow_ptr_types[0] == NULL_TREE) +- asan_init_shadow_ptr_types (); + module_name_cst = asan_pp_string (&module_name_pp); + module_name_cst = fold_convert (const_ptr_type_node, + module_name_cst); +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/c/ChangeLog gcc-6-20160721/gcc/c/ChangeLog +--- gcc-6.1.0/gcc/c/ChangeLog 2016-04-27 08:20:21.000000000 +0000 ++++ gcc-6-20160721/gcc/c/ChangeLog 2016-07-02 10:22:11.000000000 +0000 +@@ -1,3 +1,44 @@ ++2016-07-02 Jakub Jelinek ++ ++ Backported from mainline ++ 2016-06-29 Jakub Jelinek ++ ++ PR c/71685 ++ * c-typeck.c (c_build_qualified_type): Don't clear ++ C_TYPE_INCOMPLETE_VARS for the main variant. ++ ++2016-06-10 Thomas Schwinge ++ ++ PR c/71381 ++ Backport from trunk r237290: ++ * c-parser.c (c_parser_omp_variable_list) : ++ Loosen checking. ++ ++2016-05-30 Jakub Jelinek ++ ++ PR c++/71349 ++ * c-parser.c (c_parser_omp_for): Don't disallow nowait clause ++ when combined with target construct. ++ ++2016-05-19 David Malcolm ++ ++ Backport from trunk r236488. ++ PR c/71171 ++ * c-parser.c (c_parser_generic_selection): Use c_expr::set_error ++ in error-handling. ++ (c_parser_postfix_expression): Likewise. ++ * c-tree.h (c_expr::set_error): New method. ++ * c-typeck.c (parser_build_binary_op): In error-handling, ensure ++ that result's range is initialized. ++ ++2016-04-29 Cesar Philippidis ++ ++ PR middle-end/70626 ++ * c-parser.c (c_parser_oacc_loop): Don't augment mask with ++ OACC_LOOP_CLAUSE_MASK. ++ (c_parser_oacc_kernels_parallel): Update call to ++ c_oacc_split_loop_clauses. ++ + 2016-04-27 Release Manager + + * GCC 6.1.0 released. +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/c/c-parser.c gcc-6-20160721/gcc/c/c-parser.c +--- gcc-6.1.0/gcc/c/c-parser.c 2016-04-15 12:24:18.000000000 +0000 ++++ gcc-6-20160721/gcc/c/c-parser.c 2016-06-10 09:46:04.000000000 +0000 +@@ -7185,7 +7185,7 @@ + + error_expr.original_code = ERROR_MARK; + error_expr.original_type = NULL; +- error_expr.value = error_mark_node; ++ error_expr.set_error (); + matched_assoc.type_location = UNKNOWN_LOCATION; + matched_assoc.type = NULL_TREE; + matched_assoc.expression = error_expr; +@@ -7496,13 +7496,13 @@ + gcc_assert (c_dialect_objc ()); + if (!c_parser_require (parser, CPP_DOT, "expected %<.%>")) + { +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + if (c_parser_next_token_is_not (parser, CPP_NAME)) + { + c_parser_error (parser, "expected identifier"); +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + c_token *component_tok = c_parser_peek_token (parser); +@@ -7516,7 +7516,7 @@ + } + default: + c_parser_error (parser, "expected expression"); +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + break; +@@ -7538,7 +7538,7 @@ + parser->error = true; + c_parser_skip_until_found (parser, CPP_CLOSE_BRACE, NULL); + c_parser_skip_until_found (parser, CPP_CLOSE_PAREN, NULL); +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + stmt = c_begin_stmt_expr (); +@@ -7567,7 +7567,7 @@ + "expected %<)%>"); + if (type_name == NULL) + { +- expr.value = error_mark_node; ++ expr.set_error (); + } + else + expr = c_parser_postfix_expression_after_paren_type (parser, +@@ -7627,7 +7627,7 @@ + c_parser_consume_token (parser); + if (!c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>")) + { +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + e1 = c_parser_expr_no_commas (parser, NULL); +@@ -7636,7 +7636,7 @@ + if (!c_parser_require (parser, CPP_COMMA, "expected %<,%>")) + { + c_parser_skip_until_found (parser, CPP_CLOSE_PAREN, NULL); +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + loc = c_parser_peek_token (parser)->location; +@@ -7646,7 +7646,7 @@ + "expected %<)%>"); + if (t1 == NULL) + { +- expr.value = error_mark_node; ++ expr.set_error (); + } + else + { +@@ -7668,7 +7668,7 @@ + c_parser_consume_token (parser); + if (!c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>")) + { +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + t1 = c_parser_type_name (parser); +@@ -7679,7 +7679,7 @@ + if (parser->error) + { + c_parser_skip_until_found (parser, CPP_CLOSE_PAREN, NULL); +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + +@@ -7768,7 +7768,7 @@ + &cexpr_list, true, + &close_paren_loc)) + { +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + +@@ -7776,7 +7776,7 @@ + { + error_at (loc, "wrong number of arguments to " + "%<__builtin_choose_expr%>"); +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + +@@ -7801,25 +7801,25 @@ + c_parser_consume_token (parser); + if (!c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>")) + { +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + t1 = c_parser_type_name (parser); + if (t1 == NULL) + { +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + if (!c_parser_require (parser, CPP_COMMA, "expected %<,%>")) + { + c_parser_skip_until_found (parser, CPP_CLOSE_PAREN, NULL); +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + t2 = c_parser_type_name (parser); + if (t2 == NULL) + { +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + { +@@ -7831,7 +7831,7 @@ + e2 = groktypename (t2, NULL, NULL); + if (e1 == error_mark_node || e2 == error_mark_node) + { +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + +@@ -7856,14 +7856,14 @@ + &cexpr_list, false, + &close_paren_loc)) + { +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + if (vec_safe_length (cexpr_list) != 2) + { + error_at (loc, "wrong number of arguments to " + "%<__builtin_call_with_static_chain%>"); +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + +@@ -7898,7 +7898,7 @@ + &cexpr_list, false, + &close_paren_loc)) + { +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + +@@ -7906,7 +7906,7 @@ + { + error_at (loc, "wrong number of arguments to " + "%<__builtin_complex%>"); +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + +@@ -7928,7 +7928,7 @@ + { + error_at (loc, "%<__builtin_complex%> operand " + "not of real binary floating-point type"); +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + if (TYPE_MAIN_VARIANT (TREE_TYPE (e1_p->value)) +@@ -7936,7 +7936,7 @@ + { + error_at (loc, + "%<__builtin_complex%> operands of different types"); +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + pedwarn_c90 (loc, OPT_Wpedantic, +@@ -7962,7 +7962,7 @@ + &cexpr_list, false, + &close_paren_loc)) + { +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + +@@ -7985,7 +7985,7 @@ + { + error_at (loc, "wrong number of arguments to " + "%<__builtin_shuffle%>"); +- expr.value = error_mark_node; ++ expr.set_error (); + } + set_c_expr_source_range (&expr, loc, close_paren_loc); + break; +@@ -7995,7 +7995,7 @@ + c_parser_consume_token (parser); + if (!c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>")) + { +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + { +@@ -8012,14 +8012,14 @@ + c_parser_consume_token (parser); + if (!c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>")) + { +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + if (c_parser_next_token_is_not (parser, CPP_NAME)) + { + c_parser_error (parser, "expected identifier"); + c_parser_skip_until_found (parser, CPP_CLOSE_PAREN, NULL); +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + { +@@ -8038,13 +8038,13 @@ + c_parser_consume_token (parser); + if (!c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>")) + { +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + t1 = c_parser_type_name (parser); + if (t1 == NULL) + { +- expr.value = error_mark_node; ++ expr.set_error (); + c_parser_skip_until_found (parser, CPP_CLOSE_PAREN, NULL); + break; + } +@@ -8067,7 +8067,7 @@ + error_at (loc, "-fcilkplus must be enabled to use " + "%<_Cilk_spawn%>"); + expr = c_parser_cast_expression (parser, NULL); +- expr.value = error_mark_node; ++ expr.set_error (); + } + else if (c_parser_peek_token (parser)->keyword == RID_CILK_SPAWN) + { +@@ -8086,7 +8086,7 @@ + break; + default: + c_parser_error (parser, "expected expression"); +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + break; +@@ -8107,7 +8107,7 @@ + /* Else fall through to report error. */ + default: + c_parser_error (parser, "expected expression"); +- expr.value = error_mark_node; ++ expr.set_error (); + break; + } + return c_parser_postfix_expression_after_primary +@@ -8325,7 +8325,7 @@ + else + { + c_parser_error (parser, "expected identifier"); +- expr.value = error_mark_node; ++ expr.set_error (); + expr.original_code = ERROR_MARK; + expr.original_type = NULL; + return expr; +@@ -8357,7 +8357,7 @@ + else + { + c_parser_error (parser, "expected identifier"); +- expr.value = error_mark_node; ++ expr.set_error (); + expr.original_code = ERROR_MARK; + expr.original_type = NULL; + return expr; +@@ -10595,6 +10595,8 @@ + switch (kind) + { + case OMP_CLAUSE__CACHE_: ++ /* The OpenACC cache directive explicitly only allows "array ++ elements or subarrays". */ + if (c_parser_peek_token (parser)->type != CPP_OPEN_SQUARE) + { + c_parser_error (parser, "expected %<[%>"); +@@ -10657,25 +10659,6 @@ + break; + } + +- if (kind == OMP_CLAUSE__CACHE_) +- { +- if (TREE_CODE (low_bound) != INTEGER_CST +- && !TREE_READONLY (low_bound)) +- { +- error_at (clause_loc, +- "%qD is not a constant", low_bound); +- t = error_mark_node; +- } +- +- if (TREE_CODE (length) != INTEGER_CST +- && !TREE_READONLY (length)) +- { +- error_at (clause_loc, +- "%qD is not a constant", length); +- t = error_mark_node; +- } +- } +- + t = tree_cons (low_bound, length, t); + } + break; +@@ -13822,6 +13805,8 @@ + c_parser_oacc_loop (location_t loc, c_parser *parser, char *p_name, + omp_clause_mask mask, tree *cclauses, bool *if_p) + { ++ bool is_parallel = ((mask >> PRAGMA_OACC_CLAUSE_REDUCTION) & 1) == 1; ++ + strcat (p_name, " loop"); + mask |= OACC_LOOP_CLAUSE_MASK; + +@@ -13829,7 +13814,7 @@ + cclauses == NULL); + if (cclauses) + { +- clauses = c_oacc_split_loop_clauses (clauses, cclauses); ++ clauses = c_oacc_split_loop_clauses (clauses, cclauses, is_parallel); + if (*cclauses) + *cclauses = c_finish_omp_clauses (*cclauses, false); + if (clauses) +@@ -13924,8 +13909,6 @@ + if (strcmp (p, "loop") == 0) + { + c_parser_consume_token (parser); +- mask |= OACC_LOOP_CLAUSE_MASK; +- + tree block = c_begin_omp_parallel (); + tree clauses; + c_parser_oacc_loop (loc, parser, p_name, mask, &clauses, if_p); +@@ -15094,7 +15077,9 @@ + + strcat (p_name, " for"); + mask |= OMP_FOR_CLAUSE_MASK; +- if (cclauses) ++ /* parallel for{, simd} disallows nowait clause, but for ++ target {teams distribute ,}parallel for{, simd} it should be accepted. */ ++ if (cclauses && (mask & (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_MAP)) == 0) + mask &= ~(OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_NOWAIT); + /* Composite distribute parallel for{, simd} disallows ordered clause. */ + if ((mask & (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_DIST_SCHEDULE)) != 0) +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/c/c-tree.h gcc-6-20160721/gcc/c/c-tree.h +--- gcc-6.1.0/gcc/c/c-tree.h 2016-04-13 16:00:52.000000000 +0000 ++++ gcc-6-20160721/gcc/c/c-tree.h 2016-05-19 20:33:51.000000000 +0000 +@@ -143,6 +143,15 @@ + of this expression. */ + location_t get_start () const { return src_range.m_start; } + location_t get_finish () const { return src_range.m_finish; } ++ ++ /* Set the value to error_mark_node whilst ensuring that src_range ++ is initialized. */ ++ void set_error () ++ { ++ value = error_mark_node; ++ src_range.m_start = UNKNOWN_LOCATION; ++ src_range.m_finish = UNKNOWN_LOCATION; ++ } + }; + + /* Type alias for struct c_expr. This allows to use the structure +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/c/c-typeck.c gcc-6-20160721/gcc/c/c-typeck.c +--- gcc-6.1.0/gcc/c/c-typeck.c 2016-04-15 14:46:06.000000000 +0000 ++++ gcc-6-20160721/gcc/c/c-typeck.c 2016-07-02 10:22:11.000000000 +0000 +@@ -3530,7 +3530,12 @@ + result.original_type = NULL; + + if (TREE_CODE (result.value) == ERROR_MARK) +- return result; ++ { ++ set_c_expr_source_range (&result, ++ arg1.get_start (), ++ arg2.get_finish ()); ++ return result; ++ } + + if (location != UNKNOWN_LOCATION) + protected_set_expr_location (result.value, location); +@@ -13533,7 +13538,8 @@ + : build_qualified_type (type, type_quals)); + /* A variant type does not inherit the list of incomplete vars from the + type main variant. */ +- if (RECORD_OR_UNION_TYPE_P (var_type)) ++ if (RECORD_OR_UNION_TYPE_P (var_type) ++ && TYPE_MAIN_VARIANT (var_type) != var_type) + C_TYPE_INCOMPLETE_VARS (var_type) = 0; + return var_type; + } +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/c-family/ChangeLog gcc-6-20160721/gcc/c-family/ChangeLog +--- gcc-6.1.0/gcc/c-family/ChangeLog 2016-04-27 08:20:21.000000000 +0000 ++++ gcc-6-20160721/gcc/c-family/ChangeLog 2016-07-05 17:55:36.000000000 +0000 +@@ -1,3 +1,37 @@ ++2016-07-05 Markus Trippelsdorf ++ ++ PR c++/71214 ++ * c-cppbuiltin.c (c_cpp_builtins): Define __cpp_rvalue_references. ++ ++2016-06-14 Jakub Jelinek ++ ++ Backported from mainline ++ 2016-06-10 Jakub Jelinek ++ ++ PR c/68657 ++ * c.opt (Wpsabi): Add Warning flag. ++ ++2016-06-13 Jakub Jelinek ++ ++ PR sanitizer/71498 ++ * c-gimplify.c (ubsan_walk_array_refs_r): Set *walk_subtrees = 0 on ++ all BIND_EXPRs, and on all BIND_EXPRs recurse also on BIND_EXPR_BODY. ++ ++2016-05-30 Jakub Jelinek ++ ++ PR c++/71349 ++ * c-omp.c (c_omp_split_clauses): Put OMP_CLAUSE_DEPEND to ++ C_OMP_CLAUSE_SPLIT_TARGET. Put OMP_CLAUSE_NOWAIT to ++ C_OMP_CLAUSE_SPLIT_TARGET if combined with target construct, ++ instead of C_OMP_CLAUSE_SPLIT_FOR. ++ ++2016-04-29 Cesar Philippidis ++ ++ PR middle-end/70626 ++ * c-common.h (c_oacc_split_loop_clauses): Add boolean argument. ++ * c-omp.c (c_oacc_split_loop_clauses): Use it to duplicate ++ reduction clauses in acc parallel loops. ++ + 2016-04-27 Release Manager + + * GCC 6.1.0 released. +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/c-family/c-common.h gcc-6-20160721/gcc/c-family/c-common.h +--- gcc-6.1.0/gcc/c-family/c-common.h 2016-01-27 17:17:23.000000000 +0000 ++++ gcc-6-20160721/gcc/c-family/c-common.h 2016-04-29 17:37:55.000000000 +0000 +@@ -1276,7 +1276,7 @@ + extern bool c_omp_check_loop_iv_exprs (location_t, tree, tree, tree, tree, + walk_tree_lh); + extern tree c_finish_oacc_wait (location_t, tree, tree); +-extern tree c_oacc_split_loop_clauses (tree, tree *); ++extern tree c_oacc_split_loop_clauses (tree, tree *, bool); + extern void c_omp_split_clauses (location_t, enum tree_code, omp_clause_mask, + tree, tree *); + extern tree c_omp_declare_simd_clauses_to_numbers (tree, tree); +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/c-family/c-cppbuiltin.c gcc-6-20160721/gcc/c-family/c-cppbuiltin.c +--- gcc-6.1.0/gcc/c-family/c-cppbuiltin.c 2016-04-20 13:24:29.000000000 +0000 ++++ gcc-6-20160721/gcc/c-family/c-cppbuiltin.c 2016-07-05 17:55:36.000000000 +0000 +@@ -848,6 +848,7 @@ + cpp_define (pfile, "__cpp_decltype=200707"); + cpp_define (pfile, "__cpp_attributes=200809"); + cpp_define (pfile, "__cpp_rvalue_reference=200610"); ++ cpp_define (pfile, "__cpp_rvalue_references=200610"); + cpp_define (pfile, "__cpp_variadic_templates=200704"); + cpp_define (pfile, "__cpp_initializer_lists=200806"); + cpp_define (pfile, "__cpp_delegating_constructors=200604"); +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/c-family/c-gimplify.c gcc-6-20160721/gcc/c-family/c-gimplify.c +--- gcc-6.1.0/gcc/c-family/c-gimplify.c 2016-01-27 17:17:23.000000000 +0000 ++++ gcc-6-20160721/gcc/c-family/c-gimplify.c 2016-06-13 21:08:36.000000000 +0000 +@@ -67,23 +67,23 @@ + { + hash_set *pset = (hash_set *) data; + +- /* Since walk_tree doesn't call the callback function on the decls +- in BIND_EXPR_VARS, we have to walk them manually. */ + if (TREE_CODE (*tp) == BIND_EXPR) + { ++ /* Since walk_tree doesn't call the callback function on the decls ++ in BIND_EXPR_VARS, we have to walk them manually, so we can avoid ++ instrumenting DECL_INITIAL of TREE_STATIC vars. */ ++ *walk_subtrees = 0; + for (tree decl = BIND_EXPR_VARS (*tp); decl; decl = DECL_CHAIN (decl)) + { + if (TREE_STATIC (decl)) +- { +- *walk_subtrees = 0; +- continue; +- } ++ continue; + walk_tree (&DECL_INITIAL (decl), ubsan_walk_array_refs_r, pset, + pset); + walk_tree (&DECL_SIZE (decl), ubsan_walk_array_refs_r, pset, pset); + walk_tree (&DECL_SIZE_UNIT (decl), ubsan_walk_array_refs_r, pset, + pset); + } ++ walk_tree (&BIND_EXPR_BODY (*tp), ubsan_walk_array_refs_r, pset, pset); + } + else if (TREE_CODE (*tp) == ADDR_EXPR + && TREE_CODE (TREE_OPERAND (*tp, 0)) == ARRAY_REF) +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/c-family/c-omp.c gcc-6-20160721/gcc/c-family/c-omp.c +--- gcc-6.1.0/gcc/c-family/c-omp.c 2016-01-18 14:48:26.000000000 +0000 ++++ gcc-6-20160721/gcc/c-family/c-omp.c 2016-05-30 21:40:04.000000000 +0000 +@@ -861,9 +861,10 @@ + #pragma acc parallel loop */ + + tree +-c_oacc_split_loop_clauses (tree clauses, tree *not_loop_clauses) ++c_oacc_split_loop_clauses (tree clauses, tree *not_loop_clauses, ++ bool is_parallel) + { +- tree next, loop_clauses; ++ tree next, loop_clauses, nc; + + loop_clauses = *not_loop_clauses = NULL_TREE; + for (; clauses ; clauses = next) +@@ -882,7 +883,23 @@ + case OMP_CLAUSE_SEQ: + case OMP_CLAUSE_INDEPENDENT: + case OMP_CLAUSE_PRIVATE: ++ OMP_CLAUSE_CHAIN (clauses) = loop_clauses; ++ loop_clauses = clauses; ++ break; ++ ++ /* Reductions must be duplicated on both constructs. */ + case OMP_CLAUSE_REDUCTION: ++ if (is_parallel) ++ { ++ nc = build_omp_clause (OMP_CLAUSE_LOCATION (clauses), ++ OMP_CLAUSE_REDUCTION); ++ OMP_CLAUSE_DECL (nc) = OMP_CLAUSE_DECL (clauses); ++ OMP_CLAUSE_REDUCTION_CODE (nc) ++ = OMP_CLAUSE_REDUCTION_CODE (clauses); ++ OMP_CLAUSE_CHAIN (nc) = *not_loop_clauses; ++ *not_loop_clauses = nc; ++ } ++ + OMP_CLAUSE_CHAIN (clauses) = loop_clauses; + loop_clauses = clauses; + break; +@@ -966,6 +983,7 @@ + case OMP_CLAUSE_MAP: + case OMP_CLAUSE_IS_DEVICE_PTR: + case OMP_CLAUSE_DEFAULTMAP: ++ case OMP_CLAUSE_DEPEND: + s = C_OMP_CLAUSE_SPLIT_TARGET; + break; + case OMP_CLAUSE_NUM_TEAMS: +@@ -981,7 +999,6 @@ + s = C_OMP_CLAUSE_SPLIT_PARALLEL; + break; + case OMP_CLAUSE_ORDERED: +- case OMP_CLAUSE_NOWAIT: + s = C_OMP_CLAUSE_SPLIT_FOR; + break; + case OMP_CLAUSE_SCHEDULE: +@@ -1316,6 +1333,18 @@ + else + s = C_OMP_CLAUSE_SPLIT_FOR; + break; ++ case OMP_CLAUSE_NOWAIT: ++ /* Nowait clause is allowed on target, for and sections, but ++ is not allowed on parallel for or parallel sections. Therefore, ++ put it on target construct if present, because that can only ++ be combined with parallel for{, simd} and not with for{, simd}, ++ otherwise to the worksharing construct. */ ++ if ((mask & (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_MAP)) ++ != 0) ++ s = C_OMP_CLAUSE_SPLIT_TARGET; ++ else ++ s = C_OMP_CLAUSE_SPLIT_FOR; ++ break; + default: + gcc_unreachable (); + } +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/c-family/c.opt gcc-6-20160721/gcc/c-family/c.opt +--- gcc-6.1.0/gcc/c-family/c.opt 2016-03-23 17:51:56.000000000 +0000 ++++ gcc-6-20160721/gcc/c-family/c.opt 2016-06-14 14:44:28.000000000 +0000 +@@ -265,7 +265,7 @@ + Warn if a subobject has an abi_tag attribute that the complete object type does not have. + + Wpsabi +-C ObjC C++ ObjC++ LTO Var(warn_psabi) Init(1) Undocumented LangEnabledBy(C ObjC C++ ObjC++,Wabi) ++C ObjC C++ ObjC++ LTO Var(warn_psabi) Init(1) Warning Undocumented LangEnabledBy(C ObjC C++ ObjC++,Wabi) + + Waddress + C ObjC C++ ObjC++ Var(warn_address) Warning LangEnabledBy(C ObjC C++ ObjC++,Wall) +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/calls.c gcc-6-20160721/gcc/calls.c +--- gcc-6.1.0/gcc/calls.c 2016-03-18 15:31:18.000000000 +0000 ++++ gcc-6-20160721/gcc/calls.c 2016-05-11 09:51:49.000000000 +0000 +@@ -1188,6 +1188,7 @@ + j--; + } + } ++ argpos = 0; + FOR_EACH_CALL_EXPR_ARG (arg, iter, exp) + { + tree argtype = TREE_TYPE (arg); +@@ -1206,6 +1207,14 @@ + chkp_find_bound_slots (argtype, slots); + } + } ++ else if (CALL_WITH_BOUNDS_P (exp) ++ && pass_by_reference (NULL, TYPE_MODE (argtype), argtype, ++ argpos < n_named_args)) ++ { ++ if (slots) ++ BITMAP_FREE (slots); ++ ptr_arg = j; ++ } + else if (POINTER_BOUNDS_TYPE_P (argtype)) + { + /* We expect bounds in instrumented calls only. +@@ -1249,6 +1258,7 @@ + else + args[j].tree_value = arg; + j--; ++ argpos++; + } + + if (slots) +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/cfgexpand.c gcc-6-20160721/gcc/cfgexpand.c +--- gcc-6.1.0/gcc/cfgexpand.c 2016-04-14 16:23:06.000000000 +0000 ++++ gcc-6-20160721/gcc/cfgexpand.c 2016-04-27 12:23:50.000000000 +0000 +@@ -1137,7 +1137,7 @@ + HOST_WIDE_INT prev_offset + = align_base (frame_offset, + MAX (alignb, ASAN_RED_ZONE_SIZE), +- FRAME_GROWS_DOWNWARD); ++ !FRAME_GROWS_DOWNWARD); + tree repr_decl = NULL_TREE; + offset + = alloc_stack_frame_space (stack_vars[i].size +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/cfgrtl.c gcc-6-20160721/gcc/cfgrtl.c +--- gcc-6.1.0/gcc/cfgrtl.c 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/cfgrtl.c 2016-07-19 19:55:54.000000000 +0000 +@@ -572,8 +572,10 @@ + { + rtx_insn *insn; + +- if (bb == EXIT_BLOCK_PTR_FOR_FN (cfun) || bb == ENTRY_BLOCK_PTR_FOR_FN (cfun) +- || !single_succ_p (bb)) ++ if (bb == EXIT_BLOCK_PTR_FOR_FN (cfun) ++ || bb == ENTRY_BLOCK_PTR_FOR_FN (cfun) ++ || !single_succ_p (bb) ++ || (single_succ_edge (bb)->flags & EDGE_FAKE) != 0) + return false; + + for (insn = BB_HEAD (bb); insn != BB_END (bb); insn = NEXT_INSN (insn)) +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/cgraph.c gcc-6-20160721/gcc/cgraph.c +--- gcc-6.1.0/gcc/cgraph.c 2016-03-18 09:17:23.000000000 +0000 ++++ gcc-6-20160721/gcc/cgraph.c 2016-06-03 08:27:40.000000000 +0000 +@@ -1504,10 +1504,21 @@ + update_stmt_fn (DECL_STRUCT_FUNCTION (e->caller->decl), new_stmt); + } + ++ /* If changing the call to __cxa_pure_virtual or similar noreturn function, ++ adjust gimple_call_fntype too. */ ++ if (gimple_call_noreturn_p (new_stmt) ++ && VOID_TYPE_P (TREE_TYPE (TREE_TYPE (e->callee->decl))) ++ && TYPE_ARG_TYPES (TREE_TYPE (e->callee->decl)) ++ && (TREE_VALUE (TYPE_ARG_TYPES (TREE_TYPE (e->callee->decl))) ++ == void_type_node)) ++ gimple_call_set_fntype (new_stmt, TREE_TYPE (e->callee->decl)); ++ + /* If the call becomes noreturn, remove the LHS if possible. */ + if (lhs + && (gimple_call_flags (new_stmt) & ECF_NORETURN) +- && TREE_CODE (TYPE_SIZE_UNIT (TREE_TYPE (lhs))) == INTEGER_CST) ++ && (VOID_TYPE_P (TREE_TYPE (gimple_call_fntype (new_stmt))) ++ || (TREE_CODE (TYPE_SIZE_UNIT (TREE_TYPE (lhs))) == INTEGER_CST ++ && !TREE_ADDRESSABLE (TREE_TYPE (lhs))))) + { + if (TREE_CODE (lhs) == SSA_NAME) + { +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/aarch64/aarch64-simd-builtins.def gcc-6-20160721/gcc/config/aarch64/aarch64-simd-builtins.def +--- gcc-6.1.0/gcc/config/aarch64/aarch64-simd-builtins.def 2016-01-15 17:50:01.000000000 +0000 ++++ gcc-6-20160721/gcc/config/aarch64/aarch64-simd-builtins.def 2016-07-08 15:41:31.000000000 +0000 +@@ -244,13 +244,17 @@ + /* Implemented by 3. + smax variants map to fmaxnm, + smax_nan variants map to fmax. */ +- BUILTIN_VDQIF (BINOP, smax, 3) +- BUILTIN_VDQIF (BINOP, smin, 3) ++ BUILTIN_VDQ_BHSI (BINOP, smax, 3) ++ BUILTIN_VDQ_BHSI (BINOP, smin, 3) + BUILTIN_VDQ_BHSI (BINOP, umax, 3) + BUILTIN_VDQ_BHSI (BINOP, umin, 3) + BUILTIN_VDQF (BINOP, smax_nan, 3) + BUILTIN_VDQF (BINOP, smin_nan, 3) + ++ /* Implemented by 3. */ ++ BUILTIN_VDQF (BINOP, fmax, 3) ++ BUILTIN_VDQF (BINOP, fmin, 3) ++ + /* Implemented by aarch64_p. */ + BUILTIN_VDQ_BHSI (BINOP, smaxp, 0) + BUILTIN_VDQ_BHSI (BINOP, sminp, 0) +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/aarch64/aarch64-simd.md gcc-6-20160721/gcc/config/aarch64/aarch64-simd.md +--- gcc-6.1.0/gcc/config/aarch64/aarch64-simd.md 2016-02-26 23:41:53.000000000 +0000 ++++ gcc-6-20160721/gcc/config/aarch64/aarch64-simd.md 2016-05-17 13:08:01.000000000 +0000 +@@ -1919,16 +1919,6 @@ + } + ) + +-(define_insn "aarch64_vmls" +- [(set (match_operand:VDQF 0 "register_operand" "=w") +- (minus:VDQF (match_operand:VDQF 1 "register_operand" "0") +- (mult:VDQF (match_operand:VDQF 2 "register_operand" "w") +- (match_operand:VDQF 3 "register_operand" "w"))))] +- "TARGET_SIMD" +- "fmls\\t%0., %2., %3." +- [(set_attr "type" "neon_fp_mla__scalar")] +-) +- + ;; FP Max/Min + ;; Max/Min are introduced by idiom recognition by GCC's mid-end. An + ;; expression like: +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/aarch64/arm_neon.h gcc-6-20160721/gcc/config/aarch64/arm_neon.h +--- gcc-6.1.0/gcc/config/aarch64/arm_neon.h 2016-01-25 11:32:07.000000000 +0000 ++++ gcc-6-20160721/gcc/config/aarch64/arm_neon.h 2016-07-08 15:41:31.000000000 +0000 +@@ -17856,19 +17856,19 @@ + __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) + vmaxnm_f32 (float32x2_t __a, float32x2_t __b) + { +- return __builtin_aarch64_smaxv2sf (__a, __b); ++ return __builtin_aarch64_fmaxv2sf (__a, __b); + } + + __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) + vmaxnmq_f32 (float32x4_t __a, float32x4_t __b) + { +- return __builtin_aarch64_smaxv4sf (__a, __b); ++ return __builtin_aarch64_fmaxv4sf (__a, __b); + } + + __extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) + vmaxnmq_f64 (float64x2_t __a, float64x2_t __b) + { +- return __builtin_aarch64_smaxv2df (__a, __b); ++ return __builtin_aarch64_fmaxv2df (__a, __b); + } + + /* vmaxv */ +@@ -18086,19 +18086,19 @@ + __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) + vminnm_f32 (float32x2_t __a, float32x2_t __b) + { +- return __builtin_aarch64_sminv2sf (__a, __b); ++ return __builtin_aarch64_fminv2sf (__a, __b); + } + + __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) + vminnmq_f32 (float32x4_t __a, float32x4_t __b) + { +- return __builtin_aarch64_sminv4sf (__a, __b); ++ return __builtin_aarch64_fminv4sf (__a, __b); + } + + __extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) + vminnmq_f64 (float64x2_t __a, float64x2_t __b) + { +- return __builtin_aarch64_sminv2df (__a, __b); ++ return __builtin_aarch64_fminv2df (__a, __b); + } + + /* vminv */ +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/alpha/alpha.md gcc-6-20160721/gcc/config/alpha/alpha.md +--- gcc-6.1.0/gcc/config/alpha/alpha.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/alpha/alpha.md 2016-05-18 19:39:49.000000000 +0000 +@@ -3738,7 +3738,8 @@ + + ;; BUGCHK is documented common to OSF/1 and VMS PALcode. + (define_insn "trap" +- [(trap_if (const_int 1) (const_int 0))] ++ [(trap_if (const_int 1) (const_int 0)) ++ (use (reg:DI 29))] + "" + "call_pal 0x81" + [(set_attr "type" "callpal")]) +@@ -5157,7 +5158,7 @@ + "TARGET_ABI_OSF" + { + if (TARGET_EXPLICIT_RELOCS) +- return "ldah $29,0($26)\t\t!gpdisp!%*\;lda $29,0($29)\t\t!gpdisp!%*"; ++ return "#"; + else + return "ldgp $29,0($26)"; + } +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/arm/arm-builtins.c gcc-6-20160721/gcc/config/arm/arm-builtins.c +--- gcc-6.1.0/gcc/config/arm/arm-builtins.c 2016-01-21 09:52:46.000000000 +0000 ++++ gcc-6-20160721/gcc/config/arm/arm-builtins.c 2016-05-31 08:29:39.000000000 +0000 +@@ -2861,6 +2861,10 @@ + int in_n, out_n; + bool out_unsigned_p = TYPE_UNSIGNED (type_out); + ++ /* Can't provide any vectorized builtins when we can't use NEON. */ ++ if (!TARGET_NEON) ++ return NULL_TREE; ++ + if (TREE_CODE (type_out) != VECTOR_TYPE + || TREE_CODE (type_in) != VECTOR_TYPE) + return NULL_TREE; +@@ -2875,7 +2879,7 @@ + NULL_TREE is returned if no such builtin is available. */ + #undef ARM_CHECK_BUILTIN_MODE + #define ARM_CHECK_BUILTIN_MODE(C) \ +- (TARGET_NEON && TARGET_FPU_ARMV8 \ ++ (TARGET_FPU_ARMV8 \ + && flag_unsafe_math_optimizations \ + && ARM_CHECK_BUILTIN_MODE_1 (C)) + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/arm/arm.c gcc-6-20160721/gcc/config/arm/arm.c +--- gcc-6.1.0/gcc/config/arm/arm.c 2016-03-30 12:48:42.000000000 +0000 ++++ gcc-6-20160721/gcc/config/arm/arm.c 2016-07-01 07:40:37.000000000 +0000 +@@ -6704,7 +6704,7 @@ + + /* The PIC register is live on entry to VxWorks PLT entries, so we + must make the call before restoring the PIC register. */ +- if (TARGET_VXWORKS_RTP && flag_pic && !targetm.binds_local_p (decl)) ++ if (TARGET_VXWORKS_RTP && flag_pic && decl && !targetm.binds_local_p (decl)) + return false; + + /* If we are interworking and the function is not declared static +@@ -17755,6 +17755,7 @@ + int num_saves = XVECLEN (operands[0], 0); + unsigned int regno; + unsigned int regno_base = REGNO (operands[1]); ++ bool interrupt_p = IS_INTERRUPT (arm_current_func_type ()); + + offset = 0; + offset += update ? 1 : 0; +@@ -17772,20 +17773,16 @@ + } + + conditional = reverse ? "%?%D0" : "%?%d0"; +- if ((regno_base == SP_REGNUM) && update) +- { +- sprintf (pattern, "pop%s\t{", conditional); +- } ++ /* Can't use POP if returning from an interrupt. */ ++ if ((regno_base == SP_REGNUM) && update && !(interrupt_p && return_pc)) ++ sprintf (pattern, "pop%s\t{", conditional); + else + { + /* Output ldmfd when the base register is SP, otherwise output ldmia. + It's just a convention, their semantics are identical. */ + if (regno_base == SP_REGNUM) +- /* update is never true here, hence there is no need to handle +- pop here. */ +- sprintf (pattern, "ldmfd%s", conditional); +- +- if (update) ++ sprintf (pattern, "ldmfd%s\t", conditional); ++ else if (update) + sprintf (pattern, "ldmia%s\t", conditional); + else + sprintf (pattern, "ldm%s\t", conditional); +@@ -17811,7 +17808,7 @@ + + strcat (pattern, "}"); + +- if (IS_INTERRUPT (arm_current_func_type ()) && return_pc) ++ if (interrupt_p && return_pc) + strcat (pattern, "^"); + + output_asm_insn (pattern, &cond); +@@ -19622,8 +19619,12 @@ + sprintf (instr, "ldmfd%s\t%%|sp, {", conditional); + } + } ++ /* For interrupt returns we have to use an LDM rather than ++ a POP so that we can use the exception return variant. */ ++ else if (IS_INTERRUPT (func_type)) ++ sprintf (instr, "ldmfd%s\t%%|sp!, {", conditional); + else +- sprintf (instr, "pop%s\t{", conditional); ++ sprintf (instr, "pop%s\t{", conditional); + + p = instr + strlen (instr); + +@@ -21461,7 +21462,11 @@ + + /* Naked functions don't have prologues. */ + if (IS_NAKED (func_type)) +- return; ++ { ++ if (flag_stack_usage_info) ++ current_function_static_stack_size = 0; ++ return; ++ } + + /* Make a copy of c_f_p_a_s as we may need to modify it locally. */ + args_to_push = crtl->args.pretend_args_size; +@@ -24715,7 +24720,11 @@ + + /* Naked functions don't have prologues. */ + if (IS_NAKED (func_type)) +- return; ++ { ++ if (flag_stack_usage_info) ++ current_function_static_stack_size = 0; ++ return; ++ } + + if (IS_INTERRUPT (func_type)) + { +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/arm/freebsd.h gcc-6-20160721/gcc/config/arm/freebsd.h +--- gcc-6.1.0/gcc/config/arm/freebsd.h 2016-01-07 20:35:53.000000000 +0000 ++++ gcc-6-20160721/gcc/config/arm/freebsd.h 2016-06-15 19:17:15.000000000 +0000 +@@ -120,6 +120,9 @@ + #define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm9 + #endif + ++/* FreeBSD 10 does not support unaligned access for armv6 and up. ++ Unaligned access support was added in FreeBSD 11. */ ++#if FBSD_MAJOR < 11 + #define SUBTARGET_OVERRIDE_INTERNAL_OPTIONS \ + do { \ + if (opts_set->x_unaligned_access == 1) \ +@@ -127,6 +130,7 @@ + if (opts->x_unaligned_access) \ + opts->x_unaligned_access = 0; \ + } while (0) ++#endif + + #undef MAX_SYNC_LIBFUNC_SIZE + #define MAX_SYNC_LIBFUNC_SIZE 4 /* UNITS_PER_WORD not defined yet. */ +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/avr/avr.c gcc-6-20160721/gcc/config/avr/avr.c +--- gcc-6.1.0/gcc/config/avr/avr.c 2016-02-02 16:01:45.000000000 +0000 ++++ gcc-6-20160721/gcc/config/avr/avr.c 2016-07-06 13:53:36.000000000 +0000 +@@ -9721,7 +9721,9 @@ + { + const char *sname = ACONCAT ((new_prefix, + name + strlen (old_prefix), NULL)); +- return get_section (sname, sect->common.flags, sect->named.decl); ++ return get_section (sname, ++ sect->common.flags & ~SECTION_DECLARED, ++ sect->named.decl); + } + } + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/avr/avr.md gcc-6-20160721/gcc/config/avr/avr.md +--- gcc-6.1.0/gcc/config/avr/avr.md 2016-03-15 16:21:49.000000000 +0000 ++++ gcc-6-20160721/gcc/config/avr/avr.md 2016-06-21 10:23:08.000000000 +0000 +@@ -641,6 +641,22 @@ + if (avr_mem_flash_p (dest)) + DONE; + ++ if (QImode == mode ++ && SUBREG_P (src) ++ && CONSTANT_ADDRESS_P (SUBREG_REG (src)) ++ && can_create_pseudo_p()) ++ { ++ // store_bitfield may want to store a SYMBOL_REF or CONST in a ++ // structure that's represented as PSImode. As the upper 16 bits ++ // of PSImode cannot be expressed as an HImode subreg, the rhs is ++ // decomposed into QImode (word_mode) subregs of SYMBOL_REF, ++ // CONST or LABEL_REF; cf. PR71103. ++ ++ rtx const_addr = SUBREG_REG (src); ++ operands[1] = src = copy_rtx (src); ++ SUBREG_REG (src) = copy_to_mode_reg (GET_MODE (const_addr), const_addr); ++ } ++ + /* One of the operands has to be in a register. */ + if (!register_operand (dest, mode) + && !reg_or_0_operand (src, mode)) +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/avr/gen-avr-mmcu-specs.c gcc-6-20160721/gcc/config/avr/gen-avr-mmcu-specs.c +--- gcc-6.1.0/gcc/config/avr/gen-avr-mmcu-specs.c 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/avr/gen-avr-mmcu-specs.c 2016-06-21 10:39:59.000000000 +0000 +@@ -27,7 +27,7 @@ + + #include "avr-devices.c" + +-// Get rid of "defaults.h". We just need tm.h for `WITH_AVRLIBS' and ++// Get rid of "defaults.h". We just need tm.h for `WITH_AVRLIBC' and + // and `WITH_RTEMS'. */ + #define GCC_DEFAULTS_H + +@@ -242,12 +242,13 @@ + fprintf (f, "*link_data_start:\n"); + if (mcu->data_section_start + != arch->default_data_section_start) +- fprintf (f, "\t-Tdata 0x%lX", 0x800000UL + mcu->data_section_start); ++ fprintf (f, "\t%%{!Tdata:-Tdata 0x%lX}", ++ 0x800000UL + mcu->data_section_start); + fprintf (f, "\n\n"); + + fprintf (f, "*link_text_start:\n"); + if (mcu->text_section_start != 0x0) +- fprintf (f, "\t-Ttext 0x%lX", 0UL + mcu->text_section_start); ++ fprintf (f, "\t%%{!Ttext:-Ttext 0x%lX}", 0UL + mcu->text_section_start); + fprintf (f, "\n\n"); + } + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/darwin.h gcc-6-20160721/gcc/config/darwin.h +--- gcc-6.1.0/gcc/config/darwin.h 2016-04-08 13:47:37.000000000 +0000 ++++ gcc-6-20160721/gcc/config/darwin.h 2016-06-15 11:12:40.000000000 +0000 +@@ -179,6 +179,7 @@ + %{L*} %(link_libgcc) %o %{fprofile-arcs|fprofile-generate*|coverage:-lgcov} \ + %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1): \ + %{static|static-libgcc|static-libstdc++|static-libgfortran: libgomp.a%s; : -lgomp } } \ ++ %{fcilkplus:%:include(libcilkrts.spec)%(link_cilkrts)} \ + %{fgnu-tm: \ + %{static|static-libgcc|static-libstdc++|static-libgfortran: libitm.a%s; : -litm } } \ + %{!nostdlib:%{!nodefaultlibs:\ +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/i386/constraints.md gcc-6-20160721/gcc/config/i386/constraints.md +--- gcc-6.1.0/gcc/config/i386/constraints.md 2016-01-29 18:47:17.000000000 +0000 ++++ gcc-6-20160721/gcc/config/i386/constraints.md 2016-05-25 08:04:09.000000000 +0000 +@@ -141,8 +141,12 @@ + "(ix86_fpmath & FPMATH_387) ? FLOAT_REGS : NO_REGS" + "@internal Any x87 register when 80387 FP arithmetic is enabled.") + ++;; Yr constraint is meant to be used in noavx contexts only, for VEX and EVEX ++;; the lower register numbers need the same instruction sizes as any other. ++;; In case Yr constraint is misused, try to limit the damage, by treating ++;; it as x constraint in avx mode, not v constraint. + (define_register_constraint "Yr" +- "TARGET_SSE ? (X86_TUNE_AVOID_4BYTE_PREFIXES ? NO_REX_SSE_REGS : ALL_SSE_REGS) : NO_REGS" ++ "TARGET_SSE ? ((TARGET_AVOID_4BYTE_PREFIXES && !TARGET_AVX) ? NO_REX_SSE_REGS : SSE_REGS) : NO_REGS" + "@internal Lower SSE register when avoiding REX prefix and all SSE registers otherwise.") + + ;; We use the B prefix to denote any number of internal operands: +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/i386/driver-i386.c gcc-6-20160721/gcc/config/i386/driver-i386.c +--- gcc-6.1.0/gcc/config/i386/driver-i386.c 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/i386/driver-i386.c 2016-06-05 15:45:44.000000000 +0000 +@@ -637,33 +637,27 @@ + } + else if (vendor == signature_CENTAUR_ebx) + { +- if (arch) ++ processor = PROCESSOR_GENERIC; ++ ++ switch (family) + { +- switch (family) +- { +- case 6: +- if (model > 9) +- /* Use the default detection procedure. */ +- processor = PROCESSOR_GENERIC; +- else if (model == 9) +- cpu = "c3-2"; +- else if (model >= 6) +- cpu = "c3"; +- else +- processor = PROCESSOR_GENERIC; +- break; +- case 5: +- if (has_3dnow) +- cpu = "winchip2"; +- else if (has_mmx) +- cpu = "winchip2-c6"; +- else +- processor = PROCESSOR_GENERIC; +- break; +- default: +- /* We have no idea. */ +- processor = PROCESSOR_GENERIC; +- } ++ default: ++ /* We have no idea. */ ++ break; ++ ++ case 5: ++ if (has_3dnow || has_mmx) ++ processor = PROCESSOR_I486; ++ break; ++ ++ case 6: ++ if (model > 9 || has_longmode) ++ /* Use the default detection procedure. */ ++ ; ++ else if (model == 9) ++ processor = PROCESSOR_PENTIUMPRO; ++ else if (model >= 6) ++ processor = PROCESSOR_I486; + } + } + else +@@ -694,7 +688,18 @@ + /* Default. */ + break; + case PROCESSOR_I486: +- cpu = "i486"; ++ if (arch && vendor == signature_CENTAUR_ebx) ++ { ++ if (model >= 6) ++ cpu = "c3"; ++ else if (has_3dnow) ++ cpu = "winchip2"; ++ else ++ /* Assume WinChip C6. */ ++ cpu = "winchip-c6"; ++ } ++ else ++ cpu = "i486"; + break; + case PROCESSOR_PENTIUM: + if (arch && has_mmx) +@@ -817,8 +822,13 @@ + /* It is Pentium M. */ + cpu = "pentium-m"; + else if (has_sse) +- /* It is Pentium III. */ +- cpu = "pentium3"; ++ { ++ if (vendor == signature_CENTAUR_ebx) ++ cpu = "c3-2"; ++ else ++ /* It is Pentium III. */ ++ cpu = "pentium3"; ++ } + else if (has_mmx) + /* It is Pentium II. */ + cpu = "pentium2"; +@@ -902,6 +912,11 @@ + else + cpu = "prescott"; + } ++ else if (has_longmode) ++ /* Perhaps some emulator? Assume x86-64, otherwise gcc ++ -march=native would be unusable for 64-bit compilations, ++ as all the CPUs below are 32-bit only. */ ++ cpu = "x86-64"; + else if (has_sse2) + cpu = "pentium4"; + else if (has_cmov) +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/i386/i386-builtin-types.def gcc-6-20160721/gcc/config/i386/i386-builtin-types.def +--- gcc-6.1.0/gcc/config/i386/i386-builtin-types.def 2015-09-04 08:54:14.000000000 +0000 ++++ gcc-6-20160721/gcc/config/i386/i386-builtin-types.def 2016-06-08 13:06:24.000000000 +0000 +@@ -292,6 +292,7 @@ + DEF_FUNCTION_TYPE (V8DF, V2DF) + DEF_FUNCTION_TYPE (V16SI, V4SI) + DEF_FUNCTION_TYPE (V16SI, V8SI) ++DEF_FUNCTION_TYPE (V16SI, V16SF) + DEF_FUNCTION_TYPE (V16SI, V16SI, V16SI, UHI) + DEF_FUNCTION_TYPE (V8DI, V8DI, V8DI, UQI) + DEF_FUNCTION_TYPE (V8DI, PV8DI) +@@ -1035,14 +1036,17 @@ + + DEF_FUNCTION_TYPE_ALIAS (V2DF_FTYPE_V2DF, ROUND) + DEF_FUNCTION_TYPE_ALIAS (V4DF_FTYPE_V4DF, ROUND) ++DEF_FUNCTION_TYPE_ALIAS (V8DF_FTYPE_V8DF, ROUND) + DEF_FUNCTION_TYPE_ALIAS (V4SF_FTYPE_V4SF, ROUND) + DEF_FUNCTION_TYPE_ALIAS (V8SF_FTYPE_V8SF, ROUND) ++DEF_FUNCTION_TYPE_ALIAS (V16SF_FTYPE_V16SF, ROUND) + + DEF_FUNCTION_TYPE_ALIAS (V4SI_FTYPE_V2DF_V2DF, ROUND) + DEF_FUNCTION_TYPE_ALIAS (V8SI_FTYPE_V4DF_V4DF, ROUND) + DEF_FUNCTION_TYPE_ALIAS (V16SI_FTYPE_V8DF_V8DF, ROUND) + DEF_FUNCTION_TYPE_ALIAS (V4SI_FTYPE_V4SF, ROUND) + DEF_FUNCTION_TYPE_ALIAS (V8SI_FTYPE_V8SF, ROUND) ++DEF_FUNCTION_TYPE_ALIAS (V16SI_FTYPE_V16SF, ROUND) + + DEF_FUNCTION_TYPE_ALIAS (INT_FTYPE_V2DF_V2DF, PTEST) + DEF_FUNCTION_TYPE_ALIAS (INT_FTYPE_V2DI_V2DI, PTEST) +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/i386/i386.c gcc-6-20160721/gcc/config/i386/i386.c +--- gcc-6.1.0/gcc/config/i386/i386.c 2016-04-15 13:35:12.000000000 +0000 ++++ gcc-6-20160721/gcc/config/i386/i386.c 2016-07-02 10:21:24.000000000 +0000 +@@ -18787,12 +18787,29 @@ + of the register, once we have that information we may be able + to handle some of them more efficiently. */ + if (can_create_pseudo_p () +- && register_operand (op0, mode) + && (CONSTANT_P (op1) + || (SUBREG_P (op1) + && CONSTANT_P (SUBREG_REG (op1)))) +- && !standard_sse_constant_p (op1)) +- op1 = validize_mem (force_const_mem (mode, op1)); ++ && ((register_operand (op0, mode) ++ && !standard_sse_constant_p (op1)) ++ /* ix86_expand_vector_move_misalign() does not like constants. */ ++ || (SSE_REG_MODE_P (mode) ++ && MEM_P (op0) ++ && MEM_ALIGN (op0) < align))) ++ { ++ if (SUBREG_P (op1)) ++ { ++ machine_mode imode = GET_MODE (SUBREG_REG (op1)); ++ rtx r = force_const_mem (imode, SUBREG_REG (op1)); ++ if (r) ++ r = validize_mem (r); ++ else ++ r = force_reg (imode, SUBREG_REG (op1)); ++ op1 = simplify_gen_subreg (mode, r, imode, SUBREG_BYTE (op1)); ++ } ++ else ++ op1 = validize_mem (force_const_mem (mode, op1)); ++ } + + /* We need to check memory alignment for SSE mode since attribute + can make operands unaligned. */ +@@ -18803,13 +18820,8 @@ + { + rtx tmp[2]; + +- /* ix86_expand_vector_move_misalign() does not like constants ... */ +- if (CONSTANT_P (op1) +- || (SUBREG_P (op1) +- && CONSTANT_P (SUBREG_REG (op1)))) +- op1 = validize_mem (force_const_mem (mode, op1)); +- +- /* ... nor both arguments in memory. */ ++ /* ix86_expand_vector_move_misalign() does not like both ++ arguments in memory. */ + if (!register_operand (op0, mode) + && !register_operand (op1, mode)) + op1 = force_reg (mode, op1); +@@ -18895,7 +18907,7 @@ + m = adjust_address (op0, mode, 0); + emit_insn (extract (m, op1, const0_rtx)); + m = adjust_address (op0, mode, 16); +- emit_insn (extract (m, op1, const1_rtx)); ++ emit_insn (extract (m, copy_rtx (op1), const1_rtx)); + } + else + emit_insn (store_unaligned (op0, op1)); +@@ -19203,7 +19215,7 @@ + m = adjust_address (op0, V2SFmode, 0); + emit_insn (gen_sse_storelps (m, op1)); + m = adjust_address (op0, V2SFmode, 8); +- emit_insn (gen_sse_storehps (m, op1)); ++ emit_insn (gen_sse_storehps (m, copy_rtx (op1))); + } + } + } +@@ -23027,17 +23039,33 @@ + switch (code) + { + case EQ: +- return 0x08; ++ return 0x00; + case NE: + return 0x04; + case GT: +- return 0x16; ++ return 0x0e; + case LE: +- return 0x1a; ++ return 0x02; + case GE: +- return 0x15; ++ return 0x0d; + case LT: +- return 0x19; ++ return 0x01; ++ case UNLE: ++ return 0x0a; ++ case UNLT: ++ return 0x09; ++ case UNGE: ++ return 0x05; ++ case UNGT: ++ return 0x06; ++ case UNEQ: ++ return 0x18; ++ case LTGT: ++ return 0x0c; ++ case ORDERED: ++ return 0x07; ++ case UNORDERED: ++ return 0x03; + default: + gcc_unreachable (); + } +@@ -30686,7 +30714,7 @@ + IX86_BUILTIN_CVTPD2PS512, + IX86_BUILTIN_CVTPD2UDQ512, + IX86_BUILTIN_CVTPH2PS512, +- IX86_BUILTIN_CVTPS2DQ512, ++ IX86_BUILTIN_CVTPS2DQ512_MASK, + IX86_BUILTIN_CVTPS2PD512, + IX86_BUILTIN_CVTPS2PH512, + IX86_BUILTIN_CVTPS2UDQ512, +@@ -32126,14 +32154,25 @@ + IX86_BUILTIN_COPYSIGNQ, + + /* Vectorizer support builtins. */ +- IX86_BUILTIN_CEILPD_VEC_PACK_SFIX512, + IX86_BUILTIN_CPYSGNPS, + IX86_BUILTIN_CPYSGNPD, + IX86_BUILTIN_CPYSGNPS256, + IX86_BUILTIN_CPYSGNPS512, + IX86_BUILTIN_CPYSGNPD256, + IX86_BUILTIN_CPYSGNPD512, ++ IX86_BUILTIN_FLOORPS512, ++ IX86_BUILTIN_FLOORPD512, ++ IX86_BUILTIN_CEILPS512, ++ IX86_BUILTIN_CEILPD512, ++ IX86_BUILTIN_TRUNCPS512, ++ IX86_BUILTIN_TRUNCPD512, ++ IX86_BUILTIN_CVTPS2DQ512, ++ IX86_BUILTIN_VEC_PACK_SFIX512, ++ IX86_BUILTIN_FLOORPS_SFIX512, + IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX512, ++ IX86_BUILTIN_CEILPS_SFIX512, ++ IX86_BUILTIN_CEILPD_VEC_PACK_SFIX512, ++ IX86_BUILTIN_ROUNDPS_AZ_SFIX512, + IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX512, + + +@@ -32787,9 +32826,9 @@ + { OPTION_MASK_ISA_LWP, CODE_FOR_lwp_llwpcb, "__builtin_ia32_llwpcb", IX86_BUILTIN_LLWPCB, UNKNOWN, (int) VOID_FTYPE_PVOID }, + { OPTION_MASK_ISA_LWP, CODE_FOR_lwp_slwpcb, "__builtin_ia32_slwpcb", IX86_BUILTIN_SLWPCB, UNKNOWN, (int) PVOID_FTYPE_VOID }, + { OPTION_MASK_ISA_LWP, CODE_FOR_lwp_lwpvalsi3, "__builtin_ia32_lwpval32", IX86_BUILTIN_LWPVAL32, UNKNOWN, (int) VOID_FTYPE_UINT_UINT_UINT }, +- { OPTION_MASK_ISA_LWP, CODE_FOR_lwp_lwpvaldi3, "__builtin_ia32_lwpval64", IX86_BUILTIN_LWPVAL64, UNKNOWN, (int) VOID_FTYPE_UINT64_UINT_UINT }, ++ { OPTION_MASK_ISA_LWP | OPTION_MASK_ISA_64BIT, CODE_FOR_lwp_lwpvaldi3, "__builtin_ia32_lwpval64", IX86_BUILTIN_LWPVAL64, UNKNOWN, (int) VOID_FTYPE_UINT64_UINT_UINT }, + { OPTION_MASK_ISA_LWP, CODE_FOR_lwp_lwpinssi3, "__builtin_ia32_lwpins32", IX86_BUILTIN_LWPINS32, UNKNOWN, (int) UCHAR_FTYPE_UINT_UINT_UINT }, +- { OPTION_MASK_ISA_LWP, CODE_FOR_lwp_lwpinsdi3, "__builtin_ia32_lwpins64", IX86_BUILTIN_LWPINS64, UNKNOWN, (int) UCHAR_FTYPE_UINT64_UINT_UINT }, ++ { OPTION_MASK_ISA_LWP | OPTION_MASK_ISA_64BIT, CODE_FOR_lwp_lwpinsdi3, "__builtin_ia32_lwpins64", IX86_BUILTIN_LWPINS64, UNKNOWN, (int) UCHAR_FTYPE_UINT64_UINT_UINT }, + + /* FSGSBASE */ + { OPTION_MASK_ISA_FSGSBASE | OPTION_MASK_ISA_64BIT, CODE_FOR_rdfsbasesi, "__builtin_ia32_rdfsbase32", IX86_BUILTIN_RDFSBASE32, UNKNOWN, (int) UNSIGNED_FTYPE_VOID }, +@@ -33724,12 +33763,12 @@ + + /* BMI */ + { OPTION_MASK_ISA_BMI, CODE_FOR_bmi_bextr_si, "__builtin_ia32_bextr_u32", IX86_BUILTIN_BEXTR32, UNKNOWN, (int) UINT_FTYPE_UINT_UINT }, +- { OPTION_MASK_ISA_BMI, CODE_FOR_bmi_bextr_di, "__builtin_ia32_bextr_u64", IX86_BUILTIN_BEXTR64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 }, ++ { OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_64BIT, CODE_FOR_bmi_bextr_di, "__builtin_ia32_bextr_u64", IX86_BUILTIN_BEXTR64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 }, + { OPTION_MASK_ISA_BMI, CODE_FOR_ctzhi2, "__builtin_ctzs", IX86_BUILTIN_CTZS, UNKNOWN, (int) UINT16_FTYPE_UINT16 }, + + /* TBM */ + { OPTION_MASK_ISA_TBM, CODE_FOR_tbm_bextri_si, "__builtin_ia32_bextri_u32", IX86_BUILTIN_BEXTRI32, UNKNOWN, (int) UINT_FTYPE_UINT_UINT }, +- { OPTION_MASK_ISA_TBM, CODE_FOR_tbm_bextri_di, "__builtin_ia32_bextri_u64", IX86_BUILTIN_BEXTRI64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 }, ++ { OPTION_MASK_ISA_TBM | OPTION_MASK_ISA_64BIT, CODE_FOR_tbm_bextri_di, "__builtin_ia32_bextri_u64", IX86_BUILTIN_BEXTRI64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 }, + + /* F16C */ + { OPTION_MASK_ISA_F16C, CODE_FOR_vcvtph2ps, "__builtin_ia32_vcvtph2ps", IX86_BUILTIN_CVTPH2PS, UNKNOWN, (int) V4SF_FTYPE_V8HI }, +@@ -33739,11 +33778,11 @@ + + /* BMI2 */ + { OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_bzhi_si3, "__builtin_ia32_bzhi_si", IX86_BUILTIN_BZHI32, UNKNOWN, (int) UINT_FTYPE_UINT_UINT }, +- { OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_bzhi_di3, "__builtin_ia32_bzhi_di", IX86_BUILTIN_BZHI64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 }, ++ { OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_64BIT, CODE_FOR_bmi2_bzhi_di3, "__builtin_ia32_bzhi_di", IX86_BUILTIN_BZHI64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 }, + { OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_pdep_si3, "__builtin_ia32_pdep_si", IX86_BUILTIN_PDEP32, UNKNOWN, (int) UINT_FTYPE_UINT_UINT }, +- { OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_pdep_di3, "__builtin_ia32_pdep_di", IX86_BUILTIN_PDEP64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 }, ++ { OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_64BIT, CODE_FOR_bmi2_pdep_di3, "__builtin_ia32_pdep_di", IX86_BUILTIN_PDEP64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 }, + { OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_pext_si3, "__builtin_ia32_pext_si", IX86_BUILTIN_PEXT32, UNKNOWN, (int) UINT_FTYPE_UINT_UINT }, +- { OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_pext_di3, "__builtin_ia32_pext_di", IX86_BUILTIN_PEXT64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 }, ++ { OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_64BIT, CODE_FOR_bmi2_pext_di3, "__builtin_ia32_pext_di", IX86_BUILTIN_PEXT64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 }, + + /* AVX512F */ + { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_si512_256si, "__builtin_ia32_si512_256si", IX86_BUILTIN_SI512_SI256, UNKNOWN, (int) V16SI_FTYPE_V8SI }, +@@ -33948,6 +33987,17 @@ + { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_sqrtv8df2, "__builtin_ia32_sqrtpd512", IX86_BUILTIN_SQRTPD512, UNKNOWN, (int) V8DF_FTYPE_V8DF }, + { OPTION_MASK_ISA_AVX512F, CODE_FOR_sqrtv16sf2, "__builtin_ia32_sqrtps512", IX86_BUILTIN_SQRTPS_NR512, UNKNOWN, (int) V16SF_FTYPE_V16SF }, + { OPTION_MASK_ISA_AVX512ER, CODE_FOR_avx512er_exp2v16sf, "__builtin_ia32_exp2ps", IX86_BUILTIN_EXP2PS, UNKNOWN, (int) V16SF_FTYPE_V16SF }, ++ { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_roundps512, "__builtin_ia32_floorps512", IX86_BUILTIN_FLOORPS512, (enum rtx_code) ROUND_FLOOR, (int) V16SF_FTYPE_V16SF_ROUND }, ++ { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_roundps512, "__builtin_ia32_ceilps512", IX86_BUILTIN_CEILPS512, (enum rtx_code) ROUND_CEIL, (int) V16SF_FTYPE_V16SF_ROUND }, ++ { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_roundps512, "__builtin_ia32_truncps512", IX86_BUILTIN_TRUNCPS512, (enum rtx_code) ROUND_TRUNC, (int) V16SF_FTYPE_V16SF_ROUND }, ++ { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_roundpd512, "__builtin_ia32_floorpd512", IX86_BUILTIN_FLOORPD512, (enum rtx_code) ROUND_FLOOR, (int) V8DF_FTYPE_V8DF_ROUND }, ++ { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_roundpd512, "__builtin_ia32_ceilpd512", IX86_BUILTIN_CEILPD512, (enum rtx_code) ROUND_CEIL, (int) V8DF_FTYPE_V8DF_ROUND }, ++ { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_roundpd512, "__builtin_ia32_truncpd512", IX86_BUILTIN_TRUNCPD512, (enum rtx_code) ROUND_TRUNC, (int) V8DF_FTYPE_V8DF_ROUND }, ++ { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_fix_notruncv16sfv16si, "__builtin_ia32_cvtps2dq512", IX86_BUILTIN_CVTPS2DQ512, UNKNOWN, (int) V16SI_FTYPE_V16SF }, ++ { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_vec_pack_sfix_v8df, "__builtin_ia32_vec_pack_sfix512", IX86_BUILTIN_VEC_PACK_SFIX512, UNKNOWN, (int) V16SI_FTYPE_V8DF_V8DF }, ++ { OPTION_MASK_ISA_AVX512F, CODE_FOR_roundv16sf2_sfix, "__builtin_ia32_roundps_az_sfix512", IX86_BUILTIN_ROUNDPS_AZ_SFIX512, UNKNOWN, (int) V16SI_FTYPE_V16SF }, ++ { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_roundps512_sfix, "__builtin_ia32_floorps_sfix512", IX86_BUILTIN_FLOORPS_SFIX512, (enum rtx_code) ROUND_FLOOR, (int) V16SI_FTYPE_V16SF_ROUND }, ++ { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_roundps512_sfix, "__builtin_ia32_ceilps_sfix512", IX86_BUILTIN_CEILPS_SFIX512, (enum rtx_code) ROUND_CEIL, (int) V16SI_FTYPE_V16SF_ROUND }, + { OPTION_MASK_ISA_AVX512F, CODE_FOR_roundv8df2_vec_pack_sfix, "__builtin_ia32_roundpd_az_vec_pack_sfix512", IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX512, UNKNOWN, (int) V16SI_FTYPE_V8DF_V8DF }, + { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_roundpd_vec_pack_sfix512, "__builtin_ia32_floorpd_vec_pack_sfix512", IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX512, (enum rtx_code) ROUND_FLOOR, (int) V16SI_FTYPE_V8DF_V8DF_ROUND }, + { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_roundpd_vec_pack_sfix512, "__builtin_ia32_ceilpd_vec_pack_sfix512", IX86_BUILTIN_CEILPD_VEC_PACK_SFIX512, (enum rtx_code) ROUND_CEIL, (int) V16SI_FTYPE_V8DF_V8DF_ROUND }, +@@ -34864,7 +34914,7 @@ + { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_cvtpd2ps512_mask_round, "__builtin_ia32_cvtpd2ps512_mask", IX86_BUILTIN_CVTPD2PS512, UNKNOWN, (int) V8SF_FTYPE_V8DF_V8SF_QI_INT }, + { OPTION_MASK_ISA_AVX512F, CODE_FOR_ufix_notruncv8dfv8si2_mask_round, "__builtin_ia32_cvtpd2udq512_mask", IX86_BUILTIN_CVTPD2UDQ512, UNKNOWN, (int) V8SI_FTYPE_V8DF_V8SI_QI_INT }, + { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_vcvtph2ps512_mask_round, "__builtin_ia32_vcvtph2ps512_mask", IX86_BUILTIN_CVTPH2PS512, UNKNOWN, (int) V16SF_FTYPE_V16HI_V16SF_HI_INT }, +- { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_fix_notruncv16sfv16si_mask_round, "__builtin_ia32_cvtps2dq512_mask", IX86_BUILTIN_CVTPS2DQ512, UNKNOWN, (int) V16SI_FTYPE_V16SF_V16SI_HI_INT }, ++ { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_fix_notruncv16sfv16si_mask_round, "__builtin_ia32_cvtps2dq512_mask", IX86_BUILTIN_CVTPS2DQ512_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SF_V16SI_HI_INT }, + { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_cvtps2pd512_mask_round, "__builtin_ia32_cvtps2pd512_mask", IX86_BUILTIN_CVTPS2PD512, UNKNOWN, (int) V8DF_FTYPE_V8SF_V8DF_QI_INT }, + { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_ufix_notruncv16sfv16si_mask_round, "__builtin_ia32_cvtps2udq512_mask", IX86_BUILTIN_CVTPS2UDQ512, UNKNOWN, (int) V16SI_FTYPE_V16SF_V16SI_HI_INT }, + { OPTION_MASK_ISA_AVX512F, CODE_FOR_sse2_cvtsd2ss_round, "__builtin_ia32_cvtsd2ss_round", IX86_BUILTIN_CVTSD2SS_ROUND, UNKNOWN, (int) V4SF_FTYPE_V4SF_V2DF_INT }, +@@ -38441,10 +38491,13 @@ + { + case V2DF_FTYPE_V2DF_ROUND: + case V4DF_FTYPE_V4DF_ROUND: ++ case V8DF_FTYPE_V8DF_ROUND: + case V4SF_FTYPE_V4SF_ROUND: + case V8SF_FTYPE_V8SF_ROUND: ++ case V16SF_FTYPE_V16SF_ROUND: + case V4SI_FTYPE_V4SF_ROUND: + case V8SI_FTYPE_V8SF_ROUND: ++ case V16SI_FTYPE_V16SF_ROUND: + return ix86_expand_sse_round (d, exp, target); + case V4SI_FTYPE_V2DF_V2DF_ROUND: + case V8SI_FTYPE_V4DF_V4DF_ROUND: +@@ -38558,6 +38611,7 @@ + case V16SI_FTYPE_V8SI: + case V16SF_FTYPE_V4SF: + case V16SI_FTYPE_V4SI: ++ case V16SI_FTYPE_V16SF: + case V16SF_FTYPE_V16SF: + case V8DI_FTYPE_UQI: + case V8DF_FTYPE_V4DF: +@@ -42263,6 +42317,8 @@ + return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX); + else if (out_n == 8 && in_n == 8) + return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX256); ++ else if (out_n == 16 && in_n == 16) ++ return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX512); + } + break; + +@@ -42288,6 +42344,8 @@ + return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX); + else if (out_n == 8 && in_n == 8) + return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX256); ++ else if (out_n == 16 && in_n == 16) ++ return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX512); + } + break; + +@@ -42300,6 +42358,8 @@ + return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX); + else if (out_n == 8 && in_n == 4) + return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX256); ++ else if (out_n == 16 && in_n == 8) ++ return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX512); + } + if (out_mode == SImode && in_mode == SFmode) + { +@@ -42307,6 +42367,8 @@ + return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ); + else if (out_n == 8 && in_n == 8) + return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ256); ++ else if (out_n == 16 && in_n == 16) ++ return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ512); + } + break; + +@@ -42332,6 +42394,8 @@ + return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX); + else if (out_n == 8 && in_n == 8) + return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX256); ++ else if (out_n == 16 && in_n == 16) ++ return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX512); + } + break; + +@@ -42346,6 +42410,8 @@ + return ix86_get_builtin (IX86_BUILTIN_FLOORPD); + else if (out_n == 4 && in_n == 4) + return ix86_get_builtin (IX86_BUILTIN_FLOORPD256); ++ else if (out_n == 8 && in_n == 8) ++ return ix86_get_builtin (IX86_BUILTIN_FLOORPD512); + } + if (out_mode == SFmode && in_mode == SFmode) + { +@@ -42353,6 +42419,8 @@ + return ix86_get_builtin (IX86_BUILTIN_FLOORPS); + else if (out_n == 8 && in_n == 8) + return ix86_get_builtin (IX86_BUILTIN_FLOORPS256); ++ else if (out_n == 16 && in_n == 16) ++ return ix86_get_builtin (IX86_BUILTIN_FLOORPS512); + } + break; + +@@ -42367,6 +42435,8 @@ + return ix86_get_builtin (IX86_BUILTIN_CEILPD); + else if (out_n == 4 && in_n == 4) + return ix86_get_builtin (IX86_BUILTIN_CEILPD256); ++ else if (out_n == 8 && in_n == 8) ++ return ix86_get_builtin (IX86_BUILTIN_CEILPD512); + } + if (out_mode == SFmode && in_mode == SFmode) + { +@@ -42374,6 +42444,8 @@ + return ix86_get_builtin (IX86_BUILTIN_CEILPS); + else if (out_n == 8 && in_n == 8) + return ix86_get_builtin (IX86_BUILTIN_CEILPS256); ++ else if (out_n == 16 && in_n == 16) ++ return ix86_get_builtin (IX86_BUILTIN_CEILPS512); + } + break; + +@@ -42388,6 +42460,8 @@ + return ix86_get_builtin (IX86_BUILTIN_TRUNCPD); + else if (out_n == 4 && in_n == 4) + return ix86_get_builtin (IX86_BUILTIN_TRUNCPD256); ++ else if (out_n == 8 && in_n == 8) ++ return ix86_get_builtin (IX86_BUILTIN_TRUNCPD512); + } + if (out_mode == SFmode && in_mode == SFmode) + { +@@ -42395,6 +42469,8 @@ + return ix86_get_builtin (IX86_BUILTIN_TRUNCPS); + else if (out_n == 8 && in_n == 8) + return ix86_get_builtin (IX86_BUILTIN_TRUNCPS256); ++ else if (out_n == 16 && in_n == 16) ++ return ix86_get_builtin (IX86_BUILTIN_TRUNCPS512); + } + break; + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/i386/i386.h gcc-6-20160721/gcc/config/i386/i386.h +--- gcc-6.1.0/gcc/config/i386/i386.h 2016-03-30 03:57:30.000000000 +0000 ++++ gcc-6-20160721/gcc/config/i386/i386.h 2016-05-25 08:04:09.000000000 +0000 +@@ -465,6 +465,8 @@ + ix86_tune_features[X86_TUNE_SLOW_PSHUFB] + #define TARGET_VECTOR_PARALLEL_EXECUTION \ + ix86_tune_features[X86_TUNE_VECTOR_PARALLEL_EXECUTION] ++#define TARGET_AVOID_4BYTE_PREFIXES \ ++ ix86_tune_features[X86_TUNE_AVOID_4BYTE_PREFIXES] + #define TARGET_FUSE_CMP_AND_BRANCH_32 \ + ix86_tune_features[X86_TUNE_FUSE_CMP_AND_BRANCH_32] + #define TARGET_FUSE_CMP_AND_BRANCH_64 \ +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/i386/i386.md gcc-6-20160721/gcc/config/i386/i386.md +--- gcc-6.1.0/gcc/config/i386/i386.md 2016-04-15 13:35:12.000000000 +0000 ++++ gcc-6-20160721/gcc/config/i386/i386.md 2016-06-16 09:29:24.000000000 +0000 +@@ -9332,7 +9332,7 @@ + }) + + (define_split +- [(set (match_operand:SF 0 "register_operand") ++ [(set (match_operand:SF 0 "general_reg_operand") + (match_operator:SF 1 "absneg_operator" [(match_dup 0)])) + (use (match_operand:V4SF 2)) + (clobber (reg:CC FLAGS_REG))] +@@ -9356,7 +9356,7 @@ + }) + + (define_split +- [(set (match_operand:DF 0 "register_operand") ++ [(set (match_operand:DF 0 "general_reg_operand") + (match_operator:DF 1 "absneg_operator" [(match_dup 0)])) + (use (match_operand 2)) + (clobber (reg:CC FLAGS_REG))] +@@ -9394,7 +9394,7 @@ + }) + + (define_split +- [(set (match_operand:XF 0 "register_operand") ++ [(set (match_operand:XF 0 "general_reg_operand") + (match_operator:XF 1 "absneg_operator" [(match_dup 0)])) + (use (match_operand 2)) + (clobber (reg:CC FLAGS_REG))] +@@ -11078,20 +11078,19 @@ + (const_int 1)) + (clobber (reg:CC FLAGS_REG))])] + "TARGET_64BIT && !TARGET_USE_BT" +- [(const_int 0)] ++ [(parallel [(set (match_dup 0) ++ (ior:DI (match_dup 0) (match_dup 3))) ++ (clobber (reg:CC FLAGS_REG))])] + { + int i = INTVAL (operands[1]); + +- rtx op1 = gen_int_mode (HOST_WIDE_INT_1U << i, DImode); ++ operands[3] = gen_int_mode (HOST_WIDE_INT_1U << i, DImode); + +- if (i >= 31) ++ if (!x86_64_immediate_operand (operands[3], DImode)) + { +- emit_move_insn (operands[2], op1); +- op1 = operands[2]; ++ emit_move_insn (operands[2], operands[3]); ++ operands[3] = operands[2]; + } +- +- emit_insn (gen_iordi3 (operands[0], operands[0], op1)); +- DONE; + }) + + (define_peephole2 +@@ -11103,20 +11102,19 @@ + (const_int 0)) + (clobber (reg:CC FLAGS_REG))])] + "TARGET_64BIT && !TARGET_USE_BT" +- [(const_int 0)] ++ [(parallel [(set (match_dup 0) ++ (and:DI (match_dup 0) (match_dup 3))) ++ (clobber (reg:CC FLAGS_REG))])] + { + int i = INTVAL (operands[1]); + +- rtx op1 = gen_int_mode (HOST_WIDE_INT_1U << i, DImode); ++ operands[3] = gen_int_mode (~(HOST_WIDE_INT_1U << i), DImode); + +- if (i >= 32) ++ if (!x86_64_immediate_operand (operands[3], DImode)) + { +- emit_move_insn (operands[2], op1); +- op1 = operands[2]; ++ emit_move_insn (operands[2], operands[3]); ++ operands[3] = operands[2]; + } +- +- emit_insn (gen_anddi3 (operands[0], operands[0], op1)); +- DONE; + }) + + (define_peephole2 +@@ -11129,20 +11127,19 @@ + (match_dup 0) (const_int 1) (match_dup 1)))) + (clobber (reg:CC FLAGS_REG))])] + "TARGET_64BIT && !TARGET_USE_BT" +- [(const_int 0)] ++ [(parallel [(set (match_dup 0) ++ (xor:DI (match_dup 0) (match_dup 3))) ++ (clobber (reg:CC FLAGS_REG))])] + { + int i = INTVAL (operands[1]); + +- rtx op1 = gen_int_mode (HOST_WIDE_INT_1U << i, DImode); ++ operands[3] = gen_int_mode (HOST_WIDE_INT_1U << i, DImode); + +- if (i >= 31) ++ if (!x86_64_immediate_operand (operands[3], DImode)) + { +- emit_move_insn (operands[2], op1); +- op1 = operands[2]; ++ emit_move_insn (operands[2], operands[3]); ++ operands[3] = operands[2]; + } +- +- emit_insn (gen_xordi3 (operands[0], operands[0], op1)); +- DONE; + }) + + (define_insn "*bt" +@@ -11859,8 +11856,7 @@ + "(peep2_reg_dead_p (3, operands[1]) + || operands_match_p (operands[1], operands[3])) + && ! reg_overlap_mentioned_p (operands[3], operands[0]) +- && ! (GET_CODE (operands[4]) == CLOBBER +- && reg_mentioned_p (operands[3], operands[4]))" ++ && ! reg_set_p (operands[3], operands[4])" + [(parallel [(set (match_dup 5) (match_dup 0)) + (match_dup 4)]) + (set (strict_low_part (match_dup 6)) +@@ -11904,8 +11900,7 @@ + "(peep2_reg_dead_p (3, operands[1]) + || operands_match_p (operands[1], operands[3])) + && ! reg_overlap_mentioned_p (operands[3], operands[0]) +- && ! (GET_CODE (operands[4]) == CLOBBER +- && reg_mentioned_p (operands[3], operands[4]))" ++ && ! reg_set_p (operands[3], operands[4])" + [(parallel [(set (match_dup 5) (match_dup 0)) + (match_dup 4)]) + (set (strict_low_part (match_dup 6)) +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/i386/predicates.md gcc-6-20160721/gcc/config/i386/predicates.md +--- gcc-6.1.0/gcc/config/i386/predicates.md 2016-01-05 20:19:16.000000000 +0000 ++++ gcc-6-20160721/gcc/config/i386/predicates.md 2016-04-27 13:35:03.000000000 +0000 +@@ -637,7 +637,7 @@ + (op, mode == VOIDmode ? mode : Pmode)") + (match_operand 0 "call_register_no_elim_operand") + (ior (and (not (match_test "TARGET_X32")) +- (match_operand 0 "sibcall_memory_operand")) ++ (match_operand 0 "memory_operand")) + (and (match_test "TARGET_X32 && Pmode == DImode") + (match_operand 0 "GOT_memory_operand"))))) + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/i386/sse.md gcc-6-20160721/gcc/config/i386/sse.md +--- gcc-6.1.0/gcc/config/i386/sse.md 2016-04-15 15:53:01.000000000 +0000 ++++ gcc-6-20160721/gcc/config/i386/sse.md 2016-06-08 13:06:24.000000000 +0000 +@@ -4488,7 +4488,7 @@ + (set_attr "prefix" "maybe_vex") + (set_attr "mode" "")]) + +-(define_insn "avx512f_fix_notruncv16sfv16si" ++(define_insn "avx512f_fix_notruncv16sfv16si" + [(set (match_operand:V16SI 0 "register_operand" "=v") + (unspec:V16SI + [(match_operand:V16SF 1 "" "")] +@@ -5046,7 +5046,7 @@ + (set_attr "ssememalign" "64") + (set_attr "mode" "V2DF")]) + +-(define_insn "avx512f_cvtpd2dq512" ++(define_insn "avx512f_cvtpd2dq512" + [(set (match_operand:V8SI 0 "register_operand" "=v") + (unspec:V8SI + [(match_operand:V8DF 1 "" "")] +@@ -6006,6 +6006,23 @@ + DONE; + }) + ++(define_expand "avx512f_vec_pack_sfix_v8df" ++ [(match_operand:V16SI 0 "register_operand") ++ (match_operand:V8DF 1 "nonimmediate_operand") ++ (match_operand:V8DF 2 "nonimmediate_operand")] ++ "TARGET_AVX512F" ++{ ++ rtx r1, r2; ++ ++ r1 = gen_reg_rtx (V8SImode); ++ r2 = gen_reg_rtx (V8SImode); ++ ++ emit_insn (gen_avx512f_cvtpd2dq512 (r1, operands[1])); ++ emit_insn (gen_avx512f_cvtpd2dq512 (r2, operands[2])); ++ emit_insn (gen_avx_vec_concatv16si (operands[0], r1, r2)); ++ DONE; ++}) ++ + (define_expand "vec_pack_sfix_v4df" + [(match_operand:V8SI 0 "register_operand") + (match_operand:V4DF 1 "nonimmediate_operand") +@@ -10566,22 +10583,23 @@ + (set_attr "mode" "")]) + + (define_insn "3" +- [(set (match_operand:VI48_AVX2 0 "register_operand" "=x,v") ++ [(set (match_operand:VI48_AVX2 0 "register_operand" "=x,x,v") + (any_lshift:VI48_AVX2 +- (match_operand:VI48_AVX2 1 "register_operand" "0,v") +- (match_operand:SI 2 "nonmemory_operand" "xN,vN")))] ++ (match_operand:VI48_AVX2 1 "register_operand" "0,x,v") ++ (match_operand:SI 2 "nonmemory_operand" "xN,xN,vN")))] + "TARGET_SSE2 && " + "@ + p\t{%2, %0|%0, %2} +- vp\t{%2, %1, %0|%0, %1, %2}" +- [(set_attr "isa" "noavx,avx") ++ vp\t{%2, %1, %0|%0, %1, %2} ++ vp\t{%2, %1, %0|%0, %1, %2}" ++ [(set_attr "isa" "noavx,avx,avx512bw") + (set_attr "type" "sseishft") + (set (attr "length_immediate") + (if_then_else (match_operand 2 "const_int_operand") + (const_string "1") + (const_string "0"))) +- (set_attr "prefix_data16" "1,*") +- (set_attr "prefix" "orig,vex") ++ (set_attr "prefix_data16" "1,*,*") ++ (set_attr "prefix" "orig,vex,evex") + (set_attr "mode" "")]) + + (define_insn "3" +@@ -15246,13 +15264,25 @@ + DONE; + }) + +-(define_expand "avx512f_roundpd512" +- [(match_operand:V8DF 0 "register_operand") +- (match_operand:V8DF 1 "nonimmediate_operand") ++(define_expand "avx512f_round512" ++ [(match_operand:VF_512 0 "register_operand") ++ (match_operand:VF_512 1 "nonimmediate_operand") ++ (match_operand:SI 2 "const_0_to_15_operand")] ++ "TARGET_AVX512F" ++{ ++ emit_insn (gen_avx512f_rndscale (operands[0], operands[1], operands[2])); ++ DONE; ++}) ++ ++(define_expand "avx512f_roundps512_sfix" ++ [(match_operand:V16SI 0 "register_operand") ++ (match_operand:V16SF 1 "nonimmediate_operand") + (match_operand:SI 2 "const_0_to_15_operand")] + "TARGET_AVX512F" + { +- emit_insn (gen_avx512f_rndscalev8df (operands[0], operands[1], operands[2])); ++ rtx tmp = gen_reg_rtx (V16SFmode); ++ emit_insn (gen_avx512f_rndscalev16sf (tmp, operands[1], operands[2])); ++ emit_insn (gen_fix_truncv16sfv16si2 (operands[0], tmp)); + DONE; + }) + +@@ -15352,7 +15382,7 @@ + + (define_expand "round2_sfix" + [(match_operand: 0 "register_operand") +- (match_operand:VF1_128_256 1 "register_operand")] ++ (match_operand:VF1 1 "register_operand")] + "TARGET_ROUND && !flag_trapping_math" + { + rtx tmp = gen_reg_rtx (mode); +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/microblaze/rtems.h gcc-6-20160721/gcc/config/microblaze/rtems.h +--- gcc-6.1.0/gcc/config/microblaze/rtems.h 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/microblaze/rtems.h 2016-05-10 07:00:22.000000000 +0000 +@@ -23,3 +23,10 @@ + builtin_define( "__rtems__" ); \ + builtin_assert( "system=rtems" ); \ + } while (0) ++ ++/* Redefine to include only items relevant for RTEMS */ ++#undef LINK_SPEC ++#define LINK_SPEC "%{shared:-shared} -N -relax \ ++ %{mbig-endian:-EB --oformat=elf32-microblaze} \ ++ %{mlittle-endian:-EL --oformat=elf32-microblazeel} \ ++ %{mxl-gp-opt:%{G*}} %{!mxl-gp-opt: -G 0}" +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/nvptx/nvptx.c gcc-6-20160721/gcc/config/nvptx/nvptx.c +--- gcc-6.1.0/gcc/config/nvptx/nvptx.c 2016-03-21 15:31:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/nvptx/nvptx.c 2016-05-17 16:08:37.000000000 +0000 +@@ -483,7 +483,7 @@ + static rtx + nvptx_libcall_value (machine_mode mode, const_rtx) + { +- if (!cfun->machine->doing_call) ++ if (!cfun || !cfun->machine->doing_call) + /* Pretend to return in a hard reg for early uses before pseudos can be + generated. */ + return gen_rtx_REG (mode, NVPTX_RETURN_REGNUM); +@@ -502,6 +502,7 @@ + + if (outgoing) + { ++ gcc_assert (cfun); + cfun->machine->return_mode = mode; + return gen_rtx_REG (mode, NVPTX_RETURN_REGNUM); + } +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/pa/pa.c gcc-6-20160721/gcc/config/pa/pa.c +--- gcc-6.1.0/gcc/config/pa/pa.c 2016-01-12 01:35:23.000000000 +0000 ++++ gcc-6-20160721/gcc/config/pa/pa.c 2016-07-20 22:35:50.000000000 +0000 +@@ -4541,63 +4541,78 @@ + lcla2 and load_offset_label_address insn patterns. */ + rtx reg = gen_reg_rtx (SImode); + rtx_code_label *label_rtx = gen_label_rtx (); +- rtx begin_label_rtx; ++ rtx mcount = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (Pmode, "_mcount")); ++ int reg_parm_stack_space = REG_PARM_STACK_SPACE (NULL_TREE); ++ rtx arg_bytes, begin_label_rtx; + rtx_insn *call_insn; + char begin_label_name[16]; ++ bool use_mcount_pcrel_call; ++ ++ /* If we can reach _mcount with a pc-relative call, we can optimize ++ loading the address of the current function. This requires linker ++ long branch stub support. */ ++ if (!TARGET_PORTABLE_RUNTIME ++ && !TARGET_LONG_CALLS ++ && (TARGET_SOM || flag_function_sections)) ++ use_mcount_pcrel_call = TRUE; ++ else ++ use_mcount_pcrel_call = FALSE; + + ASM_GENERATE_INTERNAL_LABEL (begin_label_name, FUNC_BEGIN_PROLOG_LABEL, + label_no); + begin_label_rtx = gen_rtx_SYMBOL_REF (SImode, ggc_strdup (begin_label_name)); + +- if (TARGET_64BIT) +- emit_move_insn (arg_pointer_rtx, +- gen_rtx_PLUS (word_mode, virtual_outgoing_args_rtx, +- GEN_INT (64))); +- + emit_move_insn (gen_rtx_REG (word_mode, 26), gen_rtx_REG (word_mode, 2)); + +- /* The address of the function is loaded into %r25 with an instruction- +- relative sequence that avoids the use of relocations. The sequence +- is split so that the load_offset_label_address instruction can +- occupy the delay slot of the call to _mcount. */ +- if (TARGET_PA_20) +- emit_insn (gen_lcla2 (reg, label_rtx)); +- else +- emit_insn (gen_lcla1 (reg, label_rtx)); +- +- emit_insn (gen_load_offset_label_address (gen_rtx_REG (SImode, 25), +- reg, begin_label_rtx, label_rtx)); +- +-#if !NO_DEFERRED_PROFILE_COUNTERS +- { +- rtx count_label_rtx, addr, r24; +- char count_label_name[16]; +- +- funcdef_nos.safe_push (label_no); +- ASM_GENERATE_INTERNAL_LABEL (count_label_name, "LP", label_no); +- count_label_rtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (count_label_name)); +- +- addr = force_reg (Pmode, count_label_rtx); +- r24 = gen_rtx_REG (Pmode, 24); +- emit_move_insn (r24, addr); +- +- call_insn = +- emit_call_insn (gen_call (gen_rtx_MEM (Pmode, +- gen_rtx_SYMBOL_REF (Pmode, +- "_mcount")), +- GEN_INT (TARGET_64BIT ? 24 : 12))); +- +- use_reg (&CALL_INSN_FUNCTION_USAGE (call_insn), r24); +- } +-#else +- +- call_insn = +- emit_call_insn (gen_call (gen_rtx_MEM (Pmode, +- gen_rtx_SYMBOL_REF (Pmode, +- "_mcount")), +- GEN_INT (TARGET_64BIT ? 16 : 8))); ++ if (!use_mcount_pcrel_call) ++ { ++ /* The address of the function is loaded into %r25 with an instruction- ++ relative sequence that avoids the use of relocations. The sequence ++ is split so that the load_offset_label_address instruction can ++ occupy the delay slot of the call to _mcount. */ ++ if (TARGET_PA_20) ++ emit_insn (gen_lcla2 (reg, label_rtx)); ++ else ++ emit_insn (gen_lcla1 (reg, label_rtx)); ++ ++ emit_insn (gen_load_offset_label_address (gen_rtx_REG (SImode, 25), ++ reg, ++ begin_label_rtx, ++ label_rtx)); ++ } ++ ++ if (!NO_DEFERRED_PROFILE_COUNTERS) ++ { ++ rtx count_label_rtx, addr, r24; ++ char count_label_name[16]; ++ ++ funcdef_nos.safe_push (label_no); ++ ASM_GENERATE_INTERNAL_LABEL (count_label_name, "LP", label_no); ++ count_label_rtx = gen_rtx_SYMBOL_REF (Pmode, ++ ggc_strdup (count_label_name)); ++ ++ addr = force_reg (Pmode, count_label_rtx); ++ r24 = gen_rtx_REG (Pmode, 24); ++ emit_move_insn (r24, addr); ++ ++ arg_bytes = GEN_INT (TARGET_64BIT ? 24 : 12); ++ if (use_mcount_pcrel_call) ++ call_insn = emit_call_insn (gen_call_mcount (mcount, arg_bytes, ++ begin_label_rtx)); ++ else ++ call_insn = emit_call_insn (gen_call (mcount, arg_bytes)); + +-#endif ++ use_reg (&CALL_INSN_FUNCTION_USAGE (call_insn), r24); ++ } ++ else ++ { ++ arg_bytes = GEN_INT (TARGET_64BIT ? 16 : 8); ++ if (use_mcount_pcrel_call) ++ call_insn = emit_call_insn (gen_call_mcount (mcount, arg_bytes, ++ begin_label_rtx)); ++ else ++ call_insn = emit_call_insn (gen_call (mcount, arg_bytes)); ++ } + + use_reg (&CALL_INSN_FUNCTION_USAGE (call_insn), gen_rtx_REG (SImode, 25)); + use_reg (&CALL_INSN_FUNCTION_USAGE (call_insn), gen_rtx_REG (SImode, 26)); +@@ -4605,6 +4620,10 @@ + /* Indicate the _mcount call cannot throw, nor will it execute a + non-local goto. */ + make_reg_eh_region_note_nothrow_nononlocal (call_insn); ++ ++ /* Allocate space for fixed arguments. */ ++ if (reg_parm_stack_space > crtl->outgoing_args_size) ++ crtl->outgoing_args_size = reg_parm_stack_space; + } + + /* Fetch the return address for the frame COUNT steps up from +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/pa/pa.md gcc-6-20160721/gcc/config/pa/pa.md +--- gcc-6.1.0/gcc/config/pa/pa.md 2016-03-25 00:59:02.000000000 +0000 ++++ gcc-6-20160721/gcc/config/pa/pa.md 2016-07-20 22:35:50.000000000 +0000 +@@ -8216,6 +8216,170 @@ + (cond [(and (const_int 0) (eq (const_int 0) (pc))) (const_int 12)] + (symbol_ref "pa_attr_length_indirect_call (insn)")))]) + ++/* Expand special pc-relative call to _mcount. */ ++ ++(define_expand "call_mcount" ++ [(parallel [(call (match_operand:SI 0 "" "") ++ (match_operand 1 "" "")) ++ (set (reg:SI 25) ++ (plus:SI (reg:SI 2) ++ (minus:SI (match_operand 2 "" "") ++ (plus:SI (pc) (const_int 4))))) ++ (clobber (reg:SI 2))])] ++ "!TARGET_PORTABLE_RUNTIME" ++ " ++{ ++ rtx op = XEXP (operands[0], 0); ++ rtx nb = operands[1]; ++ rtx lab = operands[2]; ++ ++ if (TARGET_64BIT) ++ { ++ rtx r4 = gen_rtx_REG (word_mode, 4); ++ emit_move_insn (arg_pointer_rtx, ++ gen_rtx_PLUS (word_mode, virtual_outgoing_args_rtx, ++ GEN_INT (64))); ++ emit_call_insn (gen_call_mcount_64bit (op, nb, lab, r4)); ++ } ++ else ++ { ++ if (flag_pic) ++ { ++ rtx r4 = gen_rtx_REG (word_mode, 4); ++ emit_call_insn (gen_call_mcount_pic (op, nb, lab, r4)); ++ } ++ else ++ emit_call_insn (gen_call_mcount_nonpic (op, nb, lab)); ++ } ++ ++ DONE; ++}") ++ ++(define_insn "call_mcount_nonpic" ++ [(call (mem:SI (match_operand 0 "call_operand_address" "")) ++ (match_operand 1 "" "i")) ++ (set (reg:SI 25) ++ (plus:SI (reg:SI 2) ++ (minus:SI (match_operand 2 "" "") ++ (plus:SI (pc) (const_int 4))))) ++ (clobber (reg:SI 2))] ++ "!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT" ++ "* ++{ ++ pa_output_arg_descriptor (insn); ++ return \"{bl|b,l} %0,%%r2\;ldo %2-.-4(%%r2),%%r25\"; ++}" ++ [(set_attr "type" "multi") ++ (set_attr "length" "8")]) ++ ++(define_insn "call_mcount_pic" ++ [(call (mem:SI (match_operand 0 "call_operand_address" "")) ++ (match_operand 1 "" "i")) ++ (set (reg:SI 25) ++ (plus:SI (reg:SI 2) ++ (minus:SI (match_operand 2 "" "") ++ (plus:SI (pc) (const_int 4))))) ++ (clobber (reg:SI 2)) ++ (clobber (match_operand 3)) ++ (use (reg:SI 19))] ++ "!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT" ++ "#") ++ ++(define_split ++ [(parallel [(call (mem:SI (match_operand 0 "call_operand_address" "")) ++ (match_operand 1 "" "")) ++ (set (reg:SI 25) ++ (plus:SI (reg:SI 2) ++ (minus:SI (match_operand 2 "" "") ++ (plus:SI (pc) (const_int 4))))) ++ (clobber (reg:SI 2)) ++ (clobber (match_operand 3)) ++ (use (reg:SI 19))])] ++ "!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT && reload_completed" ++ [(set (match_dup 3) (reg:SI 19)) ++ (parallel [(call (mem:SI (match_dup 0)) ++ (match_dup 1)) ++ (set (reg:SI 25) ++ (plus:SI (reg:SI 2) ++ (minus:SI (match_dup 2) ++ (plus:SI (pc) (const_int 4))))) ++ (clobber (reg:SI 2)) ++ (use (reg:SI 19))]) ++ (set (reg:SI 19) (match_dup 3))] ++ "") ++ ++(define_insn "*call_mcount_pic_post_reload" ++ [(call (mem:SI (match_operand 0 "call_operand_address" "")) ++ (match_operand 1 "" "i")) ++ (set (reg:SI 25) ++ (plus:SI (reg:SI 2) ++ (minus:SI (match_operand 2 "" "") ++ (plus:SI (pc) (const_int 4))))) ++ (clobber (reg:SI 2)) ++ (use (reg:SI 19))] ++ "!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT" ++ "* ++{ ++ pa_output_arg_descriptor (insn); ++ return \"{bl|b,l} %0,%%r2\;ldo %2-.-4(%%r2),%%r25\"; ++}" ++ [(set_attr "type" "multi") ++ (set_attr "length" "8")]) ++ ++(define_insn "call_mcount_64bit" ++ [(call (mem:SI (match_operand 0 "call_operand_address" "")) ++ (match_operand 1 "" "i")) ++ (set (reg:SI 25) ++ (plus:SI (reg:SI 2) ++ (minus:SI (match_operand 2 "" "") ++ (plus:SI (pc) (const_int 4))))) ++ (clobber (reg:DI 2)) ++ (clobber (match_operand 3)) ++ (use (reg:DI 27)) ++ (use (reg:DI 29))] ++ "TARGET_64BIT" ++ "#") ++ ++(define_split ++ [(parallel [(call (mem:SI (match_operand 0 "call_operand_address" "")) ++ (match_operand 1 "" "")) ++ (set (reg:SI 25) ++ (plus:SI (reg:SI 2) ++ (minus:SI (match_operand 2 "" "") ++ (plus:SI (pc) (const_int 4))))) ++ (clobber (reg:DI 2)) ++ (clobber (match_operand 3)) ++ (use (reg:DI 27)) ++ (use (reg:DI 29))])] ++ "TARGET_64BIT && reload_completed" ++ [(set (match_dup 3) (reg:DI 27)) ++ (parallel [(call (mem:SI (match_dup 0)) ++ (match_dup 1)) ++ (set (reg:SI 25) ++ (plus:SI (reg:SI 2) ++ (minus:SI (match_dup 2) ++ (plus:SI (pc) (const_int 4))))) ++ (clobber (reg:DI 2)) ++ (use (reg:DI 27)) ++ (use (reg:DI 29))]) ++ (set (reg:DI 27) (match_dup 3))] ++ "") ++ ++(define_insn "*call_mcount_64bit_post_reload" ++ [(call (mem:SI (match_operand 0 "call_operand_address" "")) ++ (match_operand 1 "" "i")) ++ (set (reg:SI 25) ++ (plus:SI (reg:SI 2) ++ (minus:SI (match_operand 2 "" "") ++ (plus:SI (pc) (const_int 4))))) ++ (clobber (reg:DI 2)) ++ (use (reg:DI 27)) ++ (use (reg:DI 29))] ++ "TARGET_64BIT" ++ "{bl|b,l} %0,%%r2\;ldo %2-.-4(%%r2),%%r25" ++ [(set_attr "type" "multi") ++ (set_attr "length" "8")]) ++ + ;; Call subroutine returning any type. + + (define_expand "untyped_call" +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/40x.md gcc-6-20160721/gcc/config/rs6000/40x.md +--- gcc-6.1.0/gcc/config/rs6000/40x.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/40x.md 2016-07-05 19:19:42.000000000 +0000 +@@ -119,6 +119,6 @@ + "bpu_40x") + + (define_insn_reservation "ppc405-float" 11 +- (and (eq_attr "type" "fpload,fpstore,fpcompare,fp,dmul,sdiv,ddiv") ++ (and (eq_attr "type" "fpload,fpstore,fpcompare,fp,fpsimple,dmul,sdiv,ddiv") + (eq_attr "cpu" "ppc405")) + "fpu_405*10") +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/440.md gcc-6-20160721/gcc/config/rs6000/440.md +--- gcc-6.1.0/gcc/config/rs6000/440.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/440.md 2016-07-05 19:19:42.000000000 +0000 +@@ -107,7 +107,7 @@ + "ppc440_issue,ppc440_f_pipe+ppc440_i_pipe") + + (define_insn_reservation "ppc440-fp" 5 +- (and (eq_attr "type" "fp,dmul") ++ (and (eq_attr "type" "fp,fpsimple,dmul") + (eq_attr "cpu" "ppc440")) + "ppc440_issue,ppc440_f_pipe") + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/476.md gcc-6-20160721/gcc/config/rs6000/476.md +--- gcc-6.1.0/gcc/config/rs6000/476.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/476.md 2016-07-05 19:19:42.000000000 +0000 +@@ -124,7 +124,7 @@ + ppc476_f_pipe+ppc476_i_pipe") + + (define_insn_reservation "ppc476-fp" 6 +- (and (eq_attr "type" "fp,dmul") ++ (and (eq_attr "type" "fp,fpsimple,dmul") + (eq_attr "cpu" "ppc476")) + "ppc476_issue_fp,\ + ppc476_f_pipe") +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/601.md gcc-6-20160721/gcc/config/rs6000/601.md +--- gcc-6.1.0/gcc/config/rs6000/601.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/601.md 2016-07-05 19:19:42.000000000 +0000 +@@ -86,7 +86,7 @@ + "(fpu_ppc601+iu_ppc601*2),nothing*2,bpu_ppc601") + + (define_insn_reservation "ppc601-fp" 4 +- (and (eq_attr "type" "fp") ++ (and (eq_attr "type" "fp,fpsimple") + (eq_attr "cpu" "ppc601")) + "fpu_ppc601") + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/603.md gcc-6-20160721/gcc/config/rs6000/603.md +--- gcc-6.1.0/gcc/config/rs6000/603.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/603.md 2016-07-05 19:19:42.000000000 +0000 +@@ -105,7 +105,7 @@ + "(fpu_603+iu_603*2),bpu_603") + + (define_insn_reservation "ppc603-fp" 3 +- (and (eq_attr "type" "fp") ++ (and (eq_attr "type" "fp,fpsimple") + (eq_attr "cpu" "ppc603")) + "fpu_603") + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/6xx.md gcc-6-20160721/gcc/config/rs6000/6xx.md +--- gcc-6.1.0/gcc/config/rs6000/6xx.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/6xx.md 2016-07-05 19:19:42.000000000 +0000 +@@ -160,7 +160,7 @@ + "fpu_6xx") + + (define_insn_reservation "ppc604-fp" 3 +- (and (eq_attr "type" "fp") ++ (and (eq_attr "type" "fp,fpsimple") + (eq_attr "cpu" "ppc604,ppc604e,ppc620")) + "fpu_6xx") + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/7450.md gcc-6-20160721/gcc/config/rs6000/7450.md +--- gcc-6.1.0/gcc/config/rs6000/7450.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/7450.md 2016-07-05 19:19:42.000000000 +0000 +@@ -120,7 +120,7 @@ + "ppc7450_du,fpu_7450") + + (define_insn_reservation "ppc7450-fp" 5 +- (and (eq_attr "type" "fp,dmul") ++ (and (eq_attr "type" "fp,fpsimple,dmul") + (eq_attr "cpu" "ppc7450")) + "ppc7450_du,fpu_7450") + +@@ -162,7 +162,7 @@ + + ;; Altivec + (define_insn_reservation "ppc7450-vecsimple" 1 +- (and (eq_attr "type" "vecsimple") ++ (and (eq_attr "type" "vecsimple,veclogical,vecmove") + (eq_attr "cpu" "ppc7450")) + "ppc7450_du,ppc7450_vec_du,vecsmpl_7450") + +@@ -172,7 +172,7 @@ + "ppc7450_du,ppc7450_vec_du,veccmplx_7450") + + (define_insn_reservation "ppc7450-veccmp" 2 +- (and (eq_attr "type" "veccmp") ++ (and (eq_attr "type" "veccmp,veccmpfx") + (eq_attr "cpu" "ppc7450")) + "ppc7450_du,ppc7450_vec_du,veccmplx_7450") + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/7xx.md gcc-6-20160721/gcc/config/rs6000/7xx.md +--- gcc-6.1.0/gcc/config/rs6000/7xx.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/7xx.md 2016-07-05 19:19:42.000000000 +0000 +@@ -113,7 +113,7 @@ + "ppc750_du,fpu_7xx") + + (define_insn_reservation "ppc750-fp" 3 +- (and (eq_attr "type" "fp") ++ (and (eq_attr "type" "fp,fpsimple") + (eq_attr "cpu" "ppc750,ppc7400")) + "ppc750_du,fpu_7xx") + +@@ -165,7 +165,7 @@ + + ;; Altivec + (define_insn_reservation "ppc7400-vecsimple" 1 +- (and (eq_attr "type" "vecsimple,veccmp") ++ (and (eq_attr "type" "vecsimple,veclogical,vecmove,veccmp,veccmpfx") + (eq_attr "cpu" "ppc7400")) + "ppc750_du,ppc7400_vec_du,veccmplx_7xx") + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/8540.md gcc-6-20160721/gcc/config/rs6000/8540.md +--- gcc-6.1.0/gcc/config/rs6000/8540.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/8540.md 2016-07-05 19:19:42.000000000 +0000 +@@ -190,7 +190,7 @@ + + ;; Simple vector + (define_insn_reservation "ppc8540_simple_vector" 1 +- (and (eq_attr "type" "vecsimple") ++ (and (eq_attr "type" "vecsimple,veclogical,vecmove") + (eq_attr "cpu" "ppc8540,ppc8548")) + "ppc8540_decode,ppc8540_issue+ppc8540_su1_stage0+ppc8540_retire") + +@@ -202,7 +202,7 @@ + + ;; Vector compare + (define_insn_reservation "ppc8540_vector_compare" 1 +- (and (eq_attr "type" "veccmp") ++ (and (eq_attr "type" "veccmp,veccmpfx") + (eq_attr "cpu" "ppc8540,ppc8548")) + "ppc8540_decode,ppc8540_issue+ppc8540_su1_stage0+ppc8540_retire") + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/a2.md gcc-6-20160721/gcc/config/rs6000/a2.md +--- gcc-6.1.0/gcc/config/rs6000/a2.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/a2.md 2016-07-05 19:19:42.000000000 +0000 +@@ -81,7 +81,7 @@ + + ;; D.8.1 + (define_insn_reservation "ppca2-fp" 6 +- (and (eq_attr "type" "fp") ;; Ignore fpsimple insn types (SPE only). ++ (and (eq_attr "type" "fp,fpsimple") + (eq_attr "cpu" "ppca2")) + "axu") + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/altivec.h gcc-6-20160721/gcc/config/rs6000/altivec.h +--- gcc-6.1.0/gcc/config/rs6000/altivec.h 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/altivec.h 2016-07-01 15:08:18.000000000 +0000 +@@ -327,8 +327,8 @@ + #define vec_sqrt __builtin_vec_sqrt + #define vec_vsx_ld __builtin_vec_vsx_ld + #define vec_vsx_st __builtin_vec_vsx_st +-#define vec_xl __builtin_vec_vsx_ld +-#define vec_xst __builtin_vec_vsx_st ++#define vec_xl __builtin_vec_xl ++#define vec_xst __builtin_vec_xst + + /* Note, xxsldi and xxpermdi were added as __builtin_vsx_ functions + instead of __builtin_vec_ */ +@@ -384,6 +384,31 @@ + #define vec_vupklsw __builtin_vec_vupklsw + #endif + ++#ifdef _ARCH_PWR9 ++/* Vector additions added in ISA 3.0. */ ++#define vec_vctz __builtin_vec_vctz ++#define vec_cntlz __builtin_vec_vctz ++#define vec_vctzb __builtin_vec_vctzb ++#define vec_vctzd __builtin_vec_vctzd ++#define vec_vctzh __builtin_vec_vctzh ++#define vec_vctzw __builtin_vec_vctzw ++#define vec_vprtyb __builtin_vec_vprtyb ++#define vec_vprtybd __builtin_vec_vprtybd ++#define vec_vprtybw __builtin_vec_vprtybw ++ ++#ifdef _ARCH_PPC64 ++#define vec_vprtybq __builtin_vec_vprtybq ++#endif ++ ++#define vec_slv __builtin_vec_vslv ++#define vec_srv __builtin_vec_vsrv ++ ++#define vec_absd __builtin_vec_vadu ++#define vec_absdb __builtin_vec_vadub ++#define vec_absdh __builtin_vec_vaduh ++#define vec_absdw __builtin_vec_vaduw ++#endif ++ + /* Predicates. + For C++, we use templates in order to allow non-parenthesized arguments. + For C, instead, we use macros since non-parenthesized arguments were +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/altivec.md gcc-6-20160721/gcc/config/rs6000/altivec.md +--- gcc-6.1.0/gcc/config/rs6000/altivec.md 2016-02-17 16:23:55.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/altivec.md 2016-07-12 18:12:11.000000000 +0000 +@@ -58,6 +58,7 @@ + UNSPEC_VSUM2SWS + UNSPEC_VSUMSWS + UNSPEC_VPERM ++ UNSPEC_VPERMR + UNSPEC_VPERM_UNS + UNSPEC_VRFIN + UNSPEC_VCFUX +@@ -73,6 +74,9 @@ + UNSPEC_VUNPACK_LO_SIGN_DIRECT + UNSPEC_VUPKHPX + UNSPEC_VUPKLPX ++ UNSPEC_DARN ++ UNSPEC_DARN_32 ++ UNSPEC_DARN_RAW + UNSPEC_DST + UNSPEC_DSTT + UNSPEC_DSTST +@@ -110,6 +114,9 @@ + UNSPEC_STVLXL + UNSPEC_STVRX + UNSPEC_STVRXL ++ UNSPEC_VSLV ++ UNSPEC_VSRV ++ UNSPEC_VADU + UNSPEC_VMULWHUB + UNSPEC_VMULWLUB + UNSPEC_VMULWHSB +@@ -189,6 +196,13 @@ + (KF "FLOAT128_VECTOR_P (KFmode)") + (TF "FLOAT128_VECTOR_P (TFmode)")]) + ++;; Specific iterator for parity which does not have a byte/half-word form, but ++;; does have a quad word form ++(define_mode_iterator VParity [V4SI ++ V2DI ++ V1TI ++ (TI "TARGET_VSX_TIMODE")]) ++ + (define_mode_attr VI_char [(V2DI "d") (V4SI "w") (V8HI "h") (V16QI "b")]) + (define_mode_attr VI_scalar [(V2DI "DI") (V4SI "SI") (V8HI "HI") (V16QI "QI")]) + (define_mode_attr VI_unit [(V16QI "VECTOR_UNIT_ALTIVEC_P (V16QImode)") +@@ -203,6 +217,9 @@ + (define_mode_attr VP_small_lc [(V2DI "v4si") (V4SI "v8hi") (V8HI "v16qi")]) + (define_mode_attr VU_char [(V2DI "w") (V4SI "h") (V8HI "b")]) + ++;; Vector negate ++(define_mode_iterator VNEG [V4SI V2DI]) ++ + ;; Vector move instructions. + (define_insn "*altivec_mov" + [(set (match_operand:VM2 0 "nonimmediate_operand" "=Z,v,v,*Y,*r,*r,v,v,*r") +@@ -225,7 +242,7 @@ + default: gcc_unreachable (); + } + } +- [(set_attr "type" "vecstore,vecload,vecsimple,store,load,*,vecsimple,*,*") ++ [(set_attr "type" "vecstore,vecload,veclogical,store,load,*,veclogical,*,*") + (set_attr "length" "4,4,4,20,20,20,4,8,32")]) + + ;; Unlike other altivec moves, allow the GPRs, since a normal use of TImode +@@ -251,7 +268,7 @@ + default: gcc_unreachable (); + } + } +- [(set_attr "type" "vecstore,vecload,vecsimple,store,load,*,vecsimple,*")]) ++ [(set_attr "type" "vecstore,vecload,veclogical,store,load,*,veclogical,*")]) + + ;; Load up a vector with the most significant bit set by loading up -1 and + ;; doing a shift left +@@ -586,7 +603,7 @@ + (match_operand:VI2 2 "altivec_register_operand" "v")))] + "" + "vcmpequ %0,%1,%2" +- [(set_attr "type" "veccmp")]) ++ [(set_attr "type" "veccmpfx")]) + + (define_insn "*altivec_gt" + [(set (match_operand:VI2 0 "altivec_register_operand" "=v") +@@ -594,7 +611,7 @@ + (match_operand:VI2 2 "altivec_register_operand" "v")))] + "" + "vcmpgts %0,%1,%2" +- [(set_attr "type" "veccmp")]) ++ [(set_attr "type" "veccmpfx")]) + + (define_insn "*altivec_gtu" + [(set (match_operand:VI2 0 "altivec_register_operand" "=v") +@@ -602,7 +619,7 @@ + (match_operand:VI2 2 "altivec_register_operand" "v")))] + "" + "vcmpgtu %0,%1,%2" +- [(set_attr "type" "veccmp")]) ++ [(set_attr "type" "veccmpfx")]) + + (define_insn "*altivec_eqv4sf" + [(set (match_operand:V4SF 0 "altivec_register_operand" "=v") +@@ -637,7 +654,7 @@ + (match_operand:VM 3 "altivec_register_operand" "v")))] + "VECTOR_MEM_ALTIVEC_P (mode)" + "vsel %0,%3,%2,%1" +- [(set_attr "type" "vecperm")]) ++ [(set_attr "type" "vecmove")]) + + (define_insn "*altivec_vsel_uns" + [(set (match_operand:VM 0 "altivec_register_operand" "=v") +@@ -648,7 +665,7 @@ + (match_operand:VM 3 "altivec_register_operand" "v")))] + "VECTOR_MEM_ALTIVEC_P (mode)" + "vsel %0,%3,%2,%1" +- [(set_attr "type" "vecperm")]) ++ [(set_attr "type" "vecmove")]) + + ;; Fused multiply add. + +@@ -1617,6 +1634,24 @@ + "vslo %0,%1,%2" + [(set_attr "type" "vecperm")]) + ++(define_insn "vslv" ++ [(set (match_operand:V16QI 0 "register_operand" "=v") ++ (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v") ++ (match_operand:V16QI 2 "register_operand" "v")] ++ UNSPEC_VSLV))] ++ "TARGET_P9_VECTOR" ++ "vslv %0,%1,%2" ++ [(set_attr "type" "vecsimple")]) ++ ++(define_insn "vsrv" ++ [(set (match_operand:V16QI 0 "register_operand" "=v") ++ (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v") ++ (match_operand:V16QI 2 "register_operand" "v")] ++ UNSPEC_VSRV))] ++ "TARGET_P9_VECTOR" ++ "vsrv %0,%1,%2" ++ [(set_attr "type" "vecsimple")]) ++ + (define_insn "*altivec_vsl" + [(set (match_operand:VI2 0 "register_operand" "=v") + (ashift:VI2 (match_operand:VI2 1 "register_operand" "v") +@@ -1949,32 +1984,30 @@ + + ;; Slightly prefer vperm, since the target does not overlap the source + (define_insn "*altivec_vperm__internal" +- [(set (match_operand:VM 0 "register_operand" "=v,?wo,?&wo") +- (unspec:VM [(match_operand:VM 1 "register_operand" "v,0,wo") +- (match_operand:VM 2 "register_operand" "v,wo,wo") +- (match_operand:V16QI 3 "register_operand" "v,wo,wo")] ++ [(set (match_operand:VM 0 "register_operand" "=v,?wo") ++ (unspec:VM [(match_operand:VM 1 "register_operand" "v,wo") ++ (match_operand:VM 2 "register_operand" "v,0") ++ (match_operand:V16QI 3 "register_operand" "v,wo")] + UNSPEC_VPERM))] + "TARGET_ALTIVEC" + "@ + vperm %0,%1,%2,%3 +- xxperm %x0,%x2,%x3 +- xxlor %x0,%x1,%x1\t\t# xxperm fusion\;xxperm %x0,%x2,%x3" ++ xxperm %x0,%x1,%x3" + [(set_attr "type" "vecperm") +- (set_attr "length" "4,4,8")]) ++ (set_attr "length" "4")]) + + (define_insn "altivec_vperm_v8hiv16qi" +- [(set (match_operand:V16QI 0 "register_operand" "=v,?wo,?&wo") +- (unspec:V16QI [(match_operand:V8HI 1 "register_operand" "v,0,wo") +- (match_operand:V8HI 2 "register_operand" "v,wo,wo") +- (match_operand:V16QI 3 "register_operand" "v,wo,wo")] ++ [(set (match_operand:V16QI 0 "register_operand" "=v,?wo") ++ (unspec:V16QI [(match_operand:V8HI 1 "register_operand" "v,wo") ++ (match_operand:V8HI 2 "register_operand" "v,0") ++ (match_operand:V16QI 3 "register_operand" "v,wo")] + UNSPEC_VPERM))] + "TARGET_ALTIVEC" + "@ + vperm %0,%1,%2,%3 +- xxperm %x0,%x2,%x3 +- xxlor %x0,%x1,%x1\t\t# xxperm fusion\;xxperm %x0,%x2,%x3" ++ xxperm %x0,%x1,%x3" + [(set_attr "type" "vecperm") +- (set_attr "length" "4,4,8")]) ++ (set_attr "length" "4")]) + + (define_expand "altivec_vperm__uns" + [(set (match_operand:VM 0 "register_operand" "") +@@ -1992,18 +2025,17 @@ + }) + + (define_insn "*altivec_vperm__uns_internal" +- [(set (match_operand:VM 0 "register_operand" "=v,?wo,?&wo") +- (unspec:VM [(match_operand:VM 1 "register_operand" "v,0,wo") +- (match_operand:VM 2 "register_operand" "v,wo,wo") +- (match_operand:V16QI 3 "register_operand" "v,wo,wo")] ++ [(set (match_operand:VM 0 "register_operand" "=v,?wo") ++ (unspec:VM [(match_operand:VM 1 "register_operand" "v,wo") ++ (match_operand:VM 2 "register_operand" "v,0") ++ (match_operand:V16QI 3 "register_operand" "v,wo")] + UNSPEC_VPERM_UNS))] + "TARGET_ALTIVEC" + "@ + vperm %0,%1,%2,%3 +- xxperm %x0,%x2,%x3 +- xxlor %x0,%x1,%x1\t\t# xxperm fusion\;xxperm %x0,%x2,%x3" ++ xxperm %x0,%x1,%x3" + [(set_attr "type" "vecperm") +- (set_attr "length" "4,4,8")]) ++ (set_attr "length" "4")]) + + (define_expand "vec_permv16qi" + [(set (match_operand:V16QI 0 "register_operand" "") +@@ -2032,6 +2064,19 @@ + FAIL; + }) + ++(define_insn "*altivec_vpermr__internal" ++ [(set (match_operand:VM 0 "register_operand" "=v,?wo") ++ (unspec:VM [(match_operand:VM 1 "register_operand" "v,wo") ++ (match_operand:VM 2 "register_operand" "v,0") ++ (match_operand:V16QI 3 "register_operand" "v,wo")] ++ UNSPEC_VPERMR))] ++ "TARGET_P9_VECTOR" ++ "@ ++ vpermr %0,%2,%1,%3 ++ xxpermr %x0,%x1,%x3" ++ [(set_attr "type" "vecperm") ++ (set_attr "length" "4")]) ++ + (define_insn "altivec_vrfip" ; ceil + [(set (match_operand:V4SF 0 "register_operand" "=v") + (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "v")] +@@ -2238,7 +2283,7 @@ + (match_dup 2)))] + "" + "vcmpequ. %0,%1,%2" +- [(set_attr "type" "veccmp")]) ++ [(set_attr "type" "veccmpfx")]) + + (define_insn "*altivec_vcmpgts_p" + [(set (reg:CC 74) +@@ -2250,7 +2295,7 @@ + (match_dup 2)))] + "" + "vcmpgts. %0,%1,%2" +- [(set_attr "type" "veccmp")]) ++ [(set_attr "type" "veccmpfx")]) + + (define_insn "*altivec_vcmpgtu_p" + [(set (reg:CC 74) +@@ -2262,7 +2307,7 @@ + (match_dup 2)))] + "" + "vcmpgtu. %0,%1,%2" +- [(set_attr "type" "veccmp")]) ++ [(set_attr "type" "veccmpfx")]) + + (define_insn "*altivec_vcmpeqfp_p" + [(set (reg:CC 74) +@@ -2690,20 +2735,28 @@ + DONE; + }) + ++(define_insn "*p9_neg2" ++ [(set (match_operand:VNEG 0 "altivec_register_operand" "=v") ++ (neg:VNEG (match_operand:VNEG 1 "altivec_register_operand" "v")))] ++ "TARGET_P9_VECTOR" ++ "vneg %0,%1" ++ [(set_attr "type" "vecsimple")]) ++ + (define_expand "neg2" +- [(use (match_operand:VI 0 "register_operand" "")) +- (use (match_operand:VI 1 "register_operand" ""))] +- "TARGET_ALTIVEC" +- " ++ [(set (match_operand:VI2 0 "register_operand" "") ++ (neg:VI2 (match_operand:VI2 1 "register_operand" "")))] ++ "" + { +- rtx vzero; ++ if (!TARGET_P9_VECTOR || (mode != V4SImode && mode != V2DImode)) ++ { ++ rtx vzero; + +- vzero = gen_reg_rtx (GET_MODE (operands[0])); +- emit_insn (gen_altivec_vspltis (vzero, const0_rtx)); +- emit_insn (gen_sub3 (operands[0], vzero, operands[1])); +- +- DONE; +-}") ++ vzero = gen_reg_rtx (GET_MODE (operands[0])); ++ emit_move_insn (vzero, CONST0_RTX (mode)); ++ emit_insn (gen_sub3 (operands[0], vzero, operands[1])); ++ DONE; ++ } ++}) + + (define_expand "udot_prod" + [(set (match_operand:V4SI 0 "register_operand" "=v") +@@ -2791,32 +2844,30 @@ + "") + + (define_insn "vperm_v8hiv4si" +- [(set (match_operand:V4SI 0 "register_operand" "=v,?wo,?&wo") +- (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v,0,wo") +- (match_operand:V4SI 2 "register_operand" "v,wo,wo") +- (match_operand:V16QI 3 "register_operand" "v,wo,wo")] ++ [(set (match_operand:V4SI 0 "register_operand" "=v,?wo") ++ (unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v,wo") ++ (match_operand:V4SI 2 "register_operand" "v,0") ++ (match_operand:V16QI 3 "register_operand" "v,wo")] + UNSPEC_VPERMSI))] + "TARGET_ALTIVEC" + "@ + vperm %0,%1,%2,%3 +- xxperm %x0,%x2,%x3 +- xxlor %x0,%x1,%x1\t\t# xxperm fusion\;xxperm %x0,%x2,%x3" ++ xxperm %x0,%x1,%x3" + [(set_attr "type" "vecperm") +- (set_attr "length" "4,4,8")]) ++ (set_attr "length" "4")]) + + (define_insn "vperm_v16qiv8hi" +- [(set (match_operand:V8HI 0 "register_operand" "=v,?wo,?&wo") +- (unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v,0,wo") +- (match_operand:V8HI 2 "register_operand" "v,wo,wo") +- (match_operand:V16QI 3 "register_operand" "v,wo,wo")] ++ [(set (match_operand:V8HI 0 "register_operand" "=v,?wo") ++ (unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v,wo") ++ (match_operand:V8HI 2 "register_operand" "v,0") ++ (match_operand:V16QI 3 "register_operand" "v,wo")] + UNSPEC_VPERMHI))] + "TARGET_ALTIVEC" + "@ + vperm %0,%1,%2,%3 +- xxperm %x0,%x2,%x3 +- xxlor %x0,%x1,%x1\t\t# xxperm fusion\;xxperm %x0,%x2,%x3" ++ xxperm %x0,%x1,%x3" + [(set_attr "type" "vecperm") +- (set_attr "length" "4,4,8")]) ++ (set_attr "length" "4")]) + + + (define_expand "vec_unpacku_hi_v16qi" +@@ -3353,7 +3404,7 @@ + }") + + +-;; Power8 vector instructions encoded as Altivec instructions ++;; Power8/power9 vector instructions encoded as Altivec instructions + + ;; Vector count leading zeros + (define_insn "*p8v_clz2" +@@ -3364,6 +3415,33 @@ + [(set_attr "length" "4") + (set_attr "type" "vecsimple")]) + ++;; Vector absolute difference unsigned ++(define_expand "vadu3" ++ [(set (match_operand:VI 0 "register_operand") ++ (unspec:VI [(match_operand:VI 1 "register_operand") ++ (match_operand:VI 2 "register_operand")] ++ UNSPEC_VADU))] ++ "TARGET_P9_VECTOR") ++ ++;; Vector absolute difference unsigned ++(define_insn "*p9_vadu3" ++ [(set (match_operand:VI 0 "register_operand" "=v") ++ (unspec:VI [(match_operand:VI 1 "register_operand" "v") ++ (match_operand:VI 2 "register_operand" "v")] ++ UNSPEC_VADU))] ++ "TARGET_P9_VECTOR" ++ "vabsdu %0,%1,%2" ++ [(set_attr "type" "vecsimple")]) ++ ++;; Vector count trailing zeros ++(define_insn "*p9v_ctz2" ++ [(set (match_operand:VI2 0 "register_operand" "=v") ++ (ctz:VI2 (match_operand:VI2 1 "register_operand" "v")))] ++ "TARGET_P9_VECTOR" ++ "vctz %0,%1" ++ [(set_attr "length" "4") ++ (set_attr "type" "vecsimple")]) ++ + ;; Vector population count + (define_insn "*p8v_popcount2" + [(set (match_operand:VI2 0 "register_operand" "=v") +@@ -3373,6 +3451,15 @@ + [(set_attr "length" "4") + (set_attr "type" "vecsimple")]) + ++;; Vector parity ++(define_insn "*p9v_parity2" ++ [(set (match_operand:VParity 0 "register_operand" "=v") ++ (parity:VParity (match_operand:VParity 1 "register_operand" "v")))] ++ "TARGET_P9_VECTOR" ++ "vprtyb %0,%1" ++ [(set_attr "length" "4") ++ (set_attr "type" "vecsimple")]) ++ + ;; Vector Gather Bits by Bytes by Doubleword + (define_insn "p8v_vgbbd" + [(set (match_operand:V16QI 0 "register_operand" "=v") +@@ -3540,6 +3627,27 @@ + [(set_attr "length" "4") + (set_attr "type" "vecsimple")]) + ++(define_insn "darn_32" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (unspec:SI [(const_int 0)] UNSPEC_DARN_32))] ++ "TARGET_P9_MISC" ++ "darn %0,0" ++ [(set_attr "type" "integer")]) ++ ++(define_insn "darn_raw" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (unspec:DI [(const_int 0)] UNSPEC_DARN_RAW))] ++ "TARGET_P9_MISC && TARGET_64BIT" ++ "darn %0,2" ++ [(set_attr "type" "integer")]) ++ ++(define_insn "darn" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (unspec:DI [(const_int 0)] UNSPEC_DARN))] ++ "TARGET_P9_MISC && TARGET_64BIT" ++ "darn %0,1" ++ [(set_attr "type" "integer")]) ++ + (define_expand "bcd_" + [(parallel [(set (reg:CCFP 74) + (compare:CCFP +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/cell.md gcc-6-20160721/gcc/config/rs6000/cell.md +--- gcc-6.1.0/gcc/config/rs6000/cell.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/cell.md 2016-07-05 19:19:42.000000000 +0000 +@@ -306,7 +306,7 @@ + + ; Basic FP latency is 10 cycles, thoughput is 1/cycle + (define_insn_reservation "cell-fp" 10 +- (and (eq_attr "type" "fp,dmul") ++ (and (eq_attr "type" "fp,fpsimple,dmul") + (eq_attr "cpu" "cell")) + "slot01,vsu1_cell,vsu1_cell*8") + +@@ -329,7 +329,7 @@ + + ; VMX + (define_insn_reservation "cell-vecsimple" 4 +- (and (eq_attr "type" "vecsimple") ++ (and (eq_attr "type" "vecsimple,veclogical,vecmove") + (eq_attr "cpu" "cell")) + "slot01,vsu1_cell,vsu1_cell*2") + +@@ -341,7 +341,7 @@ + + ;; TODO: add support for recording instructions + (define_insn_reservation "cell-veccmp" 4 +- (and (eq_attr "type" "veccmp") ++ (and (eq_attr "type" "veccmp,veccmpfx") + (eq_attr "cpu" "cell")) + "slot01,vsu1_cell,vsu1_cell*2") + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/constraints.md gcc-6-20160721/gcc/config/rs6000/constraints.md +--- gcc-6.1.0/gcc/config/rs6000/constraints.md 2016-03-25 09:10:03.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/constraints.md 2016-06-09 23:28:23.000000000 +0000 +@@ -140,6 +140,10 @@ + (and (match_code "const_int") + (match_test "TARGET_VSX && (ival == VECTOR_ELEMENT_SCALAR_64BIT)"))) + ++(define_constraint "wE" ++ "Vector constant that can be loaded with the XXSPLTIB instruction." ++ (match_test "xxspltib_constant_nosplit (op, mode)")) ++ + ;; Extended fusion store + (define_memory_constraint "wF" + "Memory operand suitable for power9 fusion load/stores" +@@ -156,11 +160,26 @@ + (and (match_test "TARGET_DIRECT_MOVE_128") + (match_test "(ival == VECTOR_ELEMENT_MFVSRLD_64BIT)")))) + ++;; Generate the XXORC instruction to set a register to all 1's ++(define_constraint "wM" ++ "Match vector constant with all 1's if the XXLORC instruction is available" ++ (and (match_test "TARGET_P8_VECTOR") ++ (match_operand 0 "all_ones_constant"))) ++ ++;; ISA 3.0 vector d-form addresses ++(define_memory_constraint "wO" ++ "Memory operand suitable for the ISA 3.0 vector d-form instructions." ++ (match_operand 0 "vsx_quad_dform_memory_operand")) ++ + ;; Lq/stq validates the address for load/store quad + (define_memory_constraint "wQ" + "Memory operand suitable for the load/store quad instructions" + (match_operand 0 "quad_memory_operand")) + ++(define_constraint "wS" ++ "Vector constant that can be loaded with XXSPLTIB & sign extension." ++ (match_test "xxspltib_constant_split (op, mode)")) ++ + ;; Altivec style load/store that ignores the bottom bits of the address + (define_memory_constraint "wZ" + "Indexed or indirect memory operand, ignoring the bottom 4 bits" +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/crypto.md gcc-6-20160721/gcc/config/rs6000/crypto.md +--- gcc-6.1.0/gcc/config/rs6000/crypto.md 2016-02-05 15:25:39.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/crypto.md 2016-07-06 02:31:08.000000000 +0000 +@@ -107,4 +107,4 @@ + UNSPEC_VSHASIGMA))] + "TARGET_CRYPTO" + "vshasigma %0,%1,%2,%3" +- [(set_attr "type" "crypto")]) ++ [(set_attr "type" "vecsimple")]) +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/dfp.md gcc-6-20160721/gcc/config/rs6000/dfp.md +--- gcc-6.1.0/gcc/config/rs6000/dfp.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/dfp.md 2016-07-07 19:42:07.000000000 +0000 +@@ -58,7 +58,7 @@ + (float_extend:DD (match_operand:SD 1 "gpc_reg_operand" "f")))] + "TARGET_DFP" + "dctdp %0,%1" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + (define_expand "extendsdtd2" + [(set (match_operand:TD 0 "gpc_reg_operand" "=d") +@@ -76,7 +76,7 @@ + (float_truncate:SD (match_operand:DD 1 "gpc_reg_operand" "d")))] + "TARGET_DFP" + "drsp %0,%1" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + (define_expand "negdd2" + [(set (match_operand:DD 0 "gpc_reg_operand" "") +@@ -89,7 +89,7 @@ + (neg:DD (match_operand:DD 1 "gpc_reg_operand" "d")))] + "TARGET_HARD_FLOAT && TARGET_FPRS" + "fneg %0,%1" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "fpsimple")]) + + (define_expand "absdd2" + [(set (match_operand:DD 0 "gpc_reg_operand" "") +@@ -102,14 +102,14 @@ + (abs:DD (match_operand:DD 1 "gpc_reg_operand" "d")))] + "TARGET_HARD_FLOAT && TARGET_FPRS" + "fabs %0,%1" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "fpsimple")]) + + (define_insn "*nabsdd2_fpr" + [(set (match_operand:DD 0 "gpc_reg_operand" "=d") + (neg:DD (abs:DD (match_operand:DD 1 "gpc_reg_operand" "d"))))] + "TARGET_HARD_FLOAT && TARGET_FPRS" + "fnabs %0,%1" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "fpsimple")]) + + (define_expand "negtd2" + [(set (match_operand:TD 0 "gpc_reg_operand" "") +@@ -124,7 +124,7 @@ + "@ + fneg %0,%1 + fneg %0,%1\;fmr %L0,%L1" +- [(set_attr "type" "fp") ++ [(set_attr "type" "fpsimple") + (set_attr "length" "4,8")]) + + (define_expand "abstd2" +@@ -140,7 +140,7 @@ + "@ + fabs %0,%1 + fabs %0,%1\;fmr %L0,%L1" +- [(set_attr "type" "fp") ++ [(set_attr "type" "fpsimple") + (set_attr "length" "4,8")]) + + (define_insn "*nabstd2_fpr" +@@ -150,7 +150,7 @@ + "@ + fnabs %0,%1 + fnabs %0,%1\;fmr %L0,%L1" +- [(set_attr "type" "fp") ++ [(set_attr "type" "fpsimple") + (set_attr "length" "4,8")]) + + ;; Hardware support for decimal floating point operations. +@@ -160,7 +160,7 @@ + (float_extend:TD (match_operand:DD 1 "gpc_reg_operand" "d")))] + "TARGET_DFP" + "dctqpq %0,%1" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + ;; The result of drdpq is an even/odd register pair with the converted + ;; value in the even register and zero in the odd register. +@@ -173,7 +173,7 @@ + (clobber (match_scratch:TD 2 "=d"))] + "TARGET_DFP" + "drdpq %2,%1\;fmr %0,%2" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + (define_insn "adddd3" + [(set (match_operand:DD 0 "gpc_reg_operand" "=d") +@@ -181,7 +181,7 @@ + (match_operand:DD 2 "gpc_reg_operand" "d")))] + "TARGET_DFP" + "dadd %0,%1,%2" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + (define_insn "addtd3" + [(set (match_operand:TD 0 "gpc_reg_operand" "=d") +@@ -189,7 +189,7 @@ + (match_operand:TD 2 "gpc_reg_operand" "d")))] + "TARGET_DFP" + "daddq %0,%1,%2" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + (define_insn "subdd3" + [(set (match_operand:DD 0 "gpc_reg_operand" "=d") +@@ -197,7 +197,7 @@ + (match_operand:DD 2 "gpc_reg_operand" "d")))] + "TARGET_DFP" + "dsub %0,%1,%2" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + (define_insn "subtd3" + [(set (match_operand:TD 0 "gpc_reg_operand" "=d") +@@ -205,7 +205,7 @@ + (match_operand:TD 2 "gpc_reg_operand" "d")))] + "TARGET_DFP" + "dsubq %0,%1,%2" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + (define_insn "muldd3" + [(set (match_operand:DD 0 "gpc_reg_operand" "=d") +@@ -213,7 +213,7 @@ + (match_operand:DD 2 "gpc_reg_operand" "d")))] + "TARGET_DFP" + "dmul %0,%1,%2" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + (define_insn "multd3" + [(set (match_operand:TD 0 "gpc_reg_operand" "=d") +@@ -221,7 +221,7 @@ + (match_operand:TD 2 "gpc_reg_operand" "d")))] + "TARGET_DFP" + "dmulq %0,%1,%2" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + (define_insn "divdd3" + [(set (match_operand:DD 0 "gpc_reg_operand" "=d") +@@ -229,7 +229,7 @@ + (match_operand:DD 2 "gpc_reg_operand" "d")))] + "TARGET_DFP" + "ddiv %0,%1,%2" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + (define_insn "divtd3" + [(set (match_operand:TD 0 "gpc_reg_operand" "=d") +@@ -237,7 +237,7 @@ + (match_operand:TD 2 "gpc_reg_operand" "d")))] + "TARGET_DFP" + "ddivq %0,%1,%2" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + (define_insn "*cmpdd_internal1" + [(set (match_operand:CCFP 0 "cc_reg_operand" "=y") +@@ -245,7 +245,7 @@ + (match_operand:DD 2 "gpc_reg_operand" "d")))] + "TARGET_DFP" + "dcmpu %0,%1,%2" +- [(set_attr "type" "fpcompare")]) ++ [(set_attr "type" "dfp")]) + + (define_insn "*cmptd_internal1" + [(set (match_operand:CCFP 0 "cc_reg_operand" "=y") +@@ -253,21 +253,21 @@ + (match_operand:TD 2 "gpc_reg_operand" "d")))] + "TARGET_DFP" + "dcmpuq %0,%1,%2" +- [(set_attr "type" "fpcompare")]) ++ [(set_attr "type" "dfp")]) + + (define_insn "floatdidd2" + [(set (match_operand:DD 0 "gpc_reg_operand" "=d") + (float:DD (match_operand:DI 1 "gpc_reg_operand" "d")))] + "TARGET_DFP && TARGET_POPCNTD" + "dcffix %0,%1" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + (define_insn "floatditd2" + [(set (match_operand:TD 0 "gpc_reg_operand" "=d") + (float:TD (match_operand:DI 1 "gpc_reg_operand" "d")))] + "TARGET_DFP" + "dcffixq %0,%1" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + ;; Convert a decimal64 to a decimal64 whose value is an integer. + ;; This is the first stage of converting it to an integer type. +@@ -277,7 +277,7 @@ + (fix:DD (match_operand:DD 1 "gpc_reg_operand" "d")))] + "TARGET_DFP" + "drintn. 0,%0,%1,1" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + ;; Convert a decimal64 whose value is an integer to an actual integer. + ;; This is the second stage of converting decimal float to integer type. +@@ -287,7 +287,7 @@ + (fix:DI (match_operand:DD 1 "gpc_reg_operand" "d")))] + "TARGET_DFP" + "dctfix %0,%1" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + ;; Convert a decimal128 to a decimal128 whose value is an integer. + ;; This is the first stage of converting it to an integer type. +@@ -297,7 +297,7 @@ + (fix:TD (match_operand:TD 1 "gpc_reg_operand" "d")))] + "TARGET_DFP" + "drintnq. 0,%0,%1,1" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + ;; Convert a decimal128 whose value is an integer to an actual integer. + ;; This is the second stage of converting decimal float to integer type. +@@ -307,7 +307,7 @@ + (fix:DI (match_operand:TD 1 "gpc_reg_operand" "d")))] + "TARGET_DFP" + "dctfixq %0,%1" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + + ;; Decimal builtin support +@@ -318,8 +318,11 @@ + UNSPEC_DXEX + UNSPEC_DIEX + UNSPEC_DSCLI ++ UNSPEC_DTSTSFI + UNSPEC_DSCRI]) + ++(define_code_iterator DFP_TEST [eq lt gt unordered]) ++ + (define_mode_iterator D64_D128 [DD TD]) + + (define_mode_attr dfp_suffix [(DD "") +@@ -332,7 +335,7 @@ + UNSPEC_DDEDPD))] + "TARGET_DFP" + "ddedpd %1,%0,%2" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + (define_insn "dfp_denbcd_" + [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d") +@@ -341,7 +344,7 @@ + UNSPEC_DENBCD))] + "TARGET_DFP" + "denbcd %1,%0,%2" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + (define_insn "dfp_dxex_" + [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d") +@@ -349,7 +352,7 @@ + UNSPEC_DXEX))] + "TARGET_DFP" + "dxex %0,%1" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + (define_insn "dfp_diex_" + [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d") +@@ -358,6 +361,42 @@ + UNSPEC_DXEX))] + "TARGET_DFP" + "diex %0,%1,%2" ++ [(set_attr "type" "dfp")]) ++ ++(define_expand "dfptstsfi__" ++ [(set (match_dup 3) ++ (compare:CCFP ++ (unspec:D64_D128 ++ [(match_operand:SI 1 "const_int_operand" "n") ++ (match_operand:D64_D128 2 "gpc_reg_operand" "d")] ++ UNSPEC_DTSTSFI) ++ (match_dup 4))) ++ (set (match_operand:SI 0 "register_operand" "") ++ (DFP_TEST:SI (match_dup 3) ++ (const_int 0))) ++ ] ++ "TARGET_P9_MISC" ++{ ++ operands[3] = gen_reg_rtx (CCFPmode); ++ operands[4] = const0_rtx; ++}) ++ ++(define_insn "*dfp_sgnfcnc_" ++ [(set (match_operand:CCFP 0 "" "=y") ++ (compare:CCFP ++ (unspec:D64_D128 [(match_operand:SI 1 "const_int_operand" "n") ++ (match_operand:D64_D128 2 "gpc_reg_operand" "d")] ++ UNSPEC_DTSTSFI) ++ (match_operand:SI 3 "zero_constant" "j")))] ++ "TARGET_P9_MISC" ++{ ++ /* If immediate operand is greater than 63, it will behave as if ++ the value had been 63. The code generator does not support ++ immediate operand values greater than 63. */ ++ if (!(IN_RANGE (INTVAL (operands[1]), 0, 63))) ++ operands[1] = GEN_INT (63); ++ return "dtstsfi %0,%1,%2"; ++} + [(set_attr "type" "fp")]) + + (define_insn "dfp_dscli_" +@@ -367,7 +406,7 @@ + UNSPEC_DSCLI))] + "TARGET_DFP" + "dscli %0,%1,%2" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) + + (define_insn "dfp_dscri_" + [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d") +@@ -376,4 +415,4 @@ + UNSPEC_DSCRI))] + "TARGET_DFP" + "dscri %0,%1,%2" +- [(set_attr "type" "fp")]) ++ [(set_attr "type" "dfp")]) +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/e300c2c3.md gcc-6-20160721/gcc/config/rs6000/e300c2c3.md +--- gcc-6.1.0/gcc/config/rs6000/e300c2c3.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/e300c2c3.md 2016-07-05 19:19:42.000000000 +0000 +@@ -150,7 +150,7 @@ + "ppce300c3_decode,ppce300c3_issue+ppce300c3_fpu,nothing,ppce300c3_retire") + + (define_insn_reservation "ppce300c3_fp" 3 +- (and (eq_attr "type" "fp") ++ (and (eq_attr "type" "fp,fpsimple") + (eq_attr "cpu" "ppce300c3")) + "ppce300c3_decode,ppce300c3_issue+ppce300c3_fpu,nothing,ppce300c3_retire") + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/e6500.md gcc-6-20160721/gcc/config/rs6000/e6500.md +--- gcc-6.1.0/gcc/config/rs6000/e6500.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/e6500.md 2016-07-05 19:19:42.000000000 +0000 +@@ -205,7 +205,7 @@ + + ;; VSFX. + (define_insn_reservation "e6500_vecsimple" 1 +- (and (eq_attr "type" "vecsimple,veccmp") ++ (and (eq_attr "type" "vecsimple,veclogical,vecmove,veccmp,veccmpfx") + (eq_attr "cpu" "ppce6500")) + "e6500_decode,e6500_vec") + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/htm.md gcc-6-20160721/gcc/config/rs6000/htm.md +--- gcc-6.1.0/gcc/config/rs6000/htm.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/htm.md 2016-07-06 02:31:08.000000000 +0000 +@@ -72,7 +72,7 @@ + (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))] + "TARGET_HTM" + "tabort. %0" +- [(set_attr "type" "htm") ++ [(set_attr "type" "htmsimple") + (set_attr "length" "4")]) + + (define_expand "tabortc" +@@ -98,7 +98,7 @@ + (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))] + "TARGET_HTM" + "tabortc. %0,%1,%2" +- [(set_attr "type" "htm") ++ [(set_attr "type" "htmsimple") + (set_attr "length" "4")]) + + (define_expand "tabortci" +@@ -124,7 +124,7 @@ + (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))] + "TARGET_HTM" + "tabortci. %0,%1,%2" +- [(set_attr "type" "htm") ++ [(set_attr "type" "htmsimple") + (set_attr "length" "4")]) + + (define_expand "tbegin" +@@ -208,7 +208,7 @@ + (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))] + "TARGET_HTM" + "trechkpt." +- [(set_attr "type" "htm") ++ [(set_attr "type" "htmsimple") + (set_attr "length" "4")]) + + (define_expand "treclaim" +@@ -230,7 +230,7 @@ + (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))] + "TARGET_HTM" + "treclaim. %0" +- [(set_attr "type" "htm") ++ [(set_attr "type" "htmsimple") + (set_attr "length" "4")]) + + (define_expand "tsr" +@@ -252,7 +252,7 @@ + (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))] + "TARGET_HTM" + "tsr. %0" +- [(set_attr "type" "htm") ++ [(set_attr "type" "htmsimple") + (set_attr "length" "4")]) + + (define_expand "ttest" +@@ -272,7 +272,7 @@ + (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))] + "TARGET_HTM" + "tabortwci. 0,1,0" +- [(set_attr "type" "htm") ++ [(set_attr "type" "htmsimple") + (set_attr "length" "4")]) + + (define_insn "htm_mfspr_" +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/mpc.md gcc-6-20160721/gcc/config/rs6000/mpc.md +--- gcc-6.1.0/gcc/config/rs6000/mpc.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/mpc.md 2016-07-05 19:19:42.000000000 +0000 +@@ -81,7 +81,7 @@ + "fpu_mpc,bpu_mpc") + + (define_insn_reservation "mpccore-fp" 4 +- (and (eq_attr "type" "fp") ++ (and (eq_attr "type" "fp,fpsimple") + (eq_attr "cpu" "mpccore")) + "fpu_mpc*2") + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/power4.md gcc-6-20160721/gcc/config/rs6000/power4.md +--- gcc-6.1.0/gcc/config/rs6000/power4.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/power4.md 2016-07-05 19:19:42.000000000 +0000 +@@ -381,7 +381,7 @@ + + ; Basic FP latency is 6 cycles + (define_insn_reservation "power4-fp" 6 +- (and (eq_attr "type" "fp,dmul") ++ (and (eq_attr "type" "fp,fpsimple,dmul") + (eq_attr "cpu" "power4")) + "fpq_power4") + +@@ -410,7 +410,7 @@ + + ; VMX + (define_insn_reservation "power4-vecsimple" 2 +- (and (eq_attr "type" "vecsimple") ++ (and (eq_attr "type" "vecsimple,veclogical,vecmove") + (eq_attr "cpu" "power4")) + "vq_power4") + +@@ -421,7 +421,7 @@ + + ; vecfp compare + (define_insn_reservation "power4-veccmp" 8 +- (and (eq_attr "type" "veccmp") ++ (and (eq_attr "type" "veccmp,veccmpfx") + (eq_attr "cpu" "power4")) + "vq_power4") + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/power5.md gcc-6-20160721/gcc/config/rs6000/power5.md +--- gcc-6.1.0/gcc/config/rs6000/power5.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/power5.md 2016-07-05 19:19:42.000000000 +0000 +@@ -322,7 +322,7 @@ + + ; Basic FP latency is 6 cycles + (define_insn_reservation "power5-fp" 6 +- (and (eq_attr "type" "fp,dmul") ++ (and (eq_attr "type" "fp,fpsimple,dmul") + (eq_attr "cpu" "power5")) + "fpq_power5") + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/power6.md gcc-6-20160721/gcc/config/rs6000/power6.md +--- gcc-6.1.0/gcc/config/rs6000/power6.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/power6.md 2016-07-06 02:31:08.000000000 +0000 +@@ -500,7 +500,7 @@ + (define_bypass 9 "power6-mtcr" "power6-branch") + + (define_insn_reservation "power6-fp" 6 +- (and (eq_attr "type" "fp,dmul") ++ (and (eq_attr "type" "fp,fpsimple,dmul,dfp") + (eq_attr "cpu" "power6")) + "FPU_power6") + +@@ -556,7 +556,7 @@ + "LSF_power6") + + (define_insn_reservation "power6-vecsimple" 3 +- (and (eq_attr "type" "vecsimple") ++ (and (eq_attr "type" "vecsimple,veclogical,vecmove") + (eq_attr "cpu" "power6")) + "FPU_power6") + +@@ -568,7 +568,7 @@ + (define_bypass 4 "power6-vecsimple" "power6-vecstore" ) + + (define_insn_reservation "power6-veccmp" 1 +- (and (eq_attr "type" "veccmp") ++ (and (eq_attr "type" "veccmp,veccmpfx") + (eq_attr "cpu" "power6")) + "FPU_power6") + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/power7.md gcc-6-20160721/gcc/config/rs6000/power7.md +--- gcc-6.1.0/gcc/config/rs6000/power7.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/power7.md 2016-07-06 02:31:08.000000000 +0000 +@@ -292,7 +292,7 @@ + + ; VS Unit (includes FP/VSX/VMX/DFP) + (define_insn_reservation "power7-fp" 6 +- (and (eq_attr "type" "fp,dmul") ++ (and (eq_attr "type" "fp,fpsimple,dmul,dfp") + (eq_attr "cpu" "power7")) + "DU_power7,VSU_power7") + +@@ -324,7 +324,7 @@ + "DU_power7,VSU_power7") + + (define_insn_reservation "power7-vecsimple" 2 +- (and (eq_attr "type" "vecsimple,veccmp") ++ (and (eq_attr "type" "vecsimple,veclogical,vecmove,veccmp,veccmpfx") + (eq_attr "cpu" "power7")) + "DU_power7,vsu1_power7") + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/power8.md gcc-6-20160721/gcc/config/rs6000/power8.md +--- gcc-6.1.0/gcc/config/rs6000/power8.md 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/power8.md 2016-07-06 02:31:08.000000000 +0000 +@@ -317,7 +317,7 @@ + + ; VS Unit (includes FP/VSX/VMX/DFP/Crypto) + (define_insn_reservation "power8-fp" 6 +- (and (eq_attr "type" "fp,dmul") ++ (and (eq_attr "type" "fp,fpsimple,dmul,dfp") + (eq_attr "cpu" "power8")) + "DU_any_power8,VSU_power8") + +@@ -350,7 +350,8 @@ + "DU_any_power8,VSU_power8") + + (define_insn_reservation "power8-vecsimple" 2 +- (and (eq_attr "type" "vecperm,vecsimple,veccmp") ++ (and (eq_attr "type" "vecperm,vecsimple,veclogical,vecmove,veccmp, ++ veccmpfx") + (eq_attr "cpu" "power8")) + "DU_any_power8,VSU_power8") + +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/power9.md gcc-6-20160721/gcc/config/rs6000/power9.md +--- gcc-6.1.0/gcc/config/rs6000/power9.md 1970-01-01 00:00:00.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/power9.md 2016-07-06 02:31:08.000000000 +0000 +@@ -0,0 +1,477 @@ ++;; Scheduling description for IBM POWER9 processor. ++;; Copyright (C) 2016 Free Software Foundation, Inc. ++;; ++;; Contributed by Pat Haugen (pthaugen@us.ibm.com). ++ ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published ++;; by the Free Software Foundation; either version 3, or (at your ++;; option) any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but WITHOUT ++;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++;; License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++(define_automaton "power9dsp,power9lsu,power9vsu,power9misc") ++ ++(define_cpu_unit "lsu0_power9,lsu1_power9,lsu2_power9,lsu3_power9" "power9lsu") ++(define_cpu_unit "vsu0_power9,vsu1_power9,vsu2_power9,vsu3_power9" "power9vsu") ++; Two vector permute units, part of vsu ++(define_cpu_unit "prm0_power9,prm1_power9" "power9vsu") ++; Two fixed point divide units, not pipelined ++(define_cpu_unit "fx_div0_power9,fx_div1_power9" "power9misc") ++(define_cpu_unit "bru_power9,cryptu_power9,dfu_power9" "power9misc") ++ ++(define_cpu_unit "x0_power9,x1_power9,xa0_power9,xa1_power9, ++ x2_power9,x3_power9,xb0_power9,xb1_power9, ++ br0_power9,br1_power9" "power9dsp") ++ ++ ++; Dispatch port reservations ++; ++; Power9 can dispatch a maximum of 6 iops per cycle with the following ++; general restrictions (other restrictions also apply): ++; 1) At most 2 iops per execution slice ++; 2) At most 2 iops to the branch unit ++; Note that insn position in a dispatch group of 6 insns does not infer which ++; execution slice the insn is routed to. The units are used to infer the ++; conflicts that exist (i.e. an 'even' requirement will preclude dispatch ++; with 2 insns with 'superslice' requirement). ++ ++; The xa0/xa1 units really represent the 3rd dispatch port for a superslice but ++; are listed as separate units to allow those insns that preclude its use to ++; still be scheduled two to a superslice while reserving the 3rd slot. The ++; same applies for xb0/xb1. ++(define_reservation "DU_xa_power9" "xa0_power9+xa1_power9") ++(define_reservation "DU_xb_power9" "xb0_power9+xb1_power9") ++ ++; Any execution slice dispatch ++(define_reservation "DU_any_power9" ++ "x0_power9|x1_power9|DU_xa_power9|x2_power9|x3_power9| ++ DU_xb_power9") ++ ++; Even slice, actually takes even/odd slots ++(define_reservation "DU_even_power9" "x0_power9+x1_power9|x2_power9+x3_power9") ++ ++; Slice plus 3rd slot ++(define_reservation "DU_slice_3_power9" ++ "x0_power9+xa0_power9|x1_power9+xa1_power9| ++ x2_power9+xb0_power9|x3_power9+xb1_power9") ++ ++; Superslice ++(define_reservation "DU_super_power9" ++ "x0_power9+x1_power9|x2_power9+x3_power9") ++ ++; 2-way cracked ++(define_reservation "DU_C2_power9" "x0_power9+x1_power9| ++ x1_power9+DU_xa_power9| ++ x1_power9+x2_power9| ++ DU_xa_power9+x2_power9| ++ x2_power9+x3_power9| ++ x3_power9+DU_xb_power9") ++ ++; 2-way cracked plus 3rd slot ++(define_reservation "DU_C2_3_power9" "x0_power9+x1_power9+xa0_power9| ++ x1_power9+x2_power9+xa0_power9| ++ x1_power9+x2_power9+xb0_power9| ++ x2_power9+x3_power9+xb0_power9") ++ ++; 3-way cracked (consumes whole decode/dispatch cycle) ++(define_reservation "DU_C3_power9" ++ "x0_power9+x1_power9+xa0_power9+xa1_power9+x2_power9+ ++ x3_power9+xb0_power9+xb1_power9+br0_power9+br1_power9") ++ ++; Branch ports ++(define_reservation "DU_branch_power9" "br0_power9|br1_power9") ++ ++ ++; Execution unit reservations ++(define_reservation "LSU_power9" ++ "lsu0_power9|lsu1_power9|lsu2_power9|lsu3_power9") ++ ++(define_reservation "LSU_pair_power9" ++ "lsu0_power9+lsu1_power9|lsu1_power9+lsu2_power9| ++ lsu2_power9+lsu3_power9|lsu3_power9+lsu0_power9") ++ ++(define_reservation "VSU_power9" ++ "vsu0_power9|vsu1_power9|vsu2_power9|vsu3_power9") ++ ++(define_reservation "VSU_super_power9" ++ "vsu0_power9+vsu1_power9|vsu2_power9+vsu3_power9") ++ ++(define_reservation "VSU_PRM_power9" "prm0_power9|prm1_power9") ++ ++ ++; LS Unit ++(define_insn_reservation "power9-load" 4 ++ (and (eq_attr "type" "load") ++ (eq_attr "sign_extend" "no") ++ (eq_attr "update" "no") ++ (eq_attr "cpu" "power9")) ++ "DU_any_power9,LSU_power9") ++ ++(define_insn_reservation "power9-load-update" 4 ++ (and (eq_attr "type" "load") ++ (eq_attr "sign_extend" "no") ++ (eq_attr "update" "yes") ++ (eq_attr "cpu" "power9")) ++ "DU_C2_power9,LSU_power9+VSU_power9") ++ ++(define_insn_reservation "power9-load-ext" 6 ++ (and (eq_attr "type" "load") ++ (eq_attr "sign_extend" "yes") ++ (eq_attr "update" "no") ++ (eq_attr "cpu" "power9")) ++ "DU_C2_power9,LSU_power9") ++ ++(define_insn_reservation "power9-load-ext-update" 6 ++ (and (eq_attr "type" "load") ++ (eq_attr "sign_extend" "yes") ++ (eq_attr "update" "yes") ++ (eq_attr "cpu" "power9")) ++ "DU_C3_power9,LSU_power9+VSU_power9") ++ ++(define_insn_reservation "power9-fpload-double" 4 ++ (and (eq_attr "type" "fpload") ++ (eq_attr "update" "no") ++ (eq_attr "size" "64") ++ (eq_attr "cpu" "power9")) ++ "DU_slice_3_power9,LSU_power9") ++ ++(define_insn_reservation "power9-fpload-update-double" 4 ++ (and (eq_attr "type" "fpload") ++ (eq_attr "update" "yes") ++ (eq_attr "size" "64") ++ (eq_attr "cpu" "power9")) ++ "DU_C2_3_power9,LSU_power9+VSU_power9") ++ ++; SFmode loads are cracked and have additional 2 cycles over DFmode ++(define_insn_reservation "power9-fpload-single" 6 ++ (and (eq_attr "type" "fpload") ++ (eq_attr "update" "no") ++ (eq_attr "size" "32") ++ (eq_attr "cpu" "power9")) ++ "DU_C2_3_power9,LSU_power9") ++ ++(define_insn_reservation "power9-fpload-update-single" 6 ++ (and (eq_attr "type" "fpload") ++ (eq_attr "update" "yes") ++ (eq_attr "size" "32") ++ (eq_attr "cpu" "power9")) ++ "DU_C3_power9,LSU_power9+VSU_power9") ++ ++(define_insn_reservation "power9-vecload" 5 ++ (and (eq_attr "type" "vecload") ++ (eq_attr "cpu" "power9")) ++ "DU_any_power9,LSU_pair_power9") ++ ++; Store data can issue 2 cycles after AGEN issue, 3 cycles for vector store ++(define_insn_reservation "power9-store" 0 ++ (and (eq_attr "type" "store") ++ (eq_attr "update" "no") ++ (eq_attr "indexed" "no") ++ (eq_attr "cpu" "power9")) ++ "DU_slice_3_power9,LSU_power9") ++ ++(define_insn_reservation "power9-store-indexed" 0 ++ (and (eq_attr "type" "store") ++ (eq_attr "update" "no") ++ (eq_attr "indexed" "yes") ++ (eq_attr "cpu" "power9")) ++ "DU_slice_3_power9,LSU_power9") ++ ++; Update forms have 2 cycle latency for updated addr reg ++(define_insn_reservation "power9-store-update" 2 ++ (and (eq_attr "type" "store") ++ (eq_attr "update" "yes") ++ (eq_attr "indexed" "no") ++ (eq_attr "cpu" "power9")) ++ "DU_C2_3_power9,LSU_power9+VSU_power9") ++ ++; Update forms have 2 cycle latency for updated addr reg ++(define_insn_reservation "power9-store-update-indexed" 2 ++ (and (eq_attr "type" "store") ++ (eq_attr "update" "yes") ++ (eq_attr "indexed" "yes") ++ (eq_attr "cpu" "power9")) ++ "DU_C2_3_power9,LSU_power9+VSU_power9") ++ ++(define_insn_reservation "power9-fpstore" 0 ++ (and (eq_attr "type" "fpstore") ++ (eq_attr "update" "no") ++ (eq_attr "cpu" "power9")) ++ "DU_slice_3_power9,LSU_power9") ++ ++; Update forms have 2 cycle latency for updated addr reg ++(define_insn_reservation "power9-fpstore-update" 2 ++ (and (eq_attr "type" "fpstore") ++ (eq_attr "update" "yes") ++ (eq_attr "cpu" "power9")) ++ "DU_C2_3_power9,LSU_power9+VSU_power9") ++ ++(define_insn_reservation "power9-vecstore" 0 ++ (and (eq_attr "type" "vecstore") ++ (eq_attr "cpu" "power9")) ++ "DU_super_power9,LSU_pair_power9") ++ ++(define_insn_reservation "power9-larx" 4 ++ (and (eq_attr "type" "load_l") ++ (eq_attr "cpu" "power9")) ++ "DU_any_power9,LSU_power9") ++ ++(define_insn_reservation "power9-stcx" 2 ++ (and (eq_attr "type" "store_c") ++ (eq_attr "cpu" "power9")) ++ "DU_C2_3_power9,LSU_power9+VSU_power9") ++ ++(define_insn_reservation "power9-sync" 4 ++ (and (eq_attr "type" "sync,isync") ++ (eq_attr "cpu" "power9")) ++ "DU_any_power9,LSU_power9") ++ ++ ++; VSU Execution Unit ++ ++; Fixed point ops ++ ++; Most ALU insns are simple 2 cycle, including record form ++(define_insn_reservation "power9-alu" 2 ++ (and (ior (eq_attr "type" "add,cmp,exts,integer,logical,isel") ++ (and (eq_attr "type" "insert,shift") ++ (eq_attr "dot" "no"))) ++ (eq_attr "cpu" "power9")) ++ "DU_any_power9,VSU_power9") ++ ++; Record form rotate/shift are cracked ++(define_insn_reservation "power9-cracked-alu" 2 ++ (and (eq_attr "type" "insert,shift") ++ (eq_attr "dot" "yes") ++ (eq_attr "cpu" "power9")) ++ "DU_C2_power9,VSU_power9") ++; 4 cycle CR latency ++(define_bypass 4 "power9-cracked-alu" ++ "power9-crlogical,power9-mfcr,power9-mfcrf,power9-branch") ++ ++(define_insn_reservation "power9-alu2" 3 ++ (and (eq_attr "type" "cntlz,popcnt,trap") ++ (eq_attr "cpu" "power9")) ++ "DU_any_power9,VSU_power9") ++ ++; Treat 'two' and 'three' types as 2 or 3 way cracked ++(define_insn_reservation "power9-two" 4 ++ (and (eq_attr "type" "two") ++ (eq_attr "cpu" "power9")) ++ "DU_C2_power9,VSU_power9") ++ ++(define_insn_reservation "power9-three" 6 ++ (and (eq_attr "type" "three") ++ (eq_attr "cpu" "power9")) ++ "DU_C3_power9,VSU_power9") ++ ++(define_insn_reservation "power9-mul" 4 ++ (and (eq_attr "type" "mul") ++ (eq_attr "dot" "no") ++ (eq_attr "cpu" "power9")) ++ "DU_any_power9,VSU_power9") ++ ++(define_insn_reservation "power9-mul-compare" 4 ++ (and (eq_attr "type" "mul") ++ (eq_attr "dot" "yes") ++ (eq_attr "cpu" "power9")) ++ "DU_C2_power9,VSU_power9") ++; 6 cycle CR latency ++(define_bypass 6 "power9-mul-compare" ++ "power9-crlogical,power9-mfcr,power9-mfcrf,power9-branch") ++ ++; Fixed point divides reserve the divide units for a minimum of 8 cycles ++(define_insn_reservation "power9-idiv" 16 ++ (and (eq_attr "type" "div") ++ (eq_attr "size" "32") ++ (eq_attr "cpu" "power9")) ++ "DU_even_power9,fx_div0_power9*8|fx_div1_power9*8") ++ ++(define_insn_reservation "power9-ldiv" 24 ++ (and (eq_attr "type" "div") ++ (eq_attr "size" "64") ++ (eq_attr "cpu" "power9")) ++ "DU_even_power9,fx_div0_power9*8|fx_div1_power9*8") ++ ++(define_insn_reservation "power9-crlogical" 2 ++ (and (eq_attr "type" "cr_logical,delayed_cr") ++ (eq_attr "cpu" "power9")) ++ "DU_any_power9,VSU_power9") ++ ++(define_insn_reservation "power9-mfcrf" 2 ++ (and (eq_attr "type" "mfcrf") ++ (eq_attr "cpu" "power9")) ++ "DU_any_power9,VSU_power9") ++ ++(define_insn_reservation "power9-mfcr" 6 ++ (and (eq_attr "type" "mfcr") ++ (eq_attr "cpu" "power9")) ++ "DU_C3_power9,VSU_power9") ++ ++; Should differentiate between 1 cr field and > 1 since target of > 1 cr ++; is cracked ++(define_insn_reservation "power9-mtcr" 2 ++ (and (eq_attr "type" "mtcr") ++ (eq_attr "cpu" "power9")) ++ "DU_any_power9,VSU_power9") ++ ++; Move to LR/CTR are executed in VSU ++(define_insn_reservation "power9-mtjmpr" 5 ++ (and (eq_attr "type" "mtjmpr") ++ (eq_attr "cpu" "power9")) ++ "DU_any_power9,VSU_power9") ++ ++; Floating point/Vector ops ++(define_insn_reservation "power9-fpsimple" 2 ++ (and (eq_attr "type" "fpsimple") ++ (eq_attr "cpu" "power9")) ++ "DU_slice_3_power9,VSU_power9") ++ ++(define_insn_reservation "power9-fp" 7 ++ (and (eq_attr "type" "fp,dmul") ++ (eq_attr "cpu" "power9")) ++ "DU_slice_3_power9,VSU_power9") ++ ++(define_insn_reservation "power9-fpcompare" 3 ++ (and (eq_attr "type" "fpcompare") ++ (eq_attr "cpu" "power9")) ++ "DU_slice_3_power9,VSU_power9") ++ ++; FP div/sqrt are executed in the VSU slices. They are not pipelined wrt other ++; divide insns, but for the most part do not block pipelined ops. ++(define_insn_reservation "power9-sdiv" 22 ++ (and (eq_attr "type" "sdiv") ++ (eq_attr "cpu" "power9")) ++ "DU_slice_3_power9,VSU_power9") ++ ++(define_insn_reservation "power9-ddiv" 33 ++ (and (eq_attr "type" "ddiv") ++ (eq_attr "cpu" "power9")) ++ "DU_slice_3_power9,VSU_power9") ++ ++(define_insn_reservation "power9-sqrt" 26 ++ (and (eq_attr "type" "ssqrt") ++ (eq_attr "cpu" "power9")) ++ "DU_slice_3_power9,VSU_power9") ++ ++(define_insn_reservation "power9-dsqrt" 36 ++ (and (eq_attr "type" "dsqrt") ++ (eq_attr "cpu" "power9")) ++ "DU_slice_3_power9,VSU_power9") ++ ++(define_insn_reservation "power9-vec-2cyc" 2 ++ (and (eq_attr "type" "vecmove,veclogical,vecexts,veccmpfx") ++ (eq_attr "cpu" "power9")) ++ "DU_super_power9,VSU_super_power9") ++ ++(define_insn_reservation "power9-veccmp" 3 ++ (and (eq_attr "type" "veccmp") ++ (eq_attr "cpu" "power9")) ++ "DU_super_power9,VSU_super_power9") ++ ++(define_insn_reservation "power9-vecsimple" 3 ++ (and (eq_attr "type" "vecsimple") ++ (eq_attr "cpu" "power9")) ++ "DU_super_power9,VSU_super_power9") ++ ++(define_insn_reservation "power9-vecnormal" 7 ++ (and (eq_attr "type" "vecfloat,vecdouble") ++ (eq_attr "size" "!128") ++ (eq_attr "cpu" "power9")) ++ "DU_super_power9,VSU_super_power9") ++ ++; Quad-precision FP ops, execute in DFU ++(define_insn_reservation "power9-qp" 12 ++ (and (eq_attr "type" "vecfloat,vecdouble") ++ (eq_attr "size" "128") ++ (eq_attr "cpu" "power9")) ++ "DU_super_power9,dfu_power9") ++ ++(define_insn_reservation "power9-vecperm" 3 ++ (and (eq_attr "type" "vecperm") ++ (eq_attr "cpu" "power9")) ++ "DU_super_power9,VSU_PRM_power9") ++ ++(define_insn_reservation "power9-veccomplex" 7 ++ (and (eq_attr "type" "veccomplex") ++ (eq_attr "cpu" "power9")) ++ "DU_super_power9,VSU_super_power9") ++ ++(define_insn_reservation "power9-vecfdiv" 28 ++ (and (eq_attr "type" "vecfdiv") ++ (eq_attr "cpu" "power9")) ++ "DU_super_power9,VSU_super_power9") ++ ++(define_insn_reservation "power9-vecdiv" 32 ++ (and (eq_attr "type" "vecdiv") ++ (eq_attr "size" "!128") ++ (eq_attr "cpu" "power9")) ++ "DU_super_power9,VSU_super_power9") ++ ++(define_insn_reservation "power9-qpdiv" 56 ++ (and (eq_attr "type" "vecdiv") ++ (eq_attr "size" "128") ++ (eq_attr "cpu" "power9")) ++ "DU_super_power9,dfu_power9") ++ ++(define_insn_reservation "power9-mffgpr" 2 ++ (and (eq_attr "type" "mffgpr") ++ (eq_attr "cpu" "power9")) ++ "DU_slice_3_power9,VSU_power9") ++ ++(define_insn_reservation "power9-mftgpr" 2 ++ (and (eq_attr "type" "mftgpr") ++ (eq_attr "cpu" "power9")) ++ "DU_slice_3_power9,VSU_power9") ++ ++ ++; Branch Unit ++; Move from LR/CTR are executed in BRU but consume a writeback port from an ++; execution slice. ++(define_insn_reservation "power9-mfjmpr" 6 ++ (and (eq_attr "type" "mfjmpr") ++ (eq_attr "cpu" "power9")) ++ "DU_branch_power9,bru_power9+VSU_power9") ++ ++; Branch is 2 cycles ++(define_insn_reservation "power9-branch" 2 ++ (and (eq_attr "type" "jmpreg,branch") ++ (eq_attr "cpu" "power9")) ++ "DU_branch_power9,bru_power9") ++ ++ ++; Crypto Unit ++(define_insn_reservation "power9-crypto" 6 ++ (and (eq_attr "type" "crypto") ++ (eq_attr "cpu" "power9")) ++ "DU_super_power9,cryptu_power9") ++ ++ ++; HTM Unit ++(define_insn_reservation "power9-htm" 4 ++ (and (eq_attr "type" "htm") ++ (eq_attr "cpu" "power9")) ++ "DU_C2_power9,LSU_power9") ++ ++(define_insn_reservation "power9-htm-simple" 2 ++ (and (eq_attr "type" "htmsimple") ++ (eq_attr "cpu" "power9")) ++ "DU_any_power9,VSU_power9") ++ ++ ++; DFP Unit ++(define_insn_reservation "power9-dfp" 12 ++ (and (eq_attr "type" "dfp") ++ (eq_attr "cpu" "power9")) ++ "DU_even_power9,dfu_power9") ++ +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/predicates.md gcc-6-20160721/gcc/config/rs6000/predicates.md +--- gcc-6.1.0/gcc/config/rs6000/predicates.md 2016-03-25 09:10:03.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/predicates.md 2016-07-01 17:56:54.000000000 +0000 +@@ -572,6 +572,38 @@ + } + }) + ++;; Return 1 if the operand is a CONST_VECTOR or VEC_DUPLICATE of a constant ++;; that can loaded with a XXSPLTIB instruction and then a VUPKHSB, VECSB2W or ++;; VECSB2D instruction. ++ ++(define_predicate "xxspltib_constant_split" ++ (match_code "const_vector,vec_duplicate,const_int") ++{ ++ int value = 256; ++ int num_insns = -1; ++ ++ if (!xxspltib_constant_p (op, mode, &num_insns, &value)) ++ return false; ++ ++ return num_insns > 1; ++}) ++ ++ ++;; Return 1 if the operand is a CONST_VECTOR that can loaded directly with a ++;; XXSPLTIB instruction. ++ ++(define_predicate "xxspltib_constant_nosplit" ++ (match_code "const_vector,vec_duplicate,const_int") ++{ ++ int value = 256; ++ int num_insns = -1; ++ ++ if (!xxspltib_constant_p (op, mode, &num_insns, &value)) ++ return false; ++ ++ return num_insns == 1; ++}) ++ + ;; Return 1 if the operand is a CONST_VECTOR and can be loaded into a + ;; vector register without using memory. + (define_predicate "easy_vector_constant" +@@ -590,7 +622,14 @@ + + if (VECTOR_MEM_ALTIVEC_OR_VSX_P (mode)) + { +- if (zero_constant (op, mode)) ++ int value = 256; ++ int num_insns = -1; ++ ++ if (zero_constant (op, mode) || all_ones_constant (op, mode)) ++ return true; ++ ++ if (TARGET_P9_VECTOR ++ && xxspltib_constant_p (op, mode, &num_insns, &value)) + return true; + + return easy_altivec_constant (op, mode); +@@ -669,6 +708,11 @@ + (and (match_code "const_int,const_double,const_wide_int,const_vector") + (match_test "op == CONST0_RTX (mode)"))) + ++;; Return 1 if operand is constant -1 (scalars and vectors). ++(define_predicate "all_ones_constant" ++ (and (match_code "const_int,const_double,const_wide_int,const_vector") ++ (match_test "op == CONSTM1_RTX (mode) && !FLOAT_MODE_P (mode)"))) ++ + ;; Return 1 if operand is 0.0. + (define_predicate "zero_fp_constant" + (and (match_code "const_double") +@@ -698,48 +742,25 @@ + (define_predicate "quad_memory_operand" + (match_code "mem") + { +- rtx addr, op0, op1; +- int ret; +- + if (!TARGET_QUAD_MEMORY && !TARGET_SYNC_TI) +- ret = 0; +- +- else if (!memory_operand (op, mode)) +- ret = 0; +- +- else if (GET_MODE_SIZE (GET_MODE (op)) != 16) +- ret = 0; +- +- else if (MEM_ALIGN (op) < 128) +- ret = 0; +- +- else +- { +- addr = XEXP (op, 0); +- if (int_reg_operand (addr, Pmode)) +- ret = 1; ++ return false; + +- else if (GET_CODE (addr) != PLUS) +- ret = 0; ++ if (GET_MODE_SIZE (mode) != 16 || !MEM_P (op) || MEM_ALIGN (op) < 128) ++ return false; + +- else +- { +- op0 = XEXP (addr, 0); +- op1 = XEXP (addr, 1); +- ret = (int_reg_operand (op0, Pmode) +- && GET_CODE (op1) == CONST_INT +- && IN_RANGE (INTVAL (op1), -32768, 32767) +- && (INTVAL (op1) & 15) == 0); +- } +- } ++ return quad_address_p (XEXP (op, 0), mode, false); ++}) + +- if (TARGET_DEBUG_ADDR) +- { +- fprintf (stderr, "\nquad_memory_operand, ret = %s\n", ret ? "true" : "false"); +- debug_rtx (op); +- } ++;; Return 1 if the operand is suitable for load/store to vector registers with ++;; d-form addressing (register+offset), which was added in ISA 3.0. ++;; Unlike quad_memory_operand, we do not have to check for alignment. ++(define_predicate "vsx_quad_dform_memory_operand" ++ (match_code "mem") ++{ ++ if (!TARGET_P9_DFORM_VECTOR || !MEM_P (op) || GET_MODE_SIZE (mode) != 16) ++ return false; + +- return ret; ++ return quad_address_p (XEXP (op, 0), mode, false); + }) + + ;; Return 1 if the operand is an indexed or indirect memory operand. +@@ -1054,6 +1075,10 @@ + mode = V2DFmode; + else if (mode == DImode) + mode = V2DImode; ++ else if (mode == SImode && TARGET_P9_VECTOR) ++ mode = V4SImode; ++ else if (mode == SFmode && TARGET_P9_VECTOR) ++ mode = V4SFmode; + else + gcc_unreachable (); + return memory_address_addr_space_p (mode, XEXP (op, 0), +@@ -1091,10 +1116,6 @@ + (define_special_predicate "equality_operator" + (match_code "eq,ne")) + +-;; Return true if operand is MIN or MAX operator. +-(define_predicate "min_max_operator" +- (match_code "smin,smax,umin,umax")) +- + ;; Return 1 if OP is a comparison operation that is valid for a branch + ;; instruction. We check the opcode against the mode of the CC value. + ;; validate_condition_mode is an assertion. +@@ -1137,6 +1158,11 @@ + (and (match_operand 0 "branch_comparison_operator") + (match_code "ne,le,ge,leu,geu,ordered"))) + ++;; Return 1 if OP is a comparison operator suitable for vector/scalar ++;; comparisons that generate a -1/0 mask. ++(define_predicate "fpmask_comparison_operator" ++ (match_code "eq,gt,ge")) ++ + ;; Return 1 if OP is a comparison operation that is valid for a branch + ;; insn, which is true if the corresponding bit in the CC register is set. + (define_predicate "branch_positive_comparison_operator" +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/rs6000-builtin.def gcc-6-20160721/gcc/config/rs6000/rs6000-builtin.def +--- gcc-6.1.0/gcc/config/rs6000/rs6000-builtin.def 2016-01-20 20:30:24.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/rs6000-builtin.def 2016-07-08 18:06:16.000000000 +0000 +@@ -24,6 +24,7 @@ + . */ + + /* Before including this file, some macros must be defined: ++ RS6000_BUILTIN_0 -- 0 arg builtins + RS6000_BUILTIN_1 -- 1 arg builtins + RS6000_BUILTIN_2 -- 2 arg builtins + RS6000_BUILTIN_3 -- 3 arg builtins +@@ -43,6 +44,10 @@ + ATTR builtin attribute information. + ICODE Insn code of the function that implents the builtin. */ + ++#ifndef RS6000_BUILTIN_0 ++ #error "RS6000_BUILTIN_0 is not defined." ++#endif ++ + #ifndef RS6000_BUILTIN_1 + #error "RS6000_BUILTIN_1 is not defined." + #endif +@@ -637,6 +642,91 @@ + | RS6000_BTC_TERNARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ + ++/* Miscellaneous builtins for instructions added in ISA 3.0. These ++ instructions don't require either the DFP or VSX options, just the basic ++ ISA 3.0 enablement since they operate on general purpose registers. */ ++#define BU_P9_MISC_0(ENUM, NAME, ATTR, ICODE) \ ++ RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ ++ "__builtin_" NAME, /* NAME */ \ ++ RS6000_BTM_P9_MISC, /* MASK */ \ ++ (RS6000_BTC_ ## ATTR /* ATTR */ \ ++ | RS6000_BTC_SPECIAL), \ ++ CODE_FOR_ ## ICODE) /* ICODE */ ++ ++#define BU_P9_MISC_1(ENUM, NAME, ATTR, ICODE) \ ++ RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ ++ "__builtin_" NAME, /* NAME */ \ ++ RS6000_BTM_P9_MISC, /* MASK */ \ ++ (RS6000_BTC_ ## ATTR /* ATTR */ \ ++ | RS6000_BTC_UNARY), \ ++ CODE_FOR_ ## ICODE) /* ICODE */ ++ ++/* Miscellaneous builtins for instructions added in ISA 3.0. These ++ instructions don't require either the DFP or VSX options, just the basic ++ ISA 3.0 enablement since they operate on general purpose registers, ++ and they require 64-bit addressing. */ ++#define BU_P9_64BIT_MISC_0(ENUM, NAME, ATTR, ICODE) \ ++ RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ ++ "__builtin_" NAME, /* NAME */ \ ++ RS6000_BTM_P9_MISC \ ++ | RS6000_BTM_64BIT, /* MASK */ \ ++ (RS6000_BTC_ ## ATTR /* ATTR */ \ ++ | RS6000_BTC_SPECIAL), \ ++ CODE_FOR_ ## ICODE) /* ICODE */ ++ ++/* Miscellaneous builtins for decimal floating point instructions ++ added in ISA 3.0. These instructions don't require the VSX ++ options, just the basic ISA 3.0 enablement since they operate on ++ general purpose registers. */ ++#define BU_P9_DFP_MISC_0(ENUM, NAME, ATTR, ICODE) \ ++ RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ ++ "__builtin_" NAME, /* NAME */ \ ++ RS6000_BTM_P9_MISC, /* MASK */ \ ++ (RS6000_BTC_ ## ATTR /* ATTR */ \ ++ | RS6000_BTC_SPECIAL), \ ++ CODE_FOR_ ## ICODE) /* ICODE */ ++ ++#define BU_P9_DFP_MISC_1(ENUM, NAME, ATTR, ICODE) \ ++ RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ ++ "__builtin_" NAME, /* NAME */ \ ++ RS6000_BTM_P9_MISC, /* MASK */ \ ++ (RS6000_BTC_ ## ATTR /* ATTR */ \ ++ | RS6000_BTC_SPECIAL), \ ++ CODE_FOR_ ## ICODE) /* ICODE */ ++ ++#define BU_P9_DFP_MISC_2(ENUM, NAME, ATTR, ICODE) \ ++ RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ ++ "__builtin_" NAME, /* NAME */ \ ++ RS6000_BTM_P9_MISC, /* MASK */ \ ++ (RS6000_BTC_ ## ATTR /* ATTR */ \ ++ | RS6000_BTC_SPECIAL), \ ++ CODE_FOR_ ## ICODE) /* ICODE */ ++ ++/* Decimal floating point overloaded functions added in ISA 3.0 */ ++#define BU_P9_DFP_OVERLOAD_1(ENUM, NAME) \ ++ RS6000_BUILTIN_1 (P9_BUILTIN_DFP_ ## ENUM, /* ENUM */ \ ++ "__builtin_dfp_" NAME, /* NAME */ \ ++ RS6000_BTM_P9_MISC, /* MASK */ \ ++ (RS6000_BTC_OVERLOADED /* ATTR */ \ ++ | RS6000_BTC_UNARY), \ ++ CODE_FOR_nothing) /* ICODE */ ++ ++#define BU_P9_DFP_OVERLOAD_2(ENUM, NAME) \ ++ RS6000_BUILTIN_2 (P9_BUILTIN_DFP_ ## ENUM, /* ENUM */ \ ++ "__builtin_dfp_" NAME, /* NAME */ \ ++ RS6000_BTM_P9_MISC, /* MASK */ \ ++ (RS6000_BTC_OVERLOADED /* ATTR */ \ ++ | RS6000_BTC_BINARY), \ ++ CODE_FOR_nothing) /* ICODE */ ++ ++#define BU_P9_DFP_OVERLOAD_3(ENUM, NAME) \ ++ RS6000_BUILTIN_3 (P9_BUILTIN_DFP_ ## ENUM, /* ENUM */ \ ++ "__builtin_dfp_" NAME, /* NAME */ \ ++ RS6000_BTM_P9_MISC, /* MASK */ \ ++ (RS6000_BTC_OVERLOADED /* ATTR */ \ ++ | RS6000_BTC_TERNARY), \ ++ CODE_FOR_nothing) /* ICODE */ ++ + /* 128-bit long double floating point builtins. */ + #define BU_LDBL128_2(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ +@@ -647,8 +737,94 @@ + | RS6000_BTC_BINARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ + ++/* IEEE 128-bit floating-point builtins. */ ++#define BU_FLOAT128_2(ENUM, NAME, ATTR, ICODE) \ ++ RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ ++ "__builtin_" NAME, /* NAME */ \ ++ RS6000_BTM_FLOAT128, /* MASK */ \ ++ (RS6000_BTC_ ## ATTR /* ATTR */ \ ++ | RS6000_BTC_BINARY), \ ++ CODE_FOR_ ## ICODE) /* ICODE */ ++ ++#define BU_FLOAT128_1(ENUM, NAME, ATTR, ICODE) \ ++ RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ ++ "__builtin_" NAME, /* NAME */ \ ++ RS6000_BTM_FLOAT128, /* MASK */ \ ++ (RS6000_BTC_ ## ATTR /* ATTR */ \ ++ | RS6000_BTC_UNARY), \ ++ CODE_FOR_ ## ICODE) /* ICODE */ ++ ++/* ISA 3.0 (power9) vector convenience macros. */ ++/* For the instructions that are encoded as altivec instructions use ++ __builtin_altivec_ as the builtin name. */ ++#define BU_P9V_AV_1(ENUM, NAME, ATTR, ICODE) \ ++ RS6000_BUILTIN_1 (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ ++ "__builtin_altivec_" NAME, /* NAME */ \ ++ RS6000_BTM_P9_VECTOR, /* MASK */ \ ++ (RS6000_BTC_ ## ATTR /* ATTR */ \ ++ | RS6000_BTC_UNARY), \ ++ CODE_FOR_ ## ICODE) /* ICODE */ ++ ++#define BU_P9V_AV_2(ENUM, NAME, ATTR, ICODE) \ ++ RS6000_BUILTIN_2 (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ ++ "__builtin_altivec_" NAME, /* NAME */ \ ++ RS6000_BTM_P9_VECTOR, /* MASK */ \ ++ (RS6000_BTC_ ## ATTR /* ATTR */ \ ++ | RS6000_BTC_BINARY), \ ++ CODE_FOR_ ## ICODE) /* ICODE */ ++ ++#define BU_P9V_AV_3(ENUM, NAME, ATTR, ICODE) \ ++ RS6000_BUILTIN_3 (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ ++ "__builtin_altivec_" NAME, /* NAME */ \ ++ RS6000_BTM_P9_VECTOR, /* MASK */ \ ++ (RS6000_BTC_ ## ATTR /* ATTR */ \ ++ | RS6000_BTC_TERNARY), \ ++ CODE_FOR_ ## ICODE) /* ICODE */ ++ ++#define BU_P9V_AV_P(ENUM, NAME, ATTR, ICODE) \ ++ RS6000_BUILTIN_P (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ ++ "__builtin_altivec_" NAME, /* NAME */ \ ++ RS6000_BTM_P9_VECTOR, /* MASK */ \ ++ (RS6000_BTC_ ## ATTR /* ATTR */ \ ++ | RS6000_BTC_PREDICATE), \ ++ CODE_FOR_ ## ICODE) /* ICODE */ ++ ++/* For the instructions encoded as VSX instructions use __builtin_vsx as the ++ builtin name. */ ++#define BU_P9V_VSX_1(ENUM, NAME, ATTR, ICODE) \ ++ RS6000_BUILTIN_1 (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ ++ "__builtin_vsx_" NAME, /* NAME */ \ ++ RS6000_BTM_P9_VECTOR, /* MASK */ \ ++ (RS6000_BTC_ ## ATTR /* ATTR */ \ ++ | RS6000_BTC_UNARY), \ ++ CODE_FOR_ ## ICODE) /* ICODE */ ++ ++#define BU_P9V_OVERLOAD_1(ENUM, NAME) \ ++ RS6000_BUILTIN_1 (P9V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ ++ "__builtin_vec_" NAME, /* NAME */ \ ++ RS6000_BTM_P9_VECTOR, /* MASK */ \ ++ (RS6000_BTC_OVERLOADED /* ATTR */ \ ++ | RS6000_BTC_UNARY), \ ++ CODE_FOR_nothing) /* ICODE */ ++ ++#define BU_P9V_OVERLOAD_2(ENUM, NAME) \ ++ RS6000_BUILTIN_2 (P9V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ ++ "__builtin_vec_" NAME, /* NAME */ \ ++ RS6000_BTM_P9_VECTOR, /* MASK */ \ ++ (RS6000_BTC_OVERLOADED /* ATTR */ \ ++ | RS6000_BTC_BINARY), \ ++ CODE_FOR_nothing) /* ICODE */ ++ ++#define BU_P9V_OVERLOAD_3(ENUM, NAME) \ ++ RS6000_BUILTIN_3 (P9V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ ++ "__builtin_vec_" NAME, /* NAME */ \ ++ RS6000_BTM_P9_VECTOR, /* MASK */ \ ++ (RS6000_BTC_OVERLOADED /* ATTR */ \ ++ | RS6000_BTC_TERNARY), \ ++ CODE_FOR_nothing) /* ICODE */ + #endif + ++ + /* Insure 0 is not a legitimate index. */ + BU_SPECIAL_X (RS6000_BUILTIN_NONE, NULL, 0, RS6000_BTC_MISC) + +@@ -1391,13 +1567,25 @@ + BU_VSX_X (LXVW4X_V8HI, "lxvw4x_v8hi", MEM) + BU_VSX_X (LXVW4X_V16QI, "lxvw4x_v16qi", MEM) + BU_VSX_X (STXSDX, "stxsdx", MEM) +-BU_VSX_X (STXVD2X_V1TI, "stxsdx_v1ti", MEM) +-BU_VSX_X (STXVD2X_V2DF, "stxsdx_v2df", MEM) +-BU_VSX_X (STXVD2X_V2DI, "stxsdx_v2di", MEM) +-BU_VSX_X (STXVW4X_V4SF, "stxsdx_v4sf", MEM) +-BU_VSX_X (STXVW4X_V4SI, "stxsdx_v4si", MEM) +-BU_VSX_X (STXVW4X_V8HI, "stxsdx_v8hi", MEM) +-BU_VSX_X (STXVW4X_V16QI, "stxsdx_v16qi", MEM) ++BU_VSX_X (STXVD2X_V1TI, "stxvd2x_v1ti", MEM) ++BU_VSX_X (STXVD2X_V2DF, "stxvd2x_v2df", MEM) ++BU_VSX_X (STXVD2X_V2DI, "stxvd2x_v2di", MEM) ++BU_VSX_X (STXVW4X_V4SF, "stxvw4x_v4sf", MEM) ++BU_VSX_X (STXVW4X_V4SI, "stxvw4x_v4si", MEM) ++BU_VSX_X (STXVW4X_V8HI, "stxvw4x_v8hi", MEM) ++BU_VSX_X (STXVW4X_V16QI, "stxvw4x_v16qi", MEM) ++BU_VSX_X (LD_ELEMREV_V2DF, "ld_elemrev_v2df", MEM) ++BU_VSX_X (LD_ELEMREV_V2DI, "ld_elemrev_v2di", MEM) ++BU_VSX_X (LD_ELEMREV_V4SF, "ld_elemrev_v4sf", MEM) ++BU_VSX_X (LD_ELEMREV_V4SI, "ld_elemrev_v4si", MEM) ++BU_VSX_X (LD_ELEMREV_V8HI, "ld_elemrev_v8hi", MEM) ++BU_VSX_X (LD_ELEMREV_V16QI, "ld_elemrev_v16qi", MEM) ++BU_VSX_X (ST_ELEMREV_V2DF, "st_elemrev_v2df", MEM) ++BU_VSX_X (ST_ELEMREV_V2DI, "st_elemrev_v2di", MEM) ++BU_VSX_X (ST_ELEMREV_V4SF, "st_elemrev_v4sf", MEM) ++BU_VSX_X (ST_ELEMREV_V4SI, "st_elemrev_v4si", MEM) ++BU_VSX_X (ST_ELEMREV_V8HI, "st_elemrev_v8hi", MEM) ++BU_VSX_X (ST_ELEMREV_V16QI, "st_elemrev_v16qi", MEM) + BU_VSX_X (XSABSDP, "xsabsdp", CONST) + BU_VSX_X (XSADDDP, "xsadddp", FP) + BU_VSX_X (XSCMPODP, "xscmpodp", FP) +@@ -1455,6 +1643,8 @@ + /* VSX builtins that are handled as special cases. */ + BU_VSX_OVERLOAD_X (LD, "ld") + BU_VSX_OVERLOAD_X (ST, "st") ++BU_VSX_OVERLOAD_X (XL, "xl") ++BU_VSX_OVERLOAD_X (XST, "xst") + + /* 1 argument VSX instructions added in ISA 2.07. */ + BU_P8V_VSX_1 (XSCVSPDPN, "xscvspdpn", CONST, vsx_xscvspdpn) +@@ -1589,6 +1779,25 @@ + BU_P8V_OVERLOAD_3 (VSUBECUQ, "vsubecuq") + BU_P8V_OVERLOAD_3 (VSUBEUQM, "vsubeuqm") + ++/* ISA 3.0 vector overloaded 2-argument functions. */ ++BU_P9V_AV_2 (VSLV, "vslv", CONST, vslv) ++BU_P9V_AV_2 (VSRV, "vsrv", CONST, vsrv) ++ ++/* ISA 3.0 vector overloaded 2-argument functions. */ ++BU_P9V_OVERLOAD_2 (VSLV, "vslv") ++BU_P9V_OVERLOAD_2 (VSRV, "vsrv") ++ ++/* 2 argument vector functions added in ISA 3.0 (power9). */ ++BU_P9V_AV_2 (VADUB, "vadub", CONST, vaduv16qi3) ++BU_P9V_AV_2 (VADUH, "vaduh", CONST, vaduv8hi3) ++BU_P9V_AV_2 (VADUW, "vaduw", CONST, vaduv4si3) ++ ++/* ISA 3.0 vector overloaded 2 argument functions. */ ++BU_P9V_OVERLOAD_2 (VADU, "vadu") ++BU_P9V_OVERLOAD_2 (VADUB, "vadub") ++BU_P9V_OVERLOAD_2 (VADUH, "vaduh") ++BU_P9V_OVERLOAD_2 (VADUW, "vaduw") ++ + + /* 2 argument extended divide functions added in ISA 2.06. */ + BU_P7_MISC_2 (DIVWE, "divwe", CONST, dive_si) +@@ -1639,12 +1848,72 @@ + BU_DFP_MISC_2 (PACK_TD, "pack_dec128", CONST, packtd) + BU_DFP_MISC_2 (UNPACK_TD, "unpack_dec128", CONST, unpacktd) + ++/* 0 argument general-purpose register functions added in ISA 3.0 (power9). */ ++BU_P9_MISC_0 (DARN_32, "darn_32", MISC, darn_32) ++BU_P9_64BIT_MISC_0 (DARN_RAW, "darn_raw", MISC, darn_raw) ++BU_P9_64BIT_MISC_0 (DARN, "darn", MISC, darn) ++ + BU_LDBL128_2 (PACK_TF, "pack_longdouble", CONST, packtf) + BU_LDBL128_2 (UNPACK_TF, "unpack_longdouble", CONST, unpacktf) + + BU_P7_MISC_2 (PACK_V1TI, "pack_vector_int128", CONST, packv1ti) + BU_P7_MISC_2 (UNPACK_V1TI, "unpack_vector_int128", CONST, unpackv1ti) + ++/* 2 argument DFP (Decimal Floating Point) functions added in ISA 3.0. */ ++BU_P9_DFP_MISC_2 (TSTSFI_LT_DD, "dtstsfi_lt_dd", CONST, dfptstsfi_lt_dd) ++BU_P9_DFP_MISC_2 (TSTSFI_LT_TD, "dtstsfi_lt_td", CONST, dfptstsfi_lt_td) ++ ++BU_P9_DFP_MISC_2 (TSTSFI_EQ_DD, "dtstsfi_eq_dd", CONST, dfptstsfi_eq_dd) ++BU_P9_DFP_MISC_2 (TSTSFI_EQ_TD, "dtstsfi_eq_td", CONST, dfptstsfi_eq_td) ++ ++BU_P9_DFP_MISC_2 (TSTSFI_GT_DD, "dtstsfi_gt_dd", CONST, dfptstsfi_gt_dd) ++BU_P9_DFP_MISC_2 (TSTSFI_GT_TD, "dtstsfi_gt_td", CONST, dfptstsfi_gt_td) ++ ++BU_P9_DFP_MISC_2 (TSTSFI_OV_DD, "dtstsfi_ov_dd", CONST, dfptstsfi_unordered_dd) ++BU_P9_DFP_MISC_2 (TSTSFI_OV_TD, "dtstsfi_ov_td", CONST, dfptstsfi_unordered_td) ++ ++/* 2 argument overloaded DFP functions added in ISA 3.0. */ ++BU_P9_DFP_OVERLOAD_2 (TSTSFI_LT, "dtstsfi_lt") ++BU_P9_DFP_OVERLOAD_2 (TSTSFI_LT_DD, "dtstsfi_lt_dd") ++BU_P9_DFP_OVERLOAD_2 (TSTSFI_LT_TD, "dtstsfi_lt_td") ++ ++BU_P9_DFP_OVERLOAD_2 (TSTSFI_EQ, "dtstsfi_eq") ++BU_P9_DFP_OVERLOAD_2 (TSTSFI_EQ_DD, "dtstsfi_eq_dd") ++BU_P9_DFP_OVERLOAD_2 (TSTSFI_EQ_TD, "dtstsfi_eq_td") ++ ++BU_P9_DFP_OVERLOAD_2 (TSTSFI_GT, "dtstsfi_gt") ++BU_P9_DFP_OVERLOAD_2 (TSTSFI_GT_DD, "dtstsfi_gt_dd") ++BU_P9_DFP_OVERLOAD_2 (TSTSFI_GT_TD, "dtstsfi_gt_td") ++ ++BU_P9_DFP_OVERLOAD_2 (TSTSFI_OV, "dtstsfi_ov") ++BU_P9_DFP_OVERLOAD_2 (TSTSFI_OV_DD, "dtstsfi_ov_dd") ++BU_P9_DFP_OVERLOAD_2 (TSTSFI_OV_TD, "dtstsfi_ov_td") ++ ++/* 1 argument vector functions added in ISA 3.0 (power9). */ ++BU_P9V_AV_1 (VCTZB, "vctzb", CONST, ctzv16qi2) ++BU_P9V_AV_1 (VCTZH, "vctzh", CONST, ctzv8hi2) ++BU_P9V_AV_1 (VCTZW, "vctzw", CONST, ctzv4si2) ++BU_P9V_AV_1 (VCTZD, "vctzd", CONST, ctzv2di2) ++BU_P9V_AV_1 (VPRTYBD, "vprtybd", CONST, parityv2di2) ++BU_P9V_AV_1 (VPRTYBQ, "vprtybq", CONST, parityv1ti2) ++BU_P9V_AV_1 (VPRTYBW, "vprtybw", CONST, parityv4si2) ++ ++/* ISA 3.0 vector overloaded 1 argument functions. */ ++BU_P9V_OVERLOAD_1 (VCTZ, "vctz") ++BU_P9V_OVERLOAD_1 (VCTZB, "vctzb") ++BU_P9V_OVERLOAD_1 (VCTZH, "vctzh") ++BU_P9V_OVERLOAD_1 (VCTZW, "vctzw") ++BU_P9V_OVERLOAD_1 (VCTZD, "vctzd") ++BU_P9V_OVERLOAD_1 (VPRTYB, "vprtyb") ++BU_P9V_OVERLOAD_1 (VPRTYBD, "vprtybd") ++BU_P9V_OVERLOAD_1 (VPRTYBQ, "vprtybq") ++BU_P9V_OVERLOAD_1 (VPRTYBW, "vprtybw") ++ ++/* 1 argument IEEE 128-bit floating-point functions. */ ++BU_FLOAT128_1 (FABSQ, "fabsq", CONST, abskf2) ++ ++/* 2 argument IEEE 128-bit floating-point functions. */ ++BU_FLOAT128_2 (COPYSIGNQ, "copysignq", CONST, copysignkf3) + + /* 1 argument crypto functions. */ + BU_CRYPTO_1 (VSBOX, "vsbox", CONST, crypto_vsbox) +@@ -2022,6 +2291,18 @@ + BU_SPECIAL_X (RS6000_BUILTIN_CPU_SUPPORTS, "__builtin_cpu_supports", + RS6000_BTM_ALWAYS, RS6000_BTC_MISC) + ++BU_SPECIAL_X (RS6000_BUILTIN_NANQ, "__builtin_nanq", ++ RS6000_BTM_FLOAT128, RS6000_BTC_CONST) ++ ++BU_SPECIAL_X (RS6000_BUILTIN_NANSQ, "__builtin_nansq", ++ RS6000_BTM_FLOAT128, RS6000_BTC_CONST) ++ ++BU_SPECIAL_X (RS6000_BUILTIN_INFQ, "__builtin_infq", ++ RS6000_BTM_FLOAT128, RS6000_BTC_CONST) ++ ++BU_SPECIAL_X (RS6000_BUILTIN_HUGE_VALQ, "__builtin_huge_valq", ++ RS6000_BTM_FLOAT128, RS6000_BTC_CONST) ++ + /* Darwin CfString builtin. */ + BU_SPECIAL_X (RS6000_BUILTIN_CFSTRING, "__builtin_cfstring", RS6000_BTM_ALWAYS, + RS6000_BTC_MISC) +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/rs6000-c.c gcc-6-20160721/gcc/config/rs6000/rs6000-c.c +--- gcc-6.1.0/gcc/config/rs6000/rs6000-c.c 2016-03-21 15:41:13.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/rs6000-c.c 2016-07-07 19:42:07.000000000 +0000 +@@ -2726,6 +2726,49 @@ + RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, + { ALTIVEC_BUILTIN_VEC_SUMS, ALTIVEC_BUILTIN_VSUMSWS, + RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V2DF, ++ RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V2DF, ++ RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V2DI, ++ RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V2DI, ++ RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V2DI, ++ RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, ++ ~RS6000_BTI_unsigned_V2DI, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V2DI, ++ RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, ++ ~RS6000_BTI_unsigned_long_long, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V4SF, ++ RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V4SF, ++ RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V4SI, ++ RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V4SI, ++ RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V4SI, ++ RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V4SI, ++ RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V8HI, ++ RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V8HI, ++ RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V8HI, ++ RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V8HI, ++ RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V16QI, ++ RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V16QI, ++ RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V16QI, ++ RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ++ ~RS6000_BTI_unsigned_V16QI, 0 }, ++ { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LD_ELEMREV_V16QI, ++ RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, + { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, + RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, + { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, +@@ -3475,6 +3518,55 @@ + RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, + { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, + RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V2DF, ++ RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V2DF, ++ RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V2DI, ++ RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V2DI, ++ RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ++ ~RS6000_BTI_long_long }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V2DI, ++ RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, ++ ~RS6000_BTI_unsigned_V2DI }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V2DI, ++ RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, ++ ~RS6000_BTI_unsigned_long_long }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V4SF, ++ RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V4SF, ++ RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V4SI, ++ RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V4SI, ++ RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V4SI, ++ RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ++ ~RS6000_BTI_unsigned_V4SI }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V4SI, ++ RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ++ ~RS6000_BTI_UINTSI }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V8HI, ++ RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V8HI, ++ RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V8HI, ++ RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ++ ~RS6000_BTI_unsigned_V8HI }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V8HI, ++ RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ++ ~RS6000_BTI_UINTHI }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V16QI, ++ RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V16QI, ++ RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V16QI, ++ RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ++ ~RS6000_BTI_unsigned_V16QI }, ++ { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_ST_ELEMREV_V16QI, ++ RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ++ ~RS6000_BTI_UINTQI }, + { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_16QI, + RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_NOT_OPAQUE }, + { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_16QI, +@@ -4123,6 +4215,105 @@ + { P8V_BUILTIN_VEC_VCLZD, P8V_BUILTIN_VCLZD, + RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, + ++ { P9_BUILTIN_DFP_TSTSFI_LT, MISC_BUILTIN_TSTSFI_LT_TD, ++ RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, ++ { P9_BUILTIN_DFP_TSTSFI_LT, MISC_BUILTIN_TSTSFI_LT_DD, ++ RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, ++ ++ { P9_BUILTIN_DFP_TSTSFI_LT_TD, MISC_BUILTIN_TSTSFI_LT_TD, ++ RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, ++ { P9_BUILTIN_DFP_TSTSFI_LT_DD, MISC_BUILTIN_TSTSFI_LT_DD, ++ RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, ++ ++ { P9_BUILTIN_DFP_TSTSFI_EQ, MISC_BUILTIN_TSTSFI_EQ_TD, ++ RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, ++ { P9_BUILTIN_DFP_TSTSFI_EQ, MISC_BUILTIN_TSTSFI_EQ_DD, ++ RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, ++ ++ { P9_BUILTIN_DFP_TSTSFI_EQ_TD, MISC_BUILTIN_TSTSFI_EQ_TD, ++ RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, ++ { P9_BUILTIN_DFP_TSTSFI_EQ_DD, MISC_BUILTIN_TSTSFI_EQ_DD, ++ RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, ++ ++ { P9_BUILTIN_DFP_TSTSFI_GT, MISC_BUILTIN_TSTSFI_GT_TD, ++ RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, ++ { P9_BUILTIN_DFP_TSTSFI_GT, MISC_BUILTIN_TSTSFI_GT_DD, ++ RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, ++ ++ { P9_BUILTIN_DFP_TSTSFI_GT_TD, MISC_BUILTIN_TSTSFI_GT_TD, ++ RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, ++ { P9_BUILTIN_DFP_TSTSFI_GT_DD, MISC_BUILTIN_TSTSFI_GT_DD, ++ RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, ++ ++ { P9_BUILTIN_DFP_TSTSFI_OV, MISC_BUILTIN_TSTSFI_OV_TD, ++ RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, ++ { P9_BUILTIN_DFP_TSTSFI_OV, MISC_BUILTIN_TSTSFI_OV_DD, ++ RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, ++ ++ { P9_BUILTIN_DFP_TSTSFI_OV_TD, MISC_BUILTIN_TSTSFI_OV_TD, ++ RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, ++ { P9_BUILTIN_DFP_TSTSFI_OV_DD, MISC_BUILTIN_TSTSFI_OV_DD, ++ RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, ++ ++ { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZB, ++ RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZB, ++ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZH, ++ RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZH, ++ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZW, ++ RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZW, ++ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZD, ++ RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZD, ++ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, ++ ++ { P9V_BUILTIN_VEC_VCTZB, P9V_BUILTIN_VCTZB, ++ RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VCTZB, P9V_BUILTIN_VCTZB, ++ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, ++ ++ { P9V_BUILTIN_VEC_VCTZH, P9V_BUILTIN_VCTZH, ++ RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VCTZH, P9V_BUILTIN_VCTZH, ++ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, ++ ++ { P9V_BUILTIN_VEC_VCTZW, P9V_BUILTIN_VCTZW, ++ RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VCTZW, P9V_BUILTIN_VCTZW, ++ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, ++ ++ { P9V_BUILTIN_VEC_VCTZD, P9V_BUILTIN_VCTZD, ++ RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VCTZD, P9V_BUILTIN_VCTZD, ++ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, ++ ++ { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUB, ++ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, ++ RS6000_BTI_unsigned_V16QI, 0 }, ++ { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUH, ++ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, ++ RS6000_BTI_unsigned_V8HI, 0 }, ++ { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUW, ++ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, ++ RS6000_BTI_unsigned_V4SI, 0 }, ++ ++ { P9V_BUILTIN_VEC_VADUB, P9V_BUILTIN_VADUB, ++ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, ++ RS6000_BTI_unsigned_V16QI, 0 }, ++ ++ { P9V_BUILTIN_VEC_VADUH, P9V_BUILTIN_VADUH, ++ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, ++ RS6000_BTI_unsigned_V8HI, 0 }, ++ ++ { P9V_BUILTIN_VEC_VADUW, P9V_BUILTIN_VADUW, ++ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, ++ RS6000_BTI_unsigned_V4SI, 0 }, ++ + { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD, + RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, + { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD, +@@ -4252,6 +4443,42 @@ + { P8V_BUILTIN_VEC_VPOPCNTD, P8V_BUILTIN_VPOPCNTD, + RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, + ++ { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBW, ++ RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBW, ++ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBD, ++ RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBD, ++ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ, ++ RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ, ++ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ, ++ RS6000_BTI_INTTI, RS6000_BTI_INTTI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ, ++ RS6000_BTI_UINTTI, RS6000_BTI_UINTTI, 0, 0 }, ++ ++ { P9V_BUILTIN_VEC_VPRTYBW, P9V_BUILTIN_VPRTYBW, ++ RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VPRTYBW, P9V_BUILTIN_VPRTYBW, ++ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, ++ ++ { P9V_BUILTIN_VEC_VPRTYBD, P9V_BUILTIN_VPRTYBD, ++ RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VPRTYBD, P9V_BUILTIN_VPRTYBD, ++ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, ++ ++ { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ, ++ RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ, ++ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ, ++ RS6000_BTI_INTTI, RS6000_BTI_INTTI, 0, 0 }, ++ { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ, ++ RS6000_BTI_UINTTI, RS6000_BTI_UINTTI, 0, 0 }, ++ + { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM, + RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, + { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM, +@@ -4328,6 +4555,13 @@ + { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD, + RS6000_BTI_unsigned_V16QI, 0, 0, 0 }, + ++ { P9V_BUILTIN_VEC_VSLV, P9V_BUILTIN_VSLV, ++ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, ++ RS6000_BTI_unsigned_V16QI, 0 }, ++ { P9V_BUILTIN_VEC_VSRV, P9V_BUILTIN_VSRV, ++ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, ++ RS6000_BTI_unsigned_V16QI, 0 }, ++ + /* Crypto builtins. */ + { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V16QI, + RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/rs6000-cpus.def gcc-6-20160721/gcc/config/rs6000/rs6000-cpus.def +--- gcc-6.1.0/gcc/config/rs6000/rs6000-cpus.def 2016-03-23 20:33:28.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/rs6000-cpus.def 2016-07-08 14:51:44.000000000 +0000 +@@ -60,15 +60,26 @@ + | OPTION_MASK_UPPER_REGS_SF) + + /* Add ISEL back into ISA 3.0, since it is supposed to be a win. Do not add +- P9_DFORM or P9_MINMAX until they are fully debugged. */ ++ P9_MINMAX until the hardware that supports it is available. Do not add ++ FLOAT128_HW here until we are ready to make -mfloat128 on by default. */ + #define ISA_3_0_MASKS_SERVER (ISA_2_7_MASKS_SERVER \ +- | OPTION_MASK_FLOAT128_HW \ + | OPTION_MASK_ISEL \ + | OPTION_MASK_MODULO \ + | OPTION_MASK_P9_FUSION \ +- | OPTION_MASK_P9_DFORM \ ++ | OPTION_MASK_P9_DFORM_SCALAR \ ++ | OPTION_MASK_P9_DFORM_VECTOR \ ++ | OPTION_MASK_P9_MISC \ + | OPTION_MASK_P9_VECTOR) + ++/* Support for the IEEE 128-bit floating point hardware requires a lot of the ++ VSX instructions that are part of ISA 3.0. */ ++#define ISA_3_0_MASKS_IEEE (OPTION_MASK_VSX \ ++ | OPTION_MASK_P8_VECTOR \ ++ | OPTION_MASK_P9_VECTOR \ ++ | OPTION_MASK_DIRECT_MOVE \ ++ | OPTION_MASK_UPPER_REGS_DF \ ++ | OPTION_MASK_UPPER_REGS_SF) ++ + #define POWERPC_7400_MASK (OPTION_MASK_PPC_GFXOPT | OPTION_MASK_ALTIVEC) + + /* Deal with ports that do not have -mstrict-align. */ +@@ -94,6 +105,7 @@ + | OPTION_MASK_FPRND \ + | OPTION_MASK_HTM \ + | OPTION_MASK_ISEL \ ++ | OPTION_MASK_LRA \ + | OPTION_MASK_MFCRF \ + | OPTION_MASK_MFPGPR \ + | OPTION_MASK_MODULO \ +@@ -101,9 +113,11 @@ + | OPTION_MASK_NO_UPDATE \ + | OPTION_MASK_P8_FUSION \ + | OPTION_MASK_P8_VECTOR \ +- | OPTION_MASK_P9_DFORM \ ++ | OPTION_MASK_P9_DFORM_SCALAR \ ++ | OPTION_MASK_P9_DFORM_VECTOR \ + | OPTION_MASK_P9_FUSION \ + | OPTION_MASK_P9_MINMAX \ ++ | OPTION_MASK_P9_MISC \ + | OPTION_MASK_P9_VECTOR \ + | OPTION_MASK_POPCNTB \ + | OPTION_MASK_POPCNTD \ +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/rs6000-protos.h gcc-6-20160721/gcc/config/rs6000/rs6000-protos.h +--- gcc-6.1.0/gcc/config/rs6000/rs6000-protos.h 2016-01-04 14:30:50.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/rs6000-protos.h 2016-07-12 19:51:09.000000000 +0000 +@@ -31,6 +31,7 @@ + #endif /* TREE_CODE */ + + extern bool easy_altivec_constant (rtx, machine_mode); ++extern bool xxspltib_constant_p (rtx, machine_mode, int *, int *); + extern int vspltis_shifted (rtx); + extern HOST_WIDE_INT const_vector_elt_as_int (rtx, unsigned int); + extern bool macho_lo_sum_memory_operand (rtx, machine_mode); +@@ -86,6 +87,7 @@ + extern int mems_ok_for_quad_peep (rtx, rtx); + extern bool gpr_or_gpr_p (rtx, rtx); + extern bool direct_move_p (rtx, rtx); ++extern bool quad_address_p (rtx, machine_mode, bool); + extern bool quad_load_store_p (rtx, rtx); + extern bool fusion_gpr_load_p (rtx, rtx, rtx, rtx); + extern void expand_fusion_gpr_load (rtx *); +@@ -133,6 +135,7 @@ + extern int rs6000_emit_cmove (rtx, rtx, rtx, rtx); + extern int rs6000_emit_vector_cond_expr (rtx, rtx, rtx, rtx, rtx, rtx); + extern void rs6000_emit_minmax (rtx, enum rtx_code, rtx, rtx); ++extern void rs6000_split_signbit (rtx, rtx); + extern void rs6000_expand_atomic_compare_and_swap (rtx op[]); + extern void rs6000_expand_atomic_exchange (rtx op[]); + extern void rs6000_expand_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx); +diff -ru --unidirectional-new-file --exclude po gcc-6.1.0/gcc/config/rs6000/rs6000.c gcc-6-20160721/gcc/config/rs6000/rs6000.c +--- gcc-6.1.0/gcc/config/rs6000/rs6000.c 2016-04-14 23:21:30.000000000 +0000 ++++ gcc-6-20160721/gcc/config/rs6000/rs6000.c 2016-07-19 03:39:34.000000000 +0000 +@@ -452,6 +452,7 @@ + #define RELOAD_REG_PRE_INCDEC 0x10 /* PRE_INC/PRE_DEC valid. */ + #define RELOAD_REG_PRE_MODIFY 0x20 /* PRE_MODIFY valid. */ + #define RELOAD_REG_AND_M16 0x40 /* AND -16 addressing. */ ++#define RELOAD_REG_QUAD_OFFSET 0x80 /* quad offset is limited. */ + + /* Register type masks based on the type, of valid addressing modes. */ + struct rs6000_reg_addr { +@@ -499,6 +500,16 @@ + return ((reg_addr[mode].addr_mask[RELOAD_REG_VMX] & RELOAD_REG_OFFSET) != 0); + } + ++/* Return true if we have D-form addressing in VSX registers. This addressing ++ is more limited than normal d-form addressing in that the offset must be ++ aligned on a 16-byte boundary. */ ++static inline bool ++mode_supports_vsx_dform_quad (machine_mode mode) ++{ ++ return ((reg_addr[mode].addr_mask[RELOAD_REG_ANY] & RELOAD_REG_QUAD_OFFSET) ++ != 0); ++} ++ + + /* Target cpu costs. */ + +@@ -1093,16 +1104,16 @@ + COSTS_N_INSNS (3), /* mulsi_const */ + COSTS_N_INSNS (3), /* mulsi_const9 */ + COSTS_N_INSNS (3), /* muldi */ +- COSTS_N_INSNS (19), /* divsi */ +- COSTS_N_INSNS (35), /* divdi */ ++ COSTS_N_INSNS (8), /* divsi */ ++ COSTS_N_INSNS (12), /* divdi */ + COSTS_N_INSNS (3), /* fp */ + COSTS_N_INSNS (3), /* dmul */ +- COSTS_N_INSNS (14), /* sdiv */ +- COSTS_N_INSNS (17), /* ddiv */ ++ COSTS_N_INSNS (13), /* sdiv */ ++ COSTS_N_INSNS (18), /* ddiv */ + 128, /* cache line size */ + 32, /* l1 cache */ +- 256, /* l2 cache */ +- 12, /* prefetch streams */ ++ 512, /* l2 cache */ ++ 8, /* prefetch streams */ + COSTS_N_INSNS (3), /* SF->DF convert */ + }; + +@@ -1128,6 +1139,7 @@ + + + /* Table that classifies rs6000 builtin functions (pure, const, etc.). */ ++#undef RS6000_BUILTIN_0 + #undef RS6000_BUILTIN_1 + #undef RS6000_BUILTIN_2 + #undef RS6000_BUILTIN_3 +@@ -1140,6 +1152,9 @@ + #undef RS6000_BUILTIN_S + #undef RS6000_BUILTIN_X + ++#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) \ ++ { NAME, ICODE, MASK, ATTR }, ++ + #define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) \ + { NAME, ICODE, MASK, ATTR }, + +@@ -1185,6 +1200,7 @@ + #include "rs6000-builtin.def" + }; + ++#undef RS6000_BUILTIN_0 + #undef RS6000_BUILTIN_1 + #undef RS6000_BUILTIN_2 + #undef RS6000_BUILTIN_3 +@@ -1312,6 +1328,7 @@ + bool); + rtl_opt_pass *make_pass_analyze_swaps (gcc::context*); + static bool rs6000_keep_leaf_when_profiled () __attribute__ ((unused)); ++static tree rs6000_fold_builtin (tree, int, tree *, bool); + + /* Hash table stuff for keeping track of TOC entries. */ + +@@ -1586,6 +1603,9 @@ + #undef TARGET_BUILTIN_DECL + #define TARGET_BUILTIN_DECL rs6000_builtin_decl + ++#undef TARGET_FOLD_BUILTIN ++#define TARGET_FOLD_BUILTIN rs6000_fold_builtin ++ + #undef TARGET_EXPAND_BUILTIN + #define TARGET_EXPAND_BUILTIN rs6000_expand_builtin + +@@ -1866,7 +1886,7 @@ + 128-bit floating point that can go in vector registers, which has VSX + memory addressing. */ + if (FP_REGNO_P (regno)) +- reg_size = (VECTOR_MEM_VSX_P (mode) ++ reg_size = (VECTOR_MEM_VSX_P (mode) || FLOAT128_VECTOR_P (mode) + ? UNITS_PER_VSX_WORD + : UNITS_PER_FP_WORD); + +@@ -1898,6 +1918,9 @@ + { + int last_regno = regno + rs6000_hard_regno_nregs[mode][regno] - 1; + ++ if (COMPLEX_MODE_P (mode)) ++ mode = GET_MODE_INNER (mode); ++ + /* PTImode can only go in GPRs. Quad word memory operations require even/odd + register combinations, and use PTImode where we need to deal with quad + word memory operations. Don't allow quad words in the argument or frame +@@ -2105,7 +2128,9 @@ + else if (keep_spaces) + *p++ = ' '; + +- if ((mask & RELOAD_REG_OFFSET) != 0) ++ if ((mask & RELOAD_REG_QUAD_OFFSET) != 0) ++ *p++ = 'O'; ++ else if ((mask & RELOAD_REG_OFFSET) != 0) + *p++ = 'o'; + else if (keep_spaces) + *p++ = ' '; +@@ -2642,8 +2667,7 @@ + if (TARGET_LINK_STACK) + fprintf (stderr, DEBUG_FMT_S, "link_stack", "true"); + +- if (targetm.lra_p ()) +- fprintf (stderr, DEBUG_FMT_S, "lra", "true"); ++ fprintf (stderr, DEBUG_FMT_S, "lra", TARGET_LRA ? "true" : "false"); + + if (TARGET_P8_FUSION) + { +@@ -2699,8 +2723,17 @@ + + for (m = 0; m < NUM_MACHINE_MODES; ++m) + { +- machine_mode m2 = (machine_mode)m; +- unsigned short msize = GET_MODE_SIZE (m2); ++ machine_mode m2 = (machine_mode) m; ++ bool complex_p = false; ++ size_t msize; ++ ++ if (COMPLEX_MODE_P (m2)) ++ { ++ complex_p = true; ++ m2 = GET_MODE_INNER (m2); ++ } ++ ++ msize = GET_MODE_SIZE (m2); + + /* SDmode is special in that we want to access it only via REG+REG + addressing on power7 and above, since we want to use the LFIWZX and +@@ -2722,7 +2755,7 @@ + /* Indicate if the mode takes more than 1 physical register. If + it takes a single register, indicate it can do REG+REG + addressing. */ +- if (nregs > 1 || m == BLKmode) ++ if (nregs > 1 || m == BLKmode || complex_p) + addr_mask |= RELOAD_REG_MULTIPLE; + else + addr_mask |= RELOAD_REG_INDEXED; +@@ -2738,7 +2771,7 @@ + && msize <= 8 + && !VECTOR_MODE_P (m2) + && !FLOAT128_VECTOR_P (m2) +- && !COMPLEX_MODE_P (m2) ++ && !complex_p + && (m2 != DFmode || !TARGET_UPPER_REGS_DF) + && (m2 != SFmode || !TARGET_UPPER_REGS_SF) + && !(TARGET_E500_DOUBLE && msize == 8)) +@@ -2769,17 +2802,31 @@ + } + + /* GPR and FPR registers can do REG+OFFSET addressing, except +- possibly for SDmode. ISA 3.0 (i.e. power9) adds D-form +- addressing for scalars to altivec registers. */ ++ possibly for SDmode. ISA 3.0 (i.e. power9) adds D-form addressing ++ for 64-bit scalars and 32-bit SFmode to altivec registers. */ + if ((addr_mask != 0) && !indexed_only_p + && msize <= 8 + && (rc == RELOAD_REG_GPR +- || rc == RELOAD_REG_FPR +- || (rc == RELOAD_REG_VMX +- && TARGET_P9_DFORM +- && (m2 == DFmode || m2 == SFmode)))) ++ || ((msize == 8 || m2 == SFmode) ++ && (rc == RELOAD_REG_FPR ++ || (rc == RELOAD_REG_VMX ++ && TARGET_P9_DFORM_SCALAR))))) + addr_mask |= RELOAD_REG_OFFSET; + ++ /* VSX registers can do REG+OFFSET addresssing if ISA 3.0 ++ instructions are enabled. The offset for 128-bit VSX registers is ++ only 12-bits. While GPRs can handle the full offset range, VSX ++ registers can only handle the restricted range. */ ++ else if ((addr_mask != 0) && !indexed_only_p ++ && msize == 16 && TARGET_P9_DFORM_VECTOR ++ && (ALTIVEC_OR_VSX_VECTOR_MODE (m2) ++ || (m2 == TImode && TARGET_VSX_TIMODE))) ++ { ++ addr_mask |= RELOAD_REG_OFFSET; ++ if (rc == RELOAD_REG_FPR || rc == RELOAD_REG_VMX) ++ addr_mask |= RELOAD_REG_QUAD_OFFSET; ++ } ++ + /* VMX registers can do (REG & -16) and ((REG+REG) & -16) + addressing on 128-bit types. */ + if (rc == RELOAD_REG_VMX && msize == 16 +@@ -3102,7 +3149,7 @@ + } + + /* Support for new D-form instructions. */ +- if (TARGET_P9_DFORM) ++ if (TARGET_P9_DFORM_SCALAR) + rs6000_constraints[RS6000_CONSTRAINT_wb] = ALTIVEC_REGS; + + /* Support for ISA 3.0 (power9) vectors. */ +@@ -3621,11 +3668,16 @@ + | ((TARGET_POPCNTD) ? RS6000_BTM_POPCNTD : 0) + | ((rs6000_cpu == PROCESSOR_CELL) ? RS6000_BTM_CELL : 0) + | ((TARGET_P8_VECTOR) ? RS6000_BTM_P8_VECTOR : 0) ++ | ((TARGET_P9_VECTOR) ? RS6000_BTM_P9_VECTOR : 0) ++ | ((TARGET_P9_MISC) ? RS6000_BTM_P9_MISC : 0) ++ | ((TARGET_MODULO) ? RS6000_BTM_MODULO : 0) ++ | ((TARGET_64BIT) ? RS6000_BTM_64BIT : 0) + | ((TARGET_CRYPTO) ? RS6000_BTM_CRYPTO : 0) + | ((TARGET_HTM) ? RS6000_BTM_HTM : 0) + | ((TARGET_DFP) ? RS6000_BTM_DFP : 0) + | ((TARGET_HARD_FLOAT) ? RS6000_BTM_HARD_FLOAT : 0) +- | ((TARGET_LONG_DOUBLE_128) ? RS6000_BTM_LDBL128 : 0)); ++ | ((TARGET_LONG_DOUBLE_128) ? RS6000_BTM_LDBL128 : 0) ++ | ((TARGET_FLOAT128) ? RS6000_BTM_FLOAT128 : 0)); + } + + /* Implement TARGET_MD_ASM_ADJUST. All asm statements are considered +@@ -3784,22 +3836,7 @@ + if (rs6000_tune_index >= 0) + tune_index = rs6000_tune_index; + else if (have_cpu) +- { +- /* Until power9 tuning is available, use power8 tuning if -mcpu=power9. */ +- if (processor_target_table[cpu_index].processor != PROCESSOR_POWER9) +- rs6000_tune_index = tune_index = cpu_index; +- else +- { +- size_t i; +- tune_index = -1; +- for (i = 0; i < ARRAY_SIZE (processor_target_table); i++) +- if (processor_target_table[i].processor == PROCESSOR_POWER8) +- { +- rs6000_tune_index = tune_index = i; +- break; +- } +- } +- } ++ rs6000_tune_index = tune_index = cpu_index; + else + { + size_t i; +@@ -3974,7 +4011,8 @@ + + /* For the newer switches (vsx, dfp, etc.) set some of the older options, + unless the user explicitly used the -mno-