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authorinfo@mobile-stream.com <info@mobile-stream.com>2018-11-26 22:05:43 +0000
committerLeonardo Arena <rnalrd@alpinelinux.org>2018-11-29 10:35:45 +0000
commit8ef8b98cae93898651ed5b651475bc06a79f6359 (patch)
tree11a26e6b2f7db94400aad6960bb91722010fac35 /main
parent2df12aa49260bdbb0511344966b9b090ed376b36 (diff)
downloadaports-8ef8b98cae93898651ed5b651475bc06a79f6359.tar.bz2
aports-8ef8b98cae93898651ed5b651475bc06a79f6359.tar.xz
main/lmdb: fix build on mips* (inconsistent cacheflush() prototype)
Diffstat (limited to 'main')
-rw-r--r--main/lmdb/APKBUILD9
-rw-r--r--main/lmdb/cacheflush.patch12
2 files changed, 18 insertions, 3 deletions
diff --git a/main/lmdb/APKBUILD b/main/lmdb/APKBUILD
index 71698bcffd..a1738ce647 100644
--- a/main/lmdb/APKBUILD
+++ b/main/lmdb/APKBUILD
@@ -2,14 +2,16 @@
# Maintainer: Natanael Copa <ncopa@alpinelinux.org>
pkgname=lmdb
pkgver=0.9.22
-pkgrel=1
+pkgrel=2
pkgdesc="Lightning Memory-Mapped Database"
url="http://symas.com/mdb"
arch="all"
license="OLDAP-2.8"
subpackages="$pkgname-dev $pkgname-doc $pkgname-tools"
source="https://github.com/LMDB/lmdb/archive/LMDB_$pkgver.tar.gz
- lmdb-make.patch"
+ lmdb-make.patch
+ cacheflush.patch
+ "
builddir="$srcdir/$pkgname-LMDB_$pkgver/libraries/liblmdb"
build() {
@@ -48,4 +50,5 @@ tools() {
}
sha512sums="49afca13b9683ed571c274380bb5e111236903b12d19bcb8781d6bbc00f711766b0d62de0b36536c85309cc9ff9e9d0aaa708e27bae9be6cfcaed8ba91e5545d LMDB_0.9.22.tar.gz
-1ae28e850a32694f81cb7bf4abaab9cd96ef6c963de91f96810de3afee4da41102e310a6fb0ed889e9e9e04e00342f25272c04a8b483615dccfc039e34538594 lmdb-make.patch"
+1ae28e850a32694f81cb7bf4abaab9cd96ef6c963de91f96810de3afee4da41102e310a6fb0ed889e9e9e04e00342f25272c04a8b483615dccfc039e34538594 lmdb-make.patch
+f30b5f60ad3788abe3caa91a787c00190d6cceef5d20339624ce3d128f59de1a65d6913ab28f938c52237c40cbaef8a2bff2be7158da32f8c4562aa240fd11a2 cacheflush.patch"
diff --git a/main/lmdb/cacheflush.patch b/main/lmdb/cacheflush.patch
new file mode 100644
index 0000000000..281a03124c
--- /dev/null
+++ b/main/lmdb/cacheflush.patch
@@ -0,0 +1,12 @@
+--- a/mdb.c
++++ b/mdb.c
+@@ -77,8 +77,7 @@
+
+ #if defined(__mips) && defined(__linux)
+ /* MIPS has cache coherency issues, requires explicit cache control */
+-#include <asm/cachectl.h>
+-extern int cacheflush(char *addr, int nbytes, int cache);
++#include <sys/cachectl.h>
+ #define CACHEFLUSH(addr, bytes, cache) cacheflush(addr, bytes, cache)
+ #else
+ #define CACHEFLUSH(addr, bytes, cache)