aboutsummaryrefslogtreecommitdiffstats
path: root/community/openjdk10/ppc64le.patch
diff options
context:
space:
mode:
Diffstat (limited to 'community/openjdk10/ppc64le.patch')
-rw-r--r--community/openjdk10/ppc64le.patch161
1 files changed, 161 insertions, 0 deletions
diff --git a/community/openjdk10/ppc64le.patch b/community/openjdk10/ppc64le.patch
new file mode 100644
index 0000000000..c0498f05fa
--- /dev/null
+++ b/community/openjdk10/ppc64le.patch
@@ -0,0 +1,161 @@
+--- old/src/hotspot/cpu/ppc/macroAssembler_ppc.cpp
++++ new/src/hotspot/cpu/ppc/macroAssembler_ppc.cpp
+@@ -1294,7 +1294,11 @@
+ // the safepoing polling page.
+ ucontext_t* uc = (ucontext_t*) ucontext;
+ // Set polling address.
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ address addr = (address)uc->uc_mcontext.regs->gpr[ra] + (ssize_t)ds;
++#else // Musl
++ address addr = (address)uc->uc_mcontext.gp_regs[ra] + (ssize_t) ds;
++#endif
+ if (polling_address_ptr != NULL) {
+ *polling_address_ptr = addr;
+ }
+@@ -1315,15 +1319,24 @@
+ int rb = inv_rb_field(instruction);
+
+ // look up content of ra and rb in ucontext
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ address ra_val=(address)uc->uc_mcontext.regs->gpr[ra];
+ long rb_val=(long)uc->uc_mcontext.regs->gpr[rb];
++#else // Musl
++ address ra_val=(address)uc->uc_mcontext.gp_regs[ra];
++ long rb_val=(long)uc->uc_mcontext.gp_regs[rb];
++#endif
+ return os::is_memory_serialize_page(thread, ra_val+rb_val);
+ } else if (is_stw(instruction) || is_stwu(instruction)) {
+ int ra = inv_ra_field(instruction);
+ int d1 = inv_d1_field(instruction);
+
+ // look up content of ra in ucontext
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ address ra_val=(address)uc->uc_mcontext.regs->gpr[ra];
++#else // Musl
++ address ra_val=(address)uc->uc_mcontext.gp_regs[ra];
++#endif
+ return os::is_memory_serialize_page(thread, ra_val+d1);
+ } else {
+ return false;
+@@ -1386,11 +1399,20 @@
+ || (is_stdu(instruction) && rs == 1)) {
+ int ds = inv_ds_field(instruction);
+ // return banged address
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ return ds+(address)uc->uc_mcontext.regs->gpr[ra];
++#else // Musl
++ return ds+(address)uc->uc_mcontext.gp_regs[ra];
++#endif
+ } else if (is_stdux(instruction) && rs == 1) {
+ int rb = inv_rb_field(instruction);
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ address sp = (address)uc->uc_mcontext.regs->gpr[1];
+ long rb_val = (long)uc->uc_mcontext.regs->gpr[rb];
++#else // Musl
++ address sp = (address)uc->uc_mcontext.gp_regs[1];
++ long rb_val = (long)uc->uc_mcontext.gp_regs[rb];
++#endif
+ return ra != 1 || rb_val >= 0 ? NULL // not a stack bang
+ : sp + rb_val; // banged address
+ }
+--- old/src/hotspot/cpu/ppc/vm_version_ppc.cpp
++++ new/src/hotspot/cpu/ppc/vm_version_ppc.cpp
+@@ -745,7 +745,7 @@
+ unsigned long auxv = getauxval(AT_HWCAP2);
+
+ if (auxv & PPC_FEATURE2_HTM_NOSC) {
+- if (auxv & PPC_FEATURE2_HAS_HTM) {
++ if (auxv & PPC_FEATURE2_HTM) {
+ // TM on POWER8 and POWER9 in compat mode (VM) is supported by the JVM.
+ // TM on POWER9 DD2.1 NV (baremetal) is not supported by the JVM (TM on
+ // POWER9 DD2.1 NV has a few issues that need a couple of firmware
+--- old/src/hotspot/os_cpu/linux_ppc/os_linux_ppc.cpp
++++ new/src/hotspot/os_cpu/linux_ppc/os_linux_ppc.cpp
+@@ -109,20 +109,34 @@
+ // - if uc was filled by getcontext(), it is undefined - getcontext() does not fill
+ // it because the volatile registers are not needed to make setcontext() work.
+ // Hopefully it was zero'd out beforehand.
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ guarantee(uc->uc_mcontext.regs != NULL, "only use ucontext_get_pc in sigaction context");
+ return (address)uc->uc_mcontext.regs->nip;
++#else // Musl
++ guarantee(uc->uc_mcontext.gp_regs != NULL, "only use ucontext_get_pc in sigaction context");
++ return (address)uc->uc_mcontext.gp_regs[32];
++#endif
+ }
+
+ // modify PC in ucontext.
+ // Note: Only use this for an ucontext handed down to a signal handler. See comment
+ // in ucontext_get_pc.
+ void os::Linux::ucontext_set_pc(ucontext_t * uc, address pc) {
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ guarantee(uc->uc_mcontext.regs != NULL, "only use ucontext_set_pc in sigaction context");
+ uc->uc_mcontext.regs->nip = (unsigned long)pc;
++#else // Musl
++ guarantee(uc->uc_mcontext.gp_regs != NULL, "only use ucontext_set_pc in sigaction context");
++ uc->uc_mcontext.gp_regs[32] = (unsigned long)pc;
++#endif
+ }
+
+ intptr_t* os::Linux::ucontext_get_sp(const ucontext_t * uc) {
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ return (intptr_t*)uc->uc_mcontext.regs->gpr[1/*REG_SP*/];
++#else // Musl
++ return (intptr_t*)uc->uc_mcontext.gp_regs[1/*REG_SP*/];
++#endif
+ }
+
+ intptr_t* os::Linux::ucontext_get_fp(const ucontext_t * uc) {
+@@ -252,7 +266,13 @@
+ // 3.2.1 "Machine State Register"), however note that ISA notation for bit
+ // numbering is MSB 0, so for normal bit numbering (LSB 0) they come to be
+ // bits 33 and 34. It's not related to endianness, just a notation matter.
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ if (second_uc->uc_mcontext.regs->msr & 0x600000000) {
++#else // Musl
++ // why 33?
++ // see comment for glibc NGREG: "r0-r31, nip, msr, lr, etc."
++ if (second_uc->uc_mcontext.gp_regs[33] & 0x600000000) {
++#endif
+ if (TraceTraps) {
+ tty->print_cr("caught signal in transaction, "
+ "ignoring to jump to abort handler");
+@@ -558,6 +578,7 @@
+ const ucontext_t* uc = (const ucontext_t*)context;
+
+ st->print_cr("Registers:");
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ st->print("pc =" INTPTR_FORMAT " ", uc->uc_mcontext.regs->nip);
+ st->print("lr =" INTPTR_FORMAT " ", uc->uc_mcontext.regs->link);
+ st->print("ctr=" INTPTR_FORMAT " ", uc->uc_mcontext.regs->ctr);
+@@ -566,8 +587,18 @@
+ st->print("r%-2d=" INTPTR_FORMAT " ", i, uc->uc_mcontext.regs->gpr[i]);
+ if (i % 3 == 2) st->cr();
+ }
++#else // Musl
++ st->print("pc =" INTPTR_FORMAT " ", uc->uc_mcontext.gp_regs[32]);
++ st->print("lr =" INTPTR_FORMAT " ", uc->uc_mcontext.gp_regs[36]);
++ st->print("ctr=" INTPTR_FORMAT " ", uc->uc_mcontext.gp_regs[35]);
+ st->cr();
++ for (int i = 0; i < 32; i++) {
++ st->print("r%-2d=" INTPTR_FORMAT " ", i, uc->uc_mcontext.gp_regs[i]);
++ if (i % 3 == 2) st->cr();
++ }
++#endif
+ st->cr();
++ st->cr();
+
+ intptr_t *sp = (intptr_t *)os::Linux::ucontext_get_sp(uc);
+ st->print_cr("Top of Stack: (sp=" PTR_FORMAT ")", p2i(sp));
+@@ -594,7 +625,11 @@
+ // this is only for the "general purpose" registers
+ for (int i = 0; i < 32; i++) {
+ st->print("r%-2d=", i);
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ print_location(st, uc->uc_mcontext.regs->gpr[i]);
++#else // Musl
++ print_location(st, uc->uc_mcontext.gp_regs[i]);
++#endif
+ }
+ st->cr();
+ }
generated by cgit v1.2.3 (git 2.25.1) at 2025-06-20 14:34:22 +0000