diff options
Diffstat (limited to 'main/xen/x86-log-XPTI-enabled-status.patch')
| -rw-r--r-- | main/xen/x86-log-XPTI-enabled-status.patch | 92 |
1 files changed, 92 insertions, 0 deletions
diff --git a/main/xen/x86-log-XPTI-enabled-status.patch b/main/xen/x86-log-XPTI-enabled-status.patch new file mode 100644 index 0000000000..219299168e --- /dev/null +++ b/main/xen/x86-log-XPTI-enabled-status.patch @@ -0,0 +1,92 @@ +From 47d41f6885a83fae09545146c97d5243f1b99c7a Mon Sep 17 00:00:00 2001 +From: Jan Beulich <jbeulich@suse.com> +Date: Wed, 18 Apr 2018 16:40:50 +0200 +Subject: [PATCH] x86: log XPTI enabled status + +At the same time also report the state of the two defined +ARCH_CAPABILITIES MSR bits. To avoid further complicating the +conditional around that printk(), drop it (it's a debug level one only +anyway). + +Issue the main message without any XENLOG_*, and also drop XENLOG_INFO +from the respective BTI message, to make sure they're visible at default +log level also in release builds. + +Signed-off-by: Jan Beulich <jbeulich@suse.com> +Tested-by: Juergen Gross <jgross@suse.com> +Reviewed-by: Juergen Gross <jgross@suse.com> +Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> +Reviewed-by: Wei Liu <wei.liu2@citrix.com> +master commit: 442b303cdaf7d774c0be8096fe5dbab68701abd3 +master date: 2018-04-05 15:48:23 +0100 +--- + xen/arch/x86/spec_ctrl.c | 24 ++++++++++++++---------- + 1 file changed, 14 insertions(+), 10 deletions(-) + +diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c +index 8ad992a700..3c7447bfe6 100644 +--- a/xen/arch/x86/spec_ctrl.c ++++ b/xen/arch/x86/spec_ctrl.c +@@ -21,7 +21,7 @@ + #include <xen/lib.h> + + #include <asm/microcode.h> +-#include <asm/msr-index.h> ++#include <asm/msr.h> + #include <asm/processor.h> + #include <asm/spec_ctrl.h> + #include <asm/spec_ctrl_asm.h> +@@ -84,30 +84,31 @@ custom_param("bti", parse_bti); + static void __init print_details(enum ind_thunk thunk) + { + unsigned int _7d0 = 0, e8b = 0, tmp; ++ uint64_t caps = 0; + + /* Collect diagnostics about available mitigations. */ + if ( boot_cpu_data.cpuid_level >= 7 ) + cpuid_count(7, 0, &tmp, &tmp, &tmp, &_7d0); + if ( boot_cpu_data.extended_cpuid_level >= 0x80000008 ) + cpuid(0x80000008, &tmp, &e8b, &tmp, &tmp); ++ if ( _7d0 & cpufeat_mask(X86_FEATURE_ARCH_CAPS) ) ++ rdmsrl(MSR_ARCH_CAPABILITIES, caps); + + printk(XENLOG_DEBUG "Speculative mitigation facilities:\n"); + + /* Hardware features which pertain to speculative mitigations. */ +- if ( (_7d0 & (cpufeat_mask(X86_FEATURE_IBRSB) | +- cpufeat_mask(X86_FEATURE_STIBP))) || +- (e8b & cpufeat_mask(X86_FEATURE_IBPB)) ) +- printk(XENLOG_DEBUG " Hardware features:%s%s%s\n", +- (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBRS/IBPB" : "", +- (_7d0 & cpufeat_mask(X86_FEATURE_STIBP)) ? " STIBP" : "", +- (e8b & cpufeat_mask(X86_FEATURE_IBPB)) ? " IBPB" : ""); ++ printk(XENLOG_DEBUG " Hardware features:%s%s%s%s%s\n", ++ (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBRS/IBPB" : "", ++ (_7d0 & cpufeat_mask(X86_FEATURE_STIBP)) ? " STIBP" : "", ++ (e8b & cpufeat_mask(X86_FEATURE_IBPB)) ? " IBPB" : "", ++ (caps & ARCH_CAPABILITIES_IBRS_ALL) ? " IBRS_ALL" : "", ++ (caps & ARCH_CAPABILITIES_RDCL_NO) ? " RDCL_NO" : ""); + + /* Compiled-in support which pertains to BTI mitigations. */ + if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) ) + printk(XENLOG_DEBUG " Compiled-in support: INDIRECT_THUNK\n"); + +- printk(XENLOG_INFO +- "BTI mitigations: Thunk %s, Others:%s%s%s%s\n", ++ printk("BTI mitigations: Thunk %s, Others:%s%s%s%s\n", + thunk == THUNK_NONE ? "N/A" : + thunk == THUNK_RETPOLINE ? "RETPOLINE" : + thunk == THUNK_LFENCE ? "LFENCE" : +@@ -117,6 +118,9 @@ static void __init print_details(enum ind_thunk thunk) + opt_ibpb ? " IBPB" : "", + boot_cpu_has(X86_FEATURE_RSB_NATIVE) ? " RSB_NATIVE" : "", + boot_cpu_has(X86_FEATURE_RSB_VMEXIT) ? " RSB_VMEXIT" : ""); ++ ++ printk("XPTI: %s\n", ++ boot_cpu_has(X86_FEATURE_NO_XPTI) ? "disabled" : "enabled"); + } + + /* Calculate whether Retpoline is known-safe on this CPU. */ +-- +2.15.2 + |