diff options
Diffstat (limited to 'testing/linux-amlogic/0008-drm-meson-Add-HDMI-1.4-4k-modes.patch')
-rw-r--r-- | testing/linux-amlogic/0008-drm-meson-Add-HDMI-1.4-4k-modes.patch | 165 |
1 files changed, 165 insertions, 0 deletions
diff --git a/testing/linux-amlogic/0008-drm-meson-Add-HDMI-1.4-4k-modes.patch b/testing/linux-amlogic/0008-drm-meson-Add-HDMI-1.4-4k-modes.patch new file mode 100644 index 0000000000..194ba6e2de --- /dev/null +++ b/testing/linux-amlogic/0008-drm-meson-Add-HDMI-1.4-4k-modes.patch @@ -0,0 +1,165 @@ +From 24b38ca3bd2579d4bac18f57526c93bc63354959 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong <narmstrong@baylibre.com> +Date: Fri, 20 Jul 2018 15:29:18 +0200 +Subject: [PATCH] drm/meson: Add HDMI 1.4 4k modes + +Add the timings for the HDMI 1.4 4K modes support : +- 3840x2160@30 +- 3840x2160@25 +- 3840x2160@24 + +Since the 297000Hz pixel clock is already managed and the modes are +compatible with the HDMI 1.4 current HDMI PHY+Controller support, only +the missing timings values needs to be added. + +--- + drivers/gpu/drm/meson/meson_venc.c | 129 +++++++++++++++++++++++++++++++++++++ + 1 file changed, 129 insertions(+) + +diff --git a/drivers/gpu/drm/meson/meson_venc.c b/drivers/gpu/drm/meson/meson_venc.c +index 14aac66..d68ccbf 100644 +--- a/drivers/gpu/drm/meson/meson_venc.c ++++ b/drivers/gpu/drm/meson/meson_venc.c +@@ -698,6 +698,132 @@ union meson_hdmi_venc_mode meson_hdmi_encp_mode_1080p60 = { + }, + }; + ++union meson_hdmi_venc_mode meson_hdmi_encp_mode_2160p24 = { ++ .encp = { ++ .dvi_settings = 0x1, ++ .video_mode = 0x4040, ++ .video_mode_adv = 0x8, ++ /* video_sync_mode */ ++ /* video_yc_dly */ ++ /* video_rgb_ctrl */ ++ .video_filt_ctrl = 0x1000, ++ .video_filt_ctrl_present = true, ++ /* video_ofld_voav_ofst */ ++ .yfp1_htime = 140, ++ .yfp2_htime = 140+3840, ++ .max_pxcnt = 3840+1660-1, ++ .hspuls_begin = 2156+1920, ++ .hspuls_end = 44, ++ .hspuls_switch = 44, ++ .vspuls_begin = 140, ++ .vspuls_end = 2059+1920, ++ .vspuls_bline = 0, ++ .vspuls_eline = 4, ++ .havon_begin = 148, ++ .havon_end = 3987, ++ .vavon_bline = 89, ++ .vavon_eline = 2248, ++ /* eqpuls_begin */ ++ /* eqpuls_end */ ++ /* eqpuls_bline */ ++ /* eqpuls_eline */ ++ .hso_begin = 44, ++ .hso_end = 2156+1920, ++ .vso_begin = 2100+1920, ++ .vso_end = 2164+1920, ++ .vso_bline = 51, ++ .vso_eline = 53, ++ .vso_eline_present = true, ++ /* sy_val */ ++ /* sy2_val */ ++ .max_lncnt = 2249, ++ }, ++}; ++ ++union meson_hdmi_venc_mode meson_hdmi_encp_mode_2160p25 = { ++ .encp = { ++ .dvi_settings = 0x1, ++ .video_mode = 0x4040, ++ .video_mode_adv = 0x8, ++ /* video_sync_mode */ ++ /* video_yc_dly */ ++ /* video_rgb_ctrl */ ++ .video_filt_ctrl = 0x1000, ++ .video_filt_ctrl_present = true, ++ /* video_ofld_voav_ofst */ ++ .yfp1_htime = 140, ++ .yfp2_htime = 140+3840, ++ .max_pxcnt = 3840+1440-1, ++ .hspuls_begin = 2156+1920, ++ .hspuls_end = 44, ++ .hspuls_switch = 44, ++ .vspuls_begin = 140, ++ .vspuls_end = 2059+1920, ++ .vspuls_bline = 0, ++ .vspuls_eline = 4, ++ .havon_begin = 148, ++ .havon_end = 3987, ++ .vavon_bline = 89, ++ .vavon_eline = 2248, ++ /* eqpuls_begin */ ++ /* eqpuls_end */ ++ /* eqpuls_bline */ ++ /* eqpuls_eline */ ++ .hso_begin = 44, ++ .hso_end = 2156+1920, ++ .vso_begin = 2100+1920, ++ .vso_end = 2164+1920, ++ .vso_bline = 51, ++ .vso_eline = 53, ++ .vso_eline_present = true, ++ /* sy_val */ ++ /* sy2_val */ ++ .max_lncnt = 2249, ++ }, ++}; ++ ++union meson_hdmi_venc_mode meson_hdmi_encp_mode_2160p30 = { ++ .encp = { ++ .dvi_settings = 0x1, ++ .video_mode = 0x4040, ++ .video_mode_adv = 0x8, ++ /* video_sync_mode */ ++ /* video_yc_dly */ ++ /* video_rgb_ctrl */ ++ .video_filt_ctrl = 0x1000, ++ .video_filt_ctrl_present = true, ++ /* video_ofld_voav_ofst */ ++ .yfp1_htime = 140, ++ .yfp2_htime = 140+3840, ++ .max_pxcnt = 3840+560-1, ++ .hspuls_begin = 2156+1920, ++ .hspuls_end = 44, ++ .hspuls_switch = 44, ++ .vspuls_begin = 140, ++ .vspuls_end = 2059+1920, ++ .vspuls_bline = 0, ++ .vspuls_eline = 4, ++ .havon_begin = 148, ++ .havon_end = 3987, ++ .vavon_bline = 89, ++ .vavon_eline = 2248, ++ /* eqpuls_begin */ ++ /* eqpuls_end */ ++ /* eqpuls_bline */ ++ /* eqpuls_eline */ ++ .hso_begin = 44, ++ .hso_end = 2156+1920, ++ .vso_begin = 2100+1920, ++ .vso_end = 2164+1920, ++ .vso_bline = 51, ++ .vso_eline = 53, ++ .vso_eline_present = true, ++ /* sy_val */ ++ /* sy2_val */ ++ .max_lncnt = 2249, ++ }, ++}; ++ + struct meson_hdmi_venc_vic_mode { + unsigned int vic; + union meson_hdmi_venc_mode *mode; +@@ -718,6 +844,9 @@ struct meson_hdmi_venc_vic_mode { + { 34, &meson_hdmi_encp_mode_1080p30 }, + { 31, &meson_hdmi_encp_mode_1080p50 }, + { 16, &meson_hdmi_encp_mode_1080p60 }, ++ { 93, &meson_hdmi_encp_mode_2160p24 }, ++ { 94, &meson_hdmi_encp_mode_2160p25 }, ++ { 95, &meson_hdmi_encp_mode_2160p30 }, + { 0, NULL}, /* sentinel */ + }; + |