1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
|
Cleaned up patch which underclocks the SDIO bus on E200 boards,
derived from UBNT GPL sources (ubnt_prune_device_tree).
Signed-off-by: Ariadne Conill <ariadne@dereferenced.org>
--- linux-5.4.orig/arch/mips/cavium-octeon/octeon-platform.c
+++ linux-5.4/arch/mips/cavium-octeon/octeon-platform.c
@@ -1128,6 +1128,20 @@
}
#endif
+ /* UBNT underclocks the SDIO bus on E200. We do the same here. */
+ if (octeon_bootinfo->board_type == CVMX_BOARD_TYPE_UBNT_E200 || octeon_bootinfo->board_type == CVMX_BOARD_TYPE_UBNT_E220) {
+ int mmc_slot0;
+ u32 freq = 26000000;
+
+ pr_info("UBNT E200 board detected, underclocking SDIO bus.\n");
+
+ mmc_slot0 = fdt_path_offset(initial_boot_params, "/soc/mmc/mmc-slot@0");
+ if (mmc_slot0 > 0) {
+ fdt_setprop_inplace_cell(initial_boot_params, mmc_slot0,
+ "spi-max-frequency", freq);
+ }
+ }
+
return 0;
}
--- linux-5.4.orig/arch/mips/include/asm/octeon/cvmx-bootinfo.h
+++ linux-5.4/arch/mips/include/asm/octeon/cvmx-bootinfo.h
@@ -295,6 +295,9 @@
*/
CVMX_BOARD_TYPE_CUST_PRIVATE_MIN = 20001,
CVMX_BOARD_TYPE_UBNT_E100 = 20002,
+ CVMX_BOARD_TYPE_UBNT_E200 = 20003,
+ CVMX_BOARD_TYPE_UBNT_E120 = 20004,
+ CVMX_BOARD_TYPE_UBNT_E220 = 20005,
CVMX_BOARD_TYPE_CUST_DSR1000N = 20006,
CVMX_BOARD_TYPE_KONTRON_S1901 = 21901,
CVMX_BOARD_TYPE_CUST_PRIVATE_MAX = 30000,
@@ -396,6 +399,9 @@
/* Customer private range */
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MIN)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E100)
+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E200)
+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E120)
+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E220)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DSR1000N)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KONTRON_S1901)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MAX)
|
