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From 516ac8a982a20a55ef8e28715e36c3aa917b7222 Mon Sep 17 00:00:00 2001
From: Juergen Gross <jgross@suse.com>
Date: Thu, 26 Apr 2018 13:33:11 +0200
Subject: [PATCH] xen/x86: add a function for modifying cr3
Instead of having multiple places with more or less identical asm
statements just have one function doing a write to cr3.
As this function should be named write_cr3() rename the current
write_cr3() function to switch_cr3().
Suggested-by: Andrew Copper <andrew.cooper3@citrix.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
xen/arch/x86/flushtlb.c | 4 ++--
xen/arch/x86/mm.c | 2 +-
xen/arch/x86/x86_64/traps.c | 2 +-
xen/common/efi/runtime.c | 4 ++--
xen/include/asm-x86/flushtlb.h | 2 +-
xen/include/asm-x86/processor.h | 5 +++++
6 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 2729ba42e7..1af9221607 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -72,7 +72,7 @@ static void post_flush(u32 t)
this_cpu(tlbflush_time) = t;
}
-void write_cr3(unsigned long cr3)
+void switch_cr3(unsigned long cr3)
{
unsigned long flags, cr4;
u32 t;
@@ -84,7 +84,7 @@ void write_cr3(unsigned long cr3)
cr4 = read_cr4();
write_cr4(cr4 & ~X86_CR4_PGE);
- asm volatile ( "mov %0, %%cr3" : : "r" (cr3) : "memory" );
+ write_cr3(cr3);
write_cr4(cr4);
post_flush(t);
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 171137310b..d529f48a51 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -513,7 +513,7 @@ void make_cr3(struct vcpu *v, unsigned long mfn)
void write_ptbase(struct vcpu *v)
{
get_cpu_info()->root_pgt_changed = true;
- write_cr3(v->arch.cr3);
+ switch_cr3(v->arch.cr3);
}
/*
diff --git a/xen/arch/x86/x86_64/traps.c b/xen/arch/x86/x86_64/traps.c
index 8bb2f1afe5..934fc91069 100644
--- a/xen/arch/x86/x86_64/traps.c
+++ b/xen/arch/x86/x86_64/traps.c
@@ -287,7 +287,7 @@ void toggle_guest_pt(struct vcpu *v)
get_cpu_info()->root_pgt_changed = true;
/* Don't flush user global mappings from the TLB. Don't tick TLB clock. */
- asm volatile ( "mov %0, %%cr3" : : "r" (v->arch.cr3) : "memory" );
+ write_cr3(v->arch.cr3);
if ( !(v->arch.flags & TF_kernel_mode) )
return;
diff --git a/xen/common/efi/runtime.c b/xen/common/efi/runtime.c
index 20bc5328e0..76485f3e3d 100644
--- a/xen/common/efi/runtime.c
+++ b/xen/common/efi/runtime.c
@@ -111,7 +111,7 @@ struct efi_rs_state efi_rs_enter(void)
asm volatile ( "lgdt %0" : : "m" (gdt_desc) );
}
- write_cr3(virt_to_maddr(efi_l4_pgtable));
+ switch_cr3(virt_to_maddr(efi_l4_pgtable));
return state;
}
@@ -120,7 +120,7 @@ void efi_rs_leave(struct efi_rs_state *state)
{
if ( !state->cr3 )
return;
- write_cr3(state->cr3);
+ switch_cr3(state->cr3);
if ( is_pv_vcpu(current) && !is_idle_vcpu(current) )
{
struct desc_ptr gdt_desc = {
diff --git a/xen/include/asm-x86/flushtlb.h b/xen/include/asm-x86/flushtlb.h
index ca2cd16721..834b113626 100644
--- a/xen/include/asm-x86/flushtlb.h
+++ b/xen/include/asm-x86/flushtlb.h
@@ -84,7 +84,7 @@ static inline unsigned long read_cr3(void)
}
/* Write pagetable base and implicitly tick the tlbflush clock. */
-void write_cr3(unsigned long cr3);
+void switch_cr3(unsigned long cr3);
/* flush_* flag fields: */
/*
diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h
index bcf647cbcc..d2c93a67dd 100644
--- a/xen/include/asm-x86/processor.h
+++ b/xen/include/asm-x86/processor.h
@@ -284,6 +284,11 @@ static inline unsigned long read_cr2(void)
return cr2;
}
+static inline void write_cr3(unsigned long val)
+{
+ asm volatile ( "mov %0, %%cr3" : : "r" (val) : "memory" );
+}
+
static inline unsigned long read_cr4(void)
{
return get_cpu_info()->cr4;
--
2.15.2
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