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authorJoseph Myers <joseph@codesourcery.com>2009-07-14 15:52:27 +0000
committerBernhard Reutner-Fischer <rep.dot.nop@gmail.com>2009-12-19 04:20:26 +0100
commit239d2e28ba1bb8e2160e10f6e7c8ebcd701490aa (patch)
tree32cadd7913f0593d6a6c30d36b28246bd9845966
parenta50074061b1445c678248b07bd34dc55b264e182 (diff)
downloaduClibc-alpine-239d2e28ba1bb8e2160e10f6e7c8ebcd701490aa.tar.bz2
uClibc-alpine-239d2e28ba1bb8e2160e10f6e7c8ebcd701490aa.tar.xz
Fix ARM syscall argument loading.
This patch is a uClibc equivalent of <http://sourceware.org/ml/libc-ports/2008-11/msg00006.html>, to compute all syscall arguments on ARM in temporary variables before loading them into register variables. The principle is as for that glibc patch; the problem I actually observed was a GCC internal compiler error building ld.so for Thumb-2. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
-rw-r--r--libc/sysdeps/linux/arm/bits/syscalls.h35
1 files changed, 21 insertions, 14 deletions
diff --git a/libc/sysdeps/linux/arm/bits/syscalls.h b/libc/sysdeps/linux/arm/bits/syscalls.h
index 2d2e0f0a4..040a6a8a0 100644
--- a/libc/sysdeps/linux/arm/bits/syscalls.h
+++ b/libc/sysdeps/linux/arm/bits/syscalls.h
@@ -170,32 +170,39 @@ return (type) (INLINE_SYSCALL(name, 7, arg1, arg2, arg3, arg4, arg5, arg6, arg7)
#define LOAD_ARGS_0()
#define ASM_ARGS_0
#define LOAD_ARGS_1(a1) \
- _a1 = (int) (a1); \
- LOAD_ARGS_0 ()
+ int _a1tmp = (int) (a1); \
+ LOAD_ARGS_0 () \
+ _a1 = _a1tmp;
#define ASM_ARGS_1 ASM_ARGS_0, "r" (_a1)
#define LOAD_ARGS_2(a1, a2) \
- register int _a2 __asm__ ("a2") = (int) (a2); \
- LOAD_ARGS_1 (a1)
+ int _a2tmp = (int) (a2); \
+ LOAD_ARGS_1 (a1) \
+ register int _a2 __asm__ ("a2") = _a2tmp;
#define ASM_ARGS_2 ASM_ARGS_1, "r" (_a2)
#define LOAD_ARGS_3(a1, a2, a3) \
- register int _a3 __asm__ ("a3") = (int) (a3); \
- LOAD_ARGS_2 (a1, a2)
+ int _a3tmp = (int) (a3); \
+ LOAD_ARGS_2 (a1, a2) \
+ register int _a3 __asm__ ("a3") = _a3tmp;
#define ASM_ARGS_3 ASM_ARGS_2, "r" (_a3)
#define LOAD_ARGS_4(a1, a2, a3, a4) \
- register int _a4 __asm__ ("a4") = (int) (a4); \
- LOAD_ARGS_3 (a1, a2, a3)
+ int _a4tmp = (int) (a4); \
+ LOAD_ARGS_3 (a1, a2, a3) \
+ register int _a4 __asm__ ("a4") = _a4tmp;
#define ASM_ARGS_4 ASM_ARGS_3, "r" (_a4)
#define LOAD_ARGS_5(a1, a2, a3, a4, a5) \
- register int _v1 __asm__ ("v1") = (int) (a5); \
- LOAD_ARGS_4 (a1, a2, a3, a4)
+ int _v1tmp = (int) (a5); \
+ LOAD_ARGS_4 (a1, a2, a3, a4) \
+ register int _v1 __asm__ ("v1") = _v1tmp;
#define ASM_ARGS_5 ASM_ARGS_4, "r" (_v1)
#define LOAD_ARGS_6(a1, a2, a3, a4, a5, a6) \
- register int _v2 __asm__ ("v2") = (int) (a6); \
- LOAD_ARGS_5 (a1, a2, a3, a4, a5)
+ int _v2tmp = (int) (a6); \
+ LOAD_ARGS_5 (a1, a2, a3, a4, a5) \
+ register int _v2 __asm__ ("v2") = _v2tmp;
#define ASM_ARGS_6 ASM_ARGS_5, "r" (_v2)
#define LOAD_ARGS_7(a1, a2, a3, a4, a5, a6, a7) \
- register int _v3 __asm__ ("v3") = (int) (a7); \
- LOAD_ARGS_6 (a1, a2, a3, a4, a5, a6)
+ int _v3tmp = (int) (a7); \
+ LOAD_ARGS_6 (a1, a2, a3, a4, a5, a6) \
+ register int _v3 __asm__ ("v3") = _v3tmp;
#define ASM_ARGS_7 ASM_ARGS_6, "r" (_v3)